JP3946114B2 - Manufacturing method of multilayer circuit wiring board - Google Patents
Manufacturing method of multilayer circuit wiring board Download PDFInfo
- Publication number
- JP3946114B2 JP3946114B2 JP2002267594A JP2002267594A JP3946114B2 JP 3946114 B2 JP3946114 B2 JP 3946114B2 JP 2002267594 A JP2002267594 A JP 2002267594A JP 2002267594 A JP2002267594 A JP 2002267594A JP 3946114 B2 JP3946114 B2 JP 3946114B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit wiring
- wiring board
- multilayer circuit
- manufacturing
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、金属突起による層間導通構造を有する多層回路配線基板の製造方法に関する。
【0002】
【従来の技術】
従来の金属突起による層間導通構造を有する多層回路配線基板としては、例えば特開2001−111189公報のように、コニーデ状或いは略台形断面形状を有する金属突起を有する第一の導電性金属層を用意し、導電性金属層の頂部を除く部分に絶縁層を配装した後、上記金属突起に第二の導電性金属層を当接させて熱加圧プレス法により積層加圧して接合させるものであった。
【0003】
このような方法においては、同公報に記載のとおり、金属突起と第二の導電性金属層との接続の信頼性を高める為には、金属突起の頂部に導電性ペーストを塗布する方法が採用されている。
【0004】
【発明が解決しようとする課題】
ところが、金属突起の頂部に対して正確に導電性ペーストを塗布することは、今後益々高精細化する回路配線基板においては、技術上困難性を有する一方、このような多層回路配線基板を安価に提供するための障害となる。
【0005】
本発明は、導電性ペーストの塗布を行う事無く、接続の信頼性を高め得る多層回路配線基板の製造方法を提供するものである。
【0006】
【課題を解決する為の手段】
その為に、本発明においては、第一の導電性金属層に形成された金属突起を、第二の導電性金属層に接合して層間接続がなされる多層回路配線基板の製造方法において、上記金属突起と上記第二の導電性金属層の接合時に、多層回路配線基板の厚み方向に、振動を加えながら加熱加圧して接合させ、上記第一及び第二の導電性金属層に対するエッチングにより所要の回路配線パターンを形成することを特徴とする金属突起導通型多層回路配線基板の製造方法が提供される。
【0007】
また、本発明では、所要の回路配線パターンが形成された多層回路配線基板に対し、金属突起を有する導電性金属層を、該金属突起が多層回路配線基板に形成された層間導通の為のランドに当接するように配置し、多層回路配線基板の厚み方向に、振動を加えながら加熱加圧し接合することを順次繰り返しながら積層する事を特徴とする多層回路配線基板の製造方法も提供される。
【0008】
【発明の実施の形態】
図1は、本発明の一実施例による多層回路配線基板の製造工程図であって、先ず同図(1)に示す様に、第一の銅箔1の一方面に対し、突起形成部に対応したレジスト皮膜2を形成し、その他方の面に対しては銅箔に対するエッチング液から保護するために、全面にわたってレジスト皮膜3を形成する。これらのレジスト皮膜2,3は回路基板形成工程中の銅箔エッチングに用いられるフィルム状のレジストをラミネートした後、露光、現像して形成される。
【0009】
次に、同図(2)に示す様に、塩化第二銅溶液など一般的に用いられているエッチング液により、第一の銅箔1をエッチングして、レジスト皮膜2、3を剥離除去し、第一の銅箔1の一部がコニーデ状、或いは略台形断面形状の突起になるようにエッチング処理を行い、金属突起4を形成する。
【0010】
そこで、同図(3)に示す様に、多層回路配線基板の層間絶縁の為の絶縁層5を、熱可塑性ポリイミド等の絶縁樹脂を用いて形成する。
【0011】
次に、同図(4)に示す様に、第二の銅箔6を積層し、振動を加えながら加熱加圧して金属突起4と第二の銅箔6を接合する。
【0012】
この振動は、金属突起の頂部面積、突起高さ等により適宜選択されるが、通常、1μmから20μmが採用される。
【0013】
次いで、同図(5)に示す様に、第一の銅箔1と第二の銅箔6に対して、通常のエッチング処理により、所要の回路配線パターン7を形成する。
【0014】
図2は、図1で製作された多層回路配線基板に対し、更に回路層を積層したものであって、先ず同図(1)に示す様に、一方面に金属突起4を有すると共に、多層回路配線基板における層間絶縁の為の絶縁層5を有する第三の銅箔8を製作する。この工程は、図1(1)〜(3)と同様の手法で行う。
【0015】
次に、同図(2)に示す様に、図1で製作された多層回路配線基板9に対し、同図(1)に示す金属突起4が層間導通の為のランド10に当接するように配置し、振動を加えながら加熱加圧して積層し、第三の銅箔に形成された金属突起4と多層回路配線基板のランド部10の銅箔とを接合する。
【0016】
そこで、同図(3)に示す様に、第三の銅箔8に対し、エッチング処理を行い、所要の回路配線パターン11を形成する。
【0017】
ここで、更に回路層数を増やしたい場合は、図1で製作した多層回路配線基板の両面に対して同様の手法による積層を行うか、または同図(3)で形成された多層回路配線基板に対して、同図(1)から(3)を繰り返し行うことで製作できる。
【0018】
【発明の効果】
本発明によれば、金属突起と銅箔の接合時に、振動を加えながら加熱加圧して接合させるので、金属突起の上面に酸化皮膜が介在した場合でも、その酸化皮膜を破壊しながら、突起金属と回路となる導電性金属層の金属粒子の分散が促進され、強固な接合を得ることが出来る。
【0019】
従って、導電性ペーストの塗布等の工程を用いず、接続信頼性を高めた突起接続による多層回路配線基板を安価に得る事が出来る。
【図面の簡単な説明】
【図1】本発明の一実施例による多層回路配線基板の製造工程図。
【図2】本発明の他の実施例による多層回路配線基板の製造工程図。
【符号の説明】
1 銅箔
2 レジスト皮膜
3 レジスト皮膜
4 金属突起
5 絶縁層
6 銅箔
7 回路配線パターン[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer circuit wiring board having an interlayer conduction structure with metal protrusions .
[0002]
[Prior art]
As a conventional multilayer circuit wiring board having an interlayer conduction structure with metal protrusions, a first conductive metal layer having a metal protrusion having a conical shape or a substantially trapezoidal cross-sectional shape is prepared as disclosed in, for example, Japanese Patent Application Laid-Open No. 2001-111189. Then, after disposing an insulating layer on the portion other than the top of the conductive metal layer, the second conductive metal layer is brought into contact with the metal protrusion and laminated and pressed by a hot press method to be joined. there were.
[0003]
In such a method, as described in the publication, in order to increase the reliability of the connection between the metal protrusion and the second conductive metal layer, a method of applying a conductive paste on the top of the metal protrusion is employed. Has been.
[0004]
[Problems to be solved by the invention]
However, accurately applying the conductive paste to the tops of the metal protrusions is technically difficult for circuit wiring boards that will be increasingly refined in the future, while making such multilayer circuit wiring boards inexpensive. It becomes an obstacle to provide.
[0005]
The present invention provides a method for manufacturing a multilayer circuit wiring board capable of improving the reliability of connection without applying a conductive paste.
[0006]
[Means for solving the problems]
Therefore, in the present invention, in the method of manufacturing a multilayer circuit wiring board in which the metal protrusion formed on the first conductive metal layer is joined to the second conductive metal layer to make interlayer connection, At the time of joining the metal protrusion and the second conductive metal layer, it is joined by heating and pressing in the thickness direction of the multilayer circuit wiring board while applying vibration, and etching is performed on the first and second conductive metal layers. A method for manufacturing a metal protrusion conduction type multilayer circuit wiring board is provided.
[0007]
In the present invention, a conductive metal layer having metal protrusions is provided on a multilayer circuit wiring board on which a required circuit wiring pattern is formed, and a land for interlayer conduction in which the metal protrusions are formed on the multilayer circuit wiring board. There is also provided a method for producing a multilayer circuit wiring board , wherein the multilayer circuit wiring board is disposed so as to be in contact with each other and laminated while sequentially repeating heating and pressurizing and bonding in the thickness direction of the multilayer circuit wiring board.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a manufacturing process diagram of a multilayer circuit wiring board according to an embodiment of the present invention. First, as shown in FIG. A
[0009]
Next, as shown in FIG. 2 (2), the
[0010]
Therefore, as shown in FIG. 3C, the
[0011]
Next, as shown in FIG. 4 (4), the second copper foil 6 is laminated, and the
[0012]
This vibration is appropriately selected depending on the top area of the metal protrusion, the height of the protrusion, and the like, but usually 1 μm to 20 μm is employed.
[0013]
Next, as shown in FIG. 5 (5), a required
[0014]
FIG. 2 is a circuit diagram in which a circuit layer is further laminated on the multilayer circuit wiring board manufactured in FIG. 1. First, as shown in FIG. A third copper foil 8 having an
[0015]
Next, as shown in FIG. 2B, the
[0016]
Therefore, as shown in FIG. 3 (3), the third copper foil 8 is etched to form a required
[0017]
Here, when it is desired to further increase the number of circuit layers, the multilayer circuit wiring board manufactured in FIG. 1 is laminated on the both surfaces of the multilayer circuit wiring board by the same method, or the multilayer circuit wiring board formed in FIG. On the other hand, it can be manufactured by repeating (1) to (3) in FIG.
[0018]
【The invention's effect】
According to the present invention, since the metal protrusion and the copper foil are bonded by heating and pressurizing while applying vibration, even when an oxide film is present on the upper surface of the metal protrusion, the protrusion metal is destroyed while destroying the oxide film. Dispersion of the metal particles in the conductive metal layer serving as a circuit is promoted, and a strong bond can be obtained.
[0019]
Therefore, it is possible to obtain a multilayer circuit wiring board by protruding connection with improved connection reliability at a low cost without using a process such as applying a conductive paste.
[Brief description of the drawings]
FIG. 1 is a manufacturing process diagram of a multilayer circuit wiring board according to an embodiment of the present invention.
FIG. 2 is a manufacturing process diagram of a multilayer circuit wiring board according to another embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2002267594A JP3946114B2 (en) | 2002-09-13 | 2002-09-13 | Manufacturing method of multilayer circuit wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002267594A JP3946114B2 (en) | 2002-09-13 | 2002-09-13 | Manufacturing method of multilayer circuit wiring board |
Publications (2)
Publication Number | Publication Date |
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JP2004104045A JP2004104045A (en) | 2004-04-02 |
JP3946114B2 true JP3946114B2 (en) | 2007-07-18 |
Family
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JP2002267594A Expired - Fee Related JP3946114B2 (en) | 2002-09-13 | 2002-09-13 | Manufacturing method of multilayer circuit wiring board |
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Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4699136B2 (en) * | 2005-08-17 | 2011-06-08 | 日本メクトロン株式会社 | Method for manufacturing flexible printed circuit board |
KR101055501B1 (en) | 2010-02-12 | 2011-08-08 | 삼성전기주식회사 | Printed circuit board and manufacturing method of printed circuit board |
JP5772949B2 (en) * | 2011-03-24 | 2015-09-02 | 株式会社村田製作所 | Wiring board |
KR20120124319A (en) * | 2011-05-03 | 2012-11-13 | 엘지이노텍 주식회사 | The printed circuit board and the method for manufacturing the same |
KR101814843B1 (en) * | 2013-02-08 | 2018-01-04 | 엘지이노텍 주식회사 | The printed circuit board and the method for manufacturing the same |
KR101575127B1 (en) | 2014-08-20 | 2015-12-07 | 주식회사 엘리텍 | Metal core printed circuit board and method for manufacturing the same |
JP6568637B1 (en) * | 2018-12-04 | 2019-08-28 | 板橋精機株式会社 | Printed circuit board and manufacturing method thereof |
CN110418508B (en) * | 2019-07-15 | 2021-08-31 | 宁波华远电子科技有限公司 | Manufacturing method of copper substrate circuit board |
JP6804115B1 (en) * | 2019-08-09 | 2020-12-23 | 板橋精機株式会社 | Printed board |
-
2002
- 2002-09-13 JP JP2002267594A patent/JP3946114B2/en not_active Expired - Fee Related
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