JP3942395B2 - Multilayer chip parts - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer chip component, and in particular, a via suitable for forming a coil conductor or the like by connecting internal electrodes formed on a plurality of ceramic sheets such as a multilayer chip type inductor element via the via. It is related with the connection structure of the internal electrode via.
[0002]
[Prior art]
In order to manufacture a multilayer chip component such as a multilayer chip inductor element, an internal electrode pattern is formed on a plurality of layers of ceramic green sheets by screen printing or the like, and these ceramic green sheets are laminated and pressure-bonded and fired. . Here, vias are provided in the connecting portions of the internal electrode patterns of the ceramic green sheets, and conductive materials constituting the internal electrodes are embedded in the vias, whereby the upper and lower internal electrodes are connected to each other. Therefore, the internal electrode patterns are connected in a spiral shape, for example, thereby forming a coil conductor.
[0003]
[Problems to be solved by the invention]
In the conventional structure of the connecting portion of the internal electrode pattern between the upper and lower layers of the ceramic green sheet through the via, the internal electrode pattern width is generally designed to be wider than the via diameter. This is because the alignment margin of the internal electrode pattern with respect to the via is taken into consideration so that the internal electrode can always cover the via. In other words, the via pad on the internal electrode pattern and the via pad on the via receiving side have the same shape and area.
[0004]
However, when the area of the internal electrode pattern on the side where the via is buried and the area of the internal electrode pattern on the side where the via is received is designed to have a sufficient alignment margin with respect to the via, the overlap of the peripheral portion of the internal electrode via, There is a problem that the pressure is concentrated at that portion, the amount of displacement of the internal electrode is increased, and crushing occurs. In addition, the diffusion of metal particles such as silver constituting the internal electrode into the ceramic green sheet that is the base material of the internal electrode is promoted, resulting in a decrease in insulation resistance in the ceramic green sheet, which is a factor that deteriorates the characteristics. It was.
[0005]
The present invention has been made in view of the above-described circumstances, can prevent concentration of pressure due to the overlapping of internal electrode patterns in the peripheral portion of the via, can obtain high reliability and good characteristics, and can be downsized. Another object of the present invention is to provide a suitable laminated chip component.
[0006]
[Means for Solving the Problems]
The multilayer chip component of the present invention is a multilayer chip component in which vias are provided in a ceramic sheet and upper and lower internal electrodes are connected via the vias. The width is narrower than the electrode width on the electrode side.
[0007]
Here, the via is disposed so that the via is positioned at a substantially central portion of the electrode width on the side of the internal electrode filling the via, and the internal electrode receiving the via is shifted in the center so that more than half of the via overlaps. It is characterized by the arrangement. Further, the internal electrodes for receiving the vias are alternately arranged on the left half and the right half with respect to the vias.
[0008]
According to the present invention, since the electrode width of the internal electrode on the via receiving side can be designed to be narrower than the electrode width on the normal via receiving side, the overlapping portion of the internal electrode pattern is relaxed by this portion, Pressure concentration can be reduced. As a result, misalignment and crushing of the internal electrodes are reduced, and good electrical characteristics can be obtained as a multilayer chip component, and good reliability can be obtained. In addition, since the concentration of stress is reduced, the diffusion of metal particles such as silver of the internal electrode into the ceramic green sheet is reduced, whereby a good insulation resistance is obtained between the respective layers. Further, since the internal electrode pattern can be designed to be narrow even at a part, this makes it possible to increase the density of the internal electrode pattern and reduce the size of the parts.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0010]
FIG. 1 shows a laminated structure of green sheets of a laminated chip component according to an embodiment of the present invention. FIG. 1A shows a plan view of each pattern, and FIG. 1B is a perspective view schematically showing a stacked state of each pattern. Note that the illustrated pattern shows only the area corresponding to one chip, but it is actually a multi-chip substrate, and a large number of this pattern is arranged on a matrix.
[0011]
Each green sheet 11, 12, 13, 14, 15 is provided with internal electrode patterns 21, 25, 29, 33, 37, respectively. Here, each internal electrode pattern is formed by, for example, silver palladium paste by screen printing. At the end of each internal electrode pattern, pads 22, 26, 30, and 34 on the via filling side are provided, and the vias 23, 27, 31, and 35 are disposed at substantially the center of the pads. .
[0012]
In other words, the vias are embedded in the vias in the through holes provided in the respective green sheets with the conductive material paste constituting the electrode patterns when the internal electrode patterns are screen printed. Via receiving pads 24, 28, 32, 36 connected to the vias 20, 26, 30, 34 on the via filling side via vias 23, 26, 31, 35 are internal electrode patterns 25, 29, 33, 36, respectively. 37 is provided as a part. Here, the pads 24, 28, 32, 36 on the via receiving side are narrower than the pads 22, 26, 30, 34 on the via filling side. The electrode width of the pad on the via receiving side is the same as the electrode width of the internal electrode pattern.
[0013]
FIG. 1 (b) shows the stacked state of the green sheets 11, 12, 13, 14, and 15. The upper four sheets and the lower three green sheets are plain green sheets, and are used as chip parts. It is arranged for the adjustment of the size. At the left end of the green sheet 11, a connection portion 20 with an external electrode (not shown) of the internal electrode pattern 21 is disposed, and the pad 22 at the end of the internal electrode pattern 21 is connected to the inside of the green sheet 12 via a via 23. The electrode pattern 25 is connected to the via receiving portion 24.
[0014]
In the green sheet 12, the internal electrode pattern 25 circulates by about ¾ and is connected from the via filling side pad 26 to the via receiving portion 28 of the green sheet 13 through the via 27. In this way, the green sheets 13 and 14 are connected from the via filling side pad 30 to the via receiving portion 32 of the green sheet via the via 31. Similarly, in the green sheet 14, the via filling side pad 34 to the via 35 are connected. To the via receiving portion 36 of the green sheet 15. In this way, the internal electrode patterns 21, 25, 29, 33, and 37 provided on the green sheets 11 to 15 are connected, thereby forming a conductor coil pattern with three or more turns.
[0015]
FIG. 2 shows an example of the detailed structure of the connecting portion. The via filling pad 22 of the internal electrode 21 formed on the green sheet 11 has a sufficient margin with respect to the via 23 and has a larger diameter than the via 23. And it arrange | positions so that the via | veer 23 may be located in the approximate center part of the via filling side pad 22. FIG. On the other hand, the via receiving portion 24 connected to the internal electrode 25 in the green sheet 12 is arranged with the center shifted as shown in the figure. In addition, it is preferable that the via receiving portion 24 and the via 23 are arranged so that a half or more of the via 23 overlaps the area of the via 23. The dimensional width of the via receiving portion 24 is preferably the same as the dimensional width of the internal electrode, and is preferably about the same as or smaller than the diameter of the via 23.
[0016]
According to the connection structure of the present invention described above, the via-filling side pad 22 has a size that sufficiently covers the via 23, whereby the conductive material paste constituting the internal electrode 21 is completely embedded in the via 23. It is. The via receiving portion 24 is formed as a part of the internal electrode pattern, and a sufficient conduction state is ensured by contacting the conductive material paste embedded in the via 23. In the present invention, this contact portion is required and secured sufficiently, and an extra conventional receiving portion is removed. Therefore, as shown in the figure, the pad having the same size as that of the via filling pad and the receiving portion is conventionally used, but in this embodiment, the size of the receiving portion can be substantially halved.
[0017]
As shown in FIG. 1B, as described above, there is a problem that the pad portions on the filling side and the receiving side overlap each other in the periphery of the via so that stress is concentrated. Thus, by making the pattern of the via receiving portion approximately half of the via filling pad, the overlapping portion of the pattern can be reduced.
[0018]
As a result, a normal pattern shape as designed can be maintained, so that problems such as deterioration in characteristics and reduction in reliability do not occur. In addition, pressure concentration occurs in the overlapping portion of the internal electrode pads around the via, and thus, there is a problem that the material such as silver constituting the internal electrode diffuses into the green sheet and the characteristics are deteriorated due to a decrease in insulation resistance. . Regarding such a problem, since the overlapping portion of the internal electrodes is reduced, the concentration of pressure is alleviated, and the problem of diffusion of the metal material into the green sheet is also reduced.
[0019]
FIG. 2 shows the case where the via receiving portion 24 is arranged in the left half with respect to the via 23, but it may be arranged in the right half, preferably left, right,. It is preferable to arrange them alternately. Thereby, the overlapping part of the electrode around a via can be reduced more.
[0020]
Next, the outline of the manufacturing method of the multilayer chip component of the present invention will be described. First, a ceramic green sheet is formed by a doctor blade method or the like. Then, a via is formed at a predetermined position of each green sheet by punching or a laser method. Then, the internal electrode pattern is formed by screen printing of a conductive material paste such as silver palladium. Here, the internal electrode pattern includes an internal electrode pattern body, a via pad and a via receiving part, and these are integrally formed. At this time, as described above, the via receiving portion is formed narrower than the electrode width of the via filling side pad. Here, a conductive material paste is embedded in the via by screen printing.
[0021]
Then, green sheets on which these vias and internal electrode patterns are formed are stacked and pressure-bonded. As a result, a part of the internal electrode pattern formed by screen printing is embedded in the via, and this embedded part comes into contact with the via receiving portion of the internal electrode pattern located on the lower layer side to ensure conduction between the internal electrode patterns. Is done. As described above, the relationship between the via and the via receiving portion pattern is such that the internal electrode pattern is arranged such that an area of more than half of the via is in contact with the via receiving portion.
[0022]
In the above process, the internal electrode pattern corresponding to each chip region is formed in a matrix on a multi-piece green sheet. Therefore, the chip is cut into a vertical direction and a horizontal direction to form individual chips. By firing at a high temperature, the ceramic green sheet becomes a sintered ceramic material, and the internal electrode pattern formed by the conductive material paste becomes an internal electrode made of a sintered metal. Then, an electrode is formed on the side surface of the chip, and further, nickel plating, solder plating, or the like is performed to form an external electrode, thereby completing a multilayer chip component.
[0023]
In the above embodiment, the connection portion in the case of forming the coil element has been described. However, the gist of the present invention can be similarly applied to various connection portions of other circuit types.
[0024]
Although one embodiment of the present invention has been described in the above embodiment, various modified embodiments are possible without departing from the spirit of the present invention.
[0025]
【The invention's effect】
As described above, according to the present invention, in a multilayer chip component manufactured by laminating a plurality of green sheets formed by printing internal electrode patterns, pressure concentration due to overlapping of internal electrodes around a via can be reduced. it can. Therefore, positional displacement and crushing of the internal electrode and diffusion of the internal electrode material to the green sheet are prevented, thereby preventing deterioration of the characteristics of the circuit element and improving reliability. Furthermore, it is also suitable for miniaturization of multilayer chip components.
[Brief description of the drawings]
FIG. 1A is a plan view showing an arrangement example of internal electrode patterns and vias in a green sheet, and FIG. 1B is an exploded perspective view schematically showing a stacked state of each green sheet. It is.
FIG. 2 is a partial plan view showing an enlarged configuration example of a connection portion in FIG. 1;
[Explanation of symbols]
11, 12, 13, 14, 15 Ceramic green sheets 21, 25, 29, 33, 37 Internal electrode patterns 22, 26, 30, 34 Via pad 23, 27, 31, 35 Via 24, 28, 32, 36 Via receiving part (pat)

Claims (2)

In the multilayer chip component in which vias are provided in the ceramic sheet and the upper and lower internal electrodes are connected through the vias,
The electrode width on the internal electrode side that receives the via is made narrower than the electrode width on the internal electrode side that fills the via,
The electrode width on the internal electrode side filling the via is larger than the via diameter, and the electrode width on the internal electrode side receiving the via is equal to or smaller than the via diameter,
Arranged so that the via is located in the approximate center of the internal electrode that fills the via,
Internal electrodes, as more than half of the via overlap, the product layer chip parts characterized in that the staggered center for receiving said vias. In the multilayer chip component in which vias are provided in the ceramic sheet and the upper and lower internal electrodes are connected through the vias,
The electrode width on the internal electrode side that receives the via is made narrower than the electrode width on the internal electrode side that fills the via,
The electrode width on the internal electrode side filling the via is larger than the via diameter, and the electrode width on the internal electrode side receiving the via is equal to or smaller than the via diameter,
The internal electrode receiving the via for the via, to the left and right halves, the product layer chip parts characterized in that to arrange alternately.

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