JP3938128B2 - SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, CIRCUIT BOARD, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC DEVICE - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, a circuit board, an electro-optical device, and an electronic apparatus.

  Conventionally, so-called Au bumps are often used for mounting semiconductor devices such as driver ICs. When this Au bump is formed, a seed layer such as TiW / Au is sputtered on the semiconductor element, the resist is patterned, and then electrolytic Au plating having a height of about 20 μm is applied. However, as the pitch of the electrodes of the driver IC is reduced, it is predicted that stable bump formation such as high aspect resist formation or seed layer etching becomes difficult.

  In recent years, high definition of a display device such as a liquid crystal display device is required, and high-density mounting is required for a driver IC (driver IC) mounted thereon. In recent years, so-called wafer level CSP, which is manufactured at the wafer level, has attracted attention as one of the technologies that enable high-density mounting. In this wafer level CSP, a semiconductor device is formed by forming a plurality of semiconductor elements having a resin layer and wiring in units of wafers and then cutting each semiconductor element.

However, in order to realize high-density mounting including the wafer level CSP technology, it is strongly required to reduce the pitch of the electrodes as described above.
For example, inexpensive electroless Ni bumps are being developed as a technology to meet the demand for narrow pitches. However, since these bumps are harder than Au bumps, driver ICs are directly mounted on the display panel. In some cases, COG (Chip On Glass) mounting is difficult to handle from the viewpoint of connection reliability.

Therefore, Patent Document 1 discloses a technique for forming a protruding electrode by providing a resin-made protruding portion at a position away from the electrode and providing a connection pattern that covers the surface of the protruding portion and connects to the electrode as a conductive layer. It is disclosed. According to this technology, it is easy to form a small-diameter protruding electrode and contribute to the reduction of the size of the semiconductor chip, and the elasticity of the resin protrusion absorbs the stress at the time of mounting and contributes to the stabilization of the mounting quality. it can.
JP-A-2-272737

  However, in the above technique, when forming the protruding electrode, after coating the resin on the semiconductor element, this is patterned to form the protruding portion, and then the conductive layer is formed by sputtering or the like. Need to be patterned. Therefore, since fine patterning that enables a narrow pitch is required at least twice, there is a problem that the process becomes complicated and the manufacturing cost increases.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to enable a narrow pitch and to manufacture a protruding electrode with high connection reliability by simplifying the process. An object of the present invention is to provide a device manufacturing method, a semiconductor device obtained by the method, a circuit board, an electro-optical device, and an electronic apparatus.

  In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes an electrode, a protrusion protruding from the electrode and formed in a predetermined pattern with a resin, and electrically connected to the electrode. And a conductive layer reaching the upper surface of the protrusion, wherein the resin layer is formed on the semiconductor device while avoiding the electrode, and on the electrode and the resin layer. Forming a first conductive layer on the first conductive layer; forming a second conductive layer on the first conductive layer in a pattern corresponding to the predetermined pattern of the protrusion; and performing a heat treatment. Shrinking a portion of the resin layer that is not covered by the second conductive layer, relatively projecting a portion covered by the second conductive layer, and using this as the protrusion, After the heat treatment, it is not covered with the second conductive layer It is characterized by having a step of removing the minute the first conductive layer, a.

  According to this method for manufacturing a semiconductor device, after the second conductive layer is formed corresponding to the pattern of the protrusions, the resin is selectively contracted by simply performing a heat treatment to form the protrusions. As a result, the patterning of the resin layer becomes unnecessary, and therefore the photomask used for this patterning becomes unnecessary, so that the manufacturing process can be simplified and the manufacturing cost can be reduced.

In the method for manufacturing a semiconductor device, the heat treatment is preferably performed at a temperature equal to or higher than the glass transition temperature of the resin.
In this way, it becomes possible to make the resin shrink better due to the heat treatment, and hence the shape of the obtained protrusions becomes better.

The method for manufacturing a semiconductor device preferably includes a step of applying an antioxidant on the first conductive layer before the step of performing the heat treatment.
In this way, since the first conductive layer is prevented from being oxidized during the heat treatment, the portion of the first conductive layer that is not covered with the second conductive layer after the heat treatment is removed. Removal by etching becomes easy.

In the method for manufacturing a semiconductor device, after the step of removing the first conductive layer, a second resin layer is formed on the semiconductor device, and the second resin layer is formed on the semiconductor device. Patterning a shape having an opening exposing a predetermined portion of the second conductive layer on the protrusion, and in the opening where the second conductive layer is exposed on the pattern made of the second resin layer And providing an external connection terminal.
In this way, since the external connection terminal is provided in the opening of the pattern made of the second resin layer, the external connection terminal is connected more favorably to the second conductive layer exposed in the opening, and therefore connected. Reliability is improved. In particular, the technique of the protruding electrode can be applied to the wafer level CSP.

In this method of manufacturing a semiconductor device, it is preferable that the resin forming the protrusions has a higher elastic modulus than the second resin.
In this way, since the pattern made of the second resin is more elastically deformed than the protrusion, when the external connection terminal on the protrusion is connected to another terminal during mounting, the protrusion The elasticity exerts good stress relaxation properties, thereby preventing connection failure and improving connection reliability.

In this method of manufacturing a semiconductor device, after the step of forming the external connection terminal, the external connection terminal and the second resin layer are exposed with at least an upper portion of the external connection terminal exposed. It is preferable to have a step of covering with a third resin layer.
In this way, the connection of the external connection terminal into the opening of the pattern made of the second resin layer can be reinforced by the third resin layer, and therefore the connection reliability of the external connection terminal is improved. To do.

In this method of manufacturing a semiconductor device, it is preferable that the second resin has a higher elastic modulus than the third resin.
In this case, since the third resin is more elastically deformed than the second resin, when the external connection terminal is connected to another terminal at the time of mounting, the second resin is good due to its elasticity. It exhibits stress relaxation properties, thereby preventing connection failure and improving connection reliability.

The semiconductor device of the present invention is manufactured using the above manufacturing method.
According to this semiconductor device, since the manufacturing process is simplified as described above, the manufacturing cost is reduced.

The circuit board of the present invention is characterized in that the semiconductor device is mounted.
According to this circuit board, since the semiconductor device whose manufacturing cost is reduced is mounted, this circuit board itself is also reduced in manufacturing cost.

The electro-optical device of the present invention is characterized in that the semiconductor device or the circuit board is mounted.
According to this electro-optical device, since the semiconductor device or the circuit board whose manufacturing cost is reduced is mounted, the electro-optical device itself is also reduced in manufacturing cost.

The electronic apparatus according to the present invention includes the circuit board or the electro-optical device.
According to this electronic apparatus, since the circuit board or the electro-optical device whose manufacturing cost is reduced is provided, the electronic apparatus itself is also reduced in manufacturing cost.

Hereinafter, the present invention will be described in detail.
First, an example of the structure of a semiconductor device obtained by the method for manufacturing a semiconductor device of the present invention will be described.

  FIG. 1A is a partial plan view of a substrate (semiconductor substrate) on which a semiconductor element is formed as a semiconductor device according to the present invention, and FIG. 1B is an AA line arrow in FIG. FIG. 1C is a sectional view taken along the line B-B in FIG. The substrate in the present embodiment may be a semiconductor substrate such as a silicon wafer in which a large number of semiconductor chips are formed, or may be composed of individual semiconductor chips. In the case of a semiconductor chip, it is generally a rectangular parallelepiped (including a cube), but its shape is not limited and may be spherical.

  In FIGS. 1A to 1C, reference numeral 1 denotes a substrate (semiconductor substrate as a semiconductor device) on which a semiconductor element (not shown) is formed, and reference numeral 2 denotes an electric signal input / output on the substrate 1. The provided Al electrode, reference numeral 3 is a passivation film provided to protect the active surface of the substrate 1, reference numeral 4 is a protrusion formed of resin and arranged at substantially the same pitch as the Al electrode 2, and reference numeral 5 is Al. A first conductive layer formed so as to cover the surfaces (top surfaces) of the electrodes 2 and the protrusions 4, a reference numeral 6 is a second conductive layer formed so as to cover the first conductive layer 5.

  The Al electrode 2 is formed by, for example, forming a film by sputtering and further patterning it into a predetermined shape (for example, a rectangular shape) using a resist or the like. A plurality of Al electrodes 2 are formed at a predetermined pitch near the edge of the substrate 1. In this embodiment, the case where the electrode 2 is made of Al will be described as an example. For example, a Ti (titanium) layer, a TiN (titanium nitride) layer, an AlCu (aluminum / copper) layer, and TiN are used. A structure in which layers (cap layers) are sequentially laminated may be used. Furthermore, the electrode 2 is not limited to the above-described configuration, and may be appropriately changed according to required electrical characteristics, physical characteristics, and chemical characteristics.

The passivation film 3 covers the periphery of the Al electrode 2 and exposes the Al electrode 2 in its opening, and is formed of SiO ₂ (silicon oxide), SiN (silicon nitride), polyimide resin, or the like. There is a thickness of about 1 μm, for example.
The protrusions 4 are formed on the active surface side of the substrate 1 at a height that protrudes, for example, 5 to 20 μm from the Al electrode 2, and these protrusions 4 have substantially the same pitch as the Al electrodes 2 as shown in FIG. A plurality of Al electrodes 2 are arranged and formed in the same direction. These protrusions 4 are made of, for example, a resin such as polyimide resin, silicone-modified polyimide resin, epoxy resin, silicone-modified epoxy resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or the like.

As will be described later, the first conductive layer 5 is a base for the second conductive layer 6 formed by electrolytic plating. For example, a laminated structure of TiW and Au formed thereon is suitable. Yes. However, in addition to such a structure, for example, a structure in which a metal such as Cu, Cr, Ni, Ti, W, NiV, or Al is used alone, or a structure in which some of these metals are stacked should be adopted. Can do.
The second conductive layer 6 is selectively formed on the first conductive layer 5 by electrolytic plating, and has a thickness of 0.5 μm to 10 μm made of a material having higher corrosion resistance than the Al electrode 2, for example, Au. It is formed to the extent. With such a configuration, the second conductive layer 6 has a function of preventing the corrosion of the Al electrode 2 and preventing the occurrence of electrical failure.
Then, the conductive layer of the present invention connected to the Al electrode 2 and extending to the protrusion 4 is formed by the laminated pattern composed of the first conductive layer 5 and the second conductive layer 6, and in particular, the protrusion. The protruding electrode 8 is formed by 4 and the conductive layer formed thereon.

  Next, an embodiment of a method for manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. 2 to 7 with a focus on the step of forming the protrusions 4 on the substrate 1 having the above configuration. 2A to 7C are the same as FIGS. 1A to 1C, FIG. 1A is a partial plan view of the substrate 1, and FIG. Sectional drawing corresponding to the AA arrow directional cross-sectional view in 1 (a), (c) is sectional drawing corresponding to the BB arrow directional cross-sectional view in Fig.1 (a).

First, as shown in FIGS. 2A to 2C, a plurality of Al electrodes 2 are formed at a predetermined position on the active surface of the substrate 1, and the Al electrodes 2 are exposed. A passivation film 3 is formed. The passivation film 3 is formed by first forming a film by SiO ₂ (silicon oxide), SiN (silicon nitride), etc., and then forming a resist layer thereon by spin coating, dipping, spray coating or the like. Then, the resist layer is exposed and developed using a mask on which a predetermined pattern is formed to form a resist pattern (not shown) having a predetermined shape. Thereafter, the film is etched using the resist pattern as a mask to form an opening for exposing the Al electrode 2 to obtain a passivation film 3. Here, dry etching is preferably used for etching, and reactive ion etching (RIE) is preferably used as dry etching. However, wet etching can also be used as etching. Note that after the opening is formed in this manner, the resist pattern is removed using a stripping solution or the like.

Next, the above-described resin (for example, polyimide) constituting the protrusion 4 is applied on the passivation film 3 in a range of 1 to 30 μm, for example, about 20 μm in this example to form the resin layer 4a. Then, as shown in FIGS. 2A to 2C, the resin layer 4 a is patterned so as to be placed on the entire surface of the range L avoiding the directly above the Al electrode 2 exposed in the opening of the passivation film 3 ( In this embodiment, the Al electrode 2 and the resin layer 4a are completely separated from each other).
Subsequently, as shown in FIGS. 3A to 3C, TiW and Au are laminated in this order on the entire surface of the substrate 1 including the surface (top surface) of the Al electrode 2 and the resin layer 4a, for example, by sputtering. Thus, the first conductive layer 5 is formed.

  Next, a resist is applied to the entire surface of the first conductive layer 5 by spin coating, dipping, spray coating, or the like to form a resist layer. Then, the resist layer is exposed and developed using a mask in which openings corresponding to the planar shape (planar pattern) of the second conductive layer 6 are formed, and is patterned into a predetermined shape, thereby FIG. As shown in a) to (c), a pattern of protrusions to be formed, that is, a resist pattern 7 corresponding to a predetermined pattern is formed.

  Next, electrolytic plating is performed using the exposed portion of the first conductive layer 5 that is not covered with the resist pattern 7, that is, the exposed first conductive layer 5 as a seed layer, as shown in FIGS. Thus, the second conductive layer 6 having a desired pattern, that is, a pattern corresponding to the predetermined pattern of the protrusion 4 is formed by this plating layer. Here, as the electrolytic plating process, for example, a process of forming an Au plating layer having a thickness of about 0.5 to 10 μm is employed. Thereafter, as shown in FIGS. 6A to 6C, the resist pattern 7 remaining on the first conductive layer 5 is removed.

  Next, by performing heat treatment, the resin layer 4a in a portion not covered with the second conductive layer 6 is contracted as shown in FIGS. As a result, the portion covered by the second conductive layer 6 relatively protrudes due to the contraction, and the portion covered by the second conductive layer 6 becomes the protrusion 4 described above. Here, for this heat treatment, a hot plate, a clean oven, a curing furnace or the like is preferably used. The heating atmosphere is preferably an inert atmosphere such as nitrogen in order to prevent oxidation of the first conductive layer 5 and the second conductive layer 6.

  About heat processing temperature, it is preferable to carry out at the temperature more than the glass transition temperature of resin which comprises the said resin layer 4a especially. This is because the resin layer 4a can be more effectively contracted by the heat treatment, and thus the shape of the obtained protrusion 4 can be made better. Here, when a polyimide having a glass transition temperature Tg of 260 ° C. is used as the resin, the resin layer 4a may be contracted by about 30% by, for example, heat treatment at 300 ° C. for 1 hour in a clean oven. did it. That is, when the thickness of the resin layer 4a is 20 μm, the resin layer 4a can be contracted by about 6 μm in the thickness direction, and thus the height (step) of the protrusion 4 can be formed to about 6 μm.

  In addition, before performing such a heat treatment, it is particularly preferable to apply an antioxidant onto the first conductive layer 5. In this way, it is possible to prevent the first conductive layer 5 from being oxidized during the heat treatment. Therefore, as will be described later, after the heat treatment, the first conductive layer 5 is removed by etching. This is because it becomes easy. The antioxidant is not particularly limited, and a conventionally known antioxidant such as an organic compound can be used. Further, when the antioxidant is applied on the first conductive layer 5, the antioxidant is applied to the entire surface of the substrate 1, so that the antioxidant is also applied on the second conductive layer 6. It may be.

When the resin layer 4a is selectively contracted by the heat treatment and the protrusions 4 are formed in this manner, the first portion of the contracted portion of the resin layer 4a, that is, the portion not covered with the second conductive layer 6 is formed. The conductive layer 5 is removed by etching, and a laminated pattern composed of the first conductive layer 5 and the second conductive layer 6 is formed as shown in FIGS. As a result, a rearrangement wiring composed of a laminated pattern is formed which is connected to the Al electrode 2 and extends to the projection 4, and a projection electrode 8 connected to the rearrangement wiring is obtained.
Thereafter, the semiconductor device of the present invention is obtained by dicing into individual pieces.

As for the etching of the first conductive layer 5, it is desirable to selectively etch the first conductive layer 5 that is not covered by the second conductive layer 6 as a mask. A mask may be formed, and etching may be performed using the mask. As for etching, either wet etching or dry etching may be employed.
In addition, such etching of the first conductive layer 5 must not be performed prior to the heat treatment, and must be performed after the heat treatment. This is not clear about the mechanism, but after removing the portion of the first conductive layer 5 not covered by the second conductive layer 6 by etching and then performing the heat treatment, This is because it has been experimentally found that the resin layer 4a is not partially contracted, and therefore the protrusion 4 is not formed.

In such a manufacturing method, after the second conductive layer 6 is formed corresponding to the pattern of the protrusions 4, the resin layer 4 a is selectively contracted by simply performing a heat treatment, thereby forming the protrusions. Since the body 4 is formed, the patterning of the protrusions 4 is not necessary, and therefore the manufacturing process can be simplified such that a photomask used for this patterning is not required, thereby reducing the manufacturing cost. can do. Further, since the projecting electrodes 8 composed of the first conductive layer 5 and the second conductive layer 6 are formed on the projecting body 4 made of resin, the projecting bodies 4 are arranged in advance so as to have a narrow pitch. Thus, the protruding electrodes 8 can be formed corresponding to the narrow pitch. Further, since the protrusion 4 is made of resin, and this has a lower elastic modulus than that of metal or the like, when the protrusion electrode 8 on the protrusion 4 is connected to another terminal, the protrusion 4 It will exhibit good stress relaxation properties due to elasticity.
Therefore, in the obtained semiconductor device, the manufacturing cost is reduced, and the connection reliability is improved by preventing the connection failure.

Next, another embodiment of the method for manufacturing a semiconductor device of the present invention will be described.
This embodiment is different from the embodiment shown in FIGS. 1 to 7 in that this embodiment applies the technique of the protruding electrode of the present invention to the wafer level CSP.
That is, in this embodiment, the rearrangement wiring is performed by forming the external connection terminals on the protruding electrodes 8 as the wafer level CSP having a narrow pitch for realizing high-density mounting.

In order to form such a wafer level CSP, a substrate (semiconductor substrate) 10 is prepared as shown in FIG. 8, and a plurality of Al are formed at predetermined positions on the active surface of the substrate 10 in the same manner as in the above embodiment. An electrode 11 is formed in an array, and a passivation film 12 is formed with the Al electrode 11 exposed.
Subsequently, a resin for forming projections (for example, polyimide) is applied on the passivation film 12, and this is further patterned to form a resin layer 13a.

Subsequently, TiW and Cu are laminated in this order on the entire surface of the substrate 10 including the surfaces (top surfaces) of the Al electrode 11 and the resin layer 13a, thereby forming the first conductive layer 14 in this order.
Next, a resist is applied to the entire surface of the first conductive layer 14 by a spin coating method, a dipping method, a spray coating method, or the like to form a resist layer. Then, the resist layer is subjected to an exposure process and a development process using a mask in which openings corresponding to the planar shape (planar pattern) of the first conductive layer 14 are formed, and this is patterned into a predetermined shape, whereby a protrusion That is, a resist pattern (not shown) corresponding to the predetermined pattern is formed.

  Next, electrolytic plating is performed using the exposed portion of the first conductive layer 14 that is not covered by the resist pattern, that is, the exposed first conductive layer 14 as a seed layer, and a desired pattern, that is, a protrusion to be formed is formed by the plating layer. A second conductive layer 15 having a pattern corresponding to the predetermined pattern is formed. Here, as the electrolytic plating process, for example, a process of forming a Cu plating layer is employed. Thereafter, the resist pattern remaining on the first conductive layer 14 is removed.

  Next, by performing a heat treatment, the resin layer 13a in a portion not covered with the second conductive layer 15 is contracted as shown in FIG. As a result, the portion covered by the second conductive layer 15 protrudes relatively by this contraction, and the portion covered by the second conductive layer 15 thereby becomes the protrusion 13. Here, as described above, a hot plate, a clean oven, a curing furnace or the like is preferably used for this heat treatment. The heating atmosphere is preferably an inert atmosphere such as nitrogen in order to prevent oxidation of the first conductive layer 14 and the second conductive layer 15, and in particular, prior to such heat treatment, It is preferable to apply an antioxidant on the first conductive layer 14 because the first conductive layer 14 can be easily removed by etching in a later step. Moreover, about heat processing temperature, it is preferable to carry out at the temperature more than the glass transition temperature (Tg) of resin which comprises the said resin layer 13a especially.

  When the resin layer 13a is selectively contracted by the heat treatment in this manner and the protrusions 13 are formed, the portion not covered by the second conductive layer 15, that is, the first portion of the contracted portion in the resin layer 13a is formed. The conductive layer 14 is removed by etching, and a laminated pattern composed of the first conductive layer 14 and the second conductive layer 15 is formed as shown in FIG. As a result, a rearrangement wiring composed of a laminated pattern is formed which is connected to the Al electrode 11 and extends to the projection 13, and a projection electrode 18 connected to the rearrangement wiring is obtained.

  Next, a second resin layer made of a resist or the like is formed on the semiconductor device having the protruding electrodes 18 formed as described above, and further, an exposure process and a development process are performed on the second resin layer. As a result, the second resin layer is patterned into a shape having an opening for exposing a predetermined portion of the second conductive layer 15 on the protrusion 13 as shown in FIG. Thereby, the second resin layer 16 is formed. Here, as the second resin, it is preferable to use a resin having an elastic modulus lower than that of the resin forming the resin layer 13a.

Next, as shown in FIG. 12, an external connection terminal 17 made of, for example, lead-free solder is provided in the opening on the second resin layer 16 where the second conductive layer 15 is exposed.
Thereafter, a third resin is applied between the external connection terminals 17 and the second resin layer 16 so that at least the upper part of the external connection terminals 17 is exposed as shown in FIG. The third resin layer 19 is formed so as to cover the base of the external connection terminal 17, and the wafer level CSP semiconductor device in this embodiment is obtained. Here, as the third resin, it is preferable to use a resin having a lower elastic modulus than the second resin.

In such a manufacturing method, similarly to the above-described embodiment, after the second conductive layer 15 is formed corresponding to the pattern of the protrusions 13, the resin layer 13a is formed by simply performing a heat treatment. Since the protrusions 13 are selectively contracted to form the protrusions 13, the patterning of the protrusions 13 becomes unnecessary, and therefore, the manufacturing process can be simplified such that a photomask used for the patterning is unnecessary. Thereby, manufacturing cost can be reduced.
In addition, since the external connection terminal 17 is provided in the opening of the second resin layer 16, the external connection terminal 17 is better connected to the second conductive layer 15 exposed in the opening, and therefore connection reliability is improved. In particular, the technology of the protruding electrode 18 of the present invention can be applied well to the wafer level CSP.

Further, if a resin having a higher elastic modulus than that of the second resin is used as the resin forming the protrusion 13, the second resin layer 16 is more easily elastically deformed than the protrusion 13. When the external connection terminal 17 on 13 is connected to another terminal during mounting, the protrusion 13 exhibits good stress relaxation properties due to its elasticity. Therefore, in the obtained semiconductor device, connection failure is prevented and connection reliability is improved.
Further, after the external connection terminal 17 is formed, the third resin layer 19 covers the space between the external connection terminal 17 and the second resin layer 16 with at least the upper portion of the external connection terminal 17 exposed. Therefore, the connection of the external connection terminal 17 to the opening of the second resin layer 16 can be reinforced by the third resin layer 19, and thus the connection reliability of the external connection terminal 17 can be improved.
Further, if the second resin having a higher elastic modulus than the third resin is used, the third resin layer 19 is more easily elastically deformed than the second resin layer 16, and thus the external connection terminal 17. When the second resin layer 16 is connected to another terminal during mounting, the second resin layer 16 exhibits good stress relaxation properties due to its elasticity. Therefore, in the obtained semiconductor device, connection failure is prevented and connection reliability is improved.

  FIG. 14 is a perspective view showing a schematic configuration of a liquid crystal display device as an embodiment of the circuit board and the electro-optical device of the invention. The liquid crystal display device shown in FIG. 14 includes a color liquid crystal panel 51 as an electro-optical panel, and a COF (Chip On Film) type circuit board 100 connected to the liquid crystal panel 51. The circuit board 100 includes the semiconductor device 101 manufactured by the semiconductor device manufacturing method. Based on such a configuration, the circuit board 100 is an embodiment of the circuit board of the present invention, and the liquid crystal display device is an embodiment of the electro-optical device of the present invention. In the liquid crystal display device, an illumination device such as a backlight and other incidental devices are attached to the liquid crystal panel 51 as necessary. Further, the circuit board 100 is not limited to the COF type, and a COB (Chip On Board) type can also be used.

In addition to the COF type and the COB type, the present invention is also applicable to a COG (Chip On Glass) type electro-optical device in which a driver IC or the like is mounted directly on a display panel (liquid crystal panel). Is possible. FIG. 15 shows an example of a COG type liquid crystal display device.
In this figure, a liquid crystal display device 50 as an electro-optical device includes a frame-shaped shield case 68 made of a metal plate, a liquid crystal panel 52 as an electro-optical panel, a liquid crystal driving LSI 58, a liquid crystal panel 52, and a liquid crystal driving device. ACF (Anisotropic Conductive Film) or NCF (Non Conductive Film) (not shown) for electrically connecting the bumps formed on the active surface of the LSI 58 to each other by the COG mounting method, and the overall strength And a holding member 172 for maintaining the temperature.

  The liquid crystal panel 52 includes a first substrate 53 made of soda glass having a thickness of 0.7 mm provided with a first transparent electrode layer on one surface, and a thickness of 0.7 mm provided with a second transparent electrode layer on one surface. The second substrate 54 made of soda glass is bonded so that the first transparent electrode layer and the second transparent electrode layer face each other, and the liquid crystal composition is sealed between these substrates. Is formed. Then, the liquid crystal driving LSI 58 is electrically connected directly to one substrate 54 by the COG ACF or NCF, and the COG type liquid crystal panel 52 is thus formed. Here, the liquid crystal driving LSI 58 is manufactured by the manufacturing method of the semiconductor device.

  In addition to the liquid crystal display device, the electro-optical device can be used for an organic EL display device, for example. FIG. 16 is a cross-sectional view of an organic EL panel provided in an organic EL display device as an electro-optical device according to the present invention. The organic EL panel (electro-optical panel) 30 is generally configured by forming TFTs (Thin Film Transistors) 32 in a matrix on a substrate 31 and further forming a plurality of stacked bodies 33 thereon. The TFT 32 has a source electrode, a gate electrode, and a drain electrode, and the gate electrode and the source electrode are electrically connected to, for example, one of the protruding electrodes 8 shown in FIG. The laminated body 33 includes an anode layer 34, a hole injection layer 35, a light emitting layer 36, and a cathode layer 37. The anode layer 34 is connected to the drain electrode of the TFT 32, and current is supplied to the anode layer 34 via the source electrode and the drain electrode of the TFT 32 when the TFT 32 is in the ON state.

  In the organic EL panel 30 configured as described above, holes injected from the anode layer 34 into the light emitting layer 36 through the hole injection layer 35 and electrons injected from the cathode layer 37 into the light emitting layer 36 are generated. Light generated by recombination in the light emitting layer 36 is emitted from the substrate 31 side.

  Next, an electronic apparatus in which the electro-optical device according to this embodiment is mounted will be described. The above-described liquid crystal display device as an electro-optical device, a motherboard provided with a CPU (Central Processing Unit), a keyboard, a hard disk, and other electronic components are incorporated into the housing, for example, a notebook personal computer shown in FIG. 60 (electronic equipment) is manufactured.

  FIG. 17 is an external view showing a notebook computer as an electronic apparatus according to an embodiment of the present invention. In FIG. 17, 61 is a housing, 62 is a liquid crystal display device (electro-optical device), and 63 is a keyboard. Note that FIG. 17 shows a notebook computer provided with a liquid crystal display device, but an organic EL display device may be provided instead of the liquid crystal display device.

  In the above-described embodiment, a notebook computer has been described as an example of an electronic device. However, the present invention is not limited to this, and is not limited thereto. It can be applied to electronic devices such as pagers, word processors, televisions, viewfinder type or monitor direct-view type video tape recorders, electronic notebooks, electronic desk calculators, car navigation devices, POS terminals, and devices equipped with touch panels. .

The semiconductor device and the manufacturing method thereof, the electro-optical device, and the electronic apparatus according to the embodiment of the present invention have been described above. However, the present invention is not limited to the above-described embodiment, and can be freely changed within the scope of the present invention. Is possible.
For example, the “semiconductor chip” or “semiconductor element” in the above-described embodiment can be replaced with “electronic element” to manufacture an electronic component. Examples of electronic components manufactured using such electronic elements include optical elements, resistors, capacitors, coils, oscillators, filters, temperature sensors, thermistors, varistors, volumes, and fuses.

(A)-(c) is a schematic block diagram of the semiconductor device based on this invention. (A)-(c) is a manufacturing-process figure of the semiconductor device shown in FIG. (A)-(c) is a manufacturing-process figure of the semiconductor device shown in FIG. (A)-(c) is a manufacturing-process figure of the semiconductor device shown in FIG. (A)-(c) is a manufacturing-process figure of the semiconductor device shown in FIG. (A)-(c) is a manufacturing-process figure of the semiconductor device shown in FIG. (A)-(c) is a manufacturing-process figure of the semiconductor device shown in FIG. 1 is a schematic configuration diagram of a semiconductor device according to the present invention. FIG. 9 is a manufacturing process diagram of the semiconductor device shown in FIG. 8. FIG. 9 is a manufacturing process diagram of the semiconductor device shown in FIG. 8. FIG. 9 is a manufacturing process diagram of the semiconductor device shown in FIG. 8. FIG. 9 is a manufacturing process diagram of the semiconductor device shown in FIG. 8. FIG. 9 is a manufacturing process diagram of the semiconductor device shown in FIG. 8. 1 is a perspective view showing a schematic configuration of a liquid crystal display device according to the present invention. It is a disassembled perspective view which shows an example of a COG type liquid crystal display device. It is sectional drawing of the organic electroluminescent panel which concerns on this invention. It is an external view which shows the electronic device of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Substrate (semiconductor substrate), 2, 11 ... Al electrode (electrode), 4, 13 ... Projection body,
4a, 13a ... resin layer, 5, 14 ... first conductive layer, 6, 15 ... second conductive layer,
8, 18 ... Projection electrode (conductive layer), 16 ... Second resin layer, 17 ... External connection terminal,
19 ... 3rd resin layer, 30 ... Organic EL panel (electro-optical panel),
60 ... Personal computer (electronic device), 62 ... Liquid crystal display device (electro-optical device),
DESCRIPTION OF SYMBOLS 100 ... Circuit board, 101 ... Semiconductor device

Claims (11)

Manufacture of a semiconductor device having an electrode, a protrusion protruding from the electrode and formed in a predetermined pattern with a resin, and a conductive layer electrically connected to the electrode and reaching the upper surface of the protrusion A method,
Forming the resin layer by avoiding the electrodes in the semiconductor device;
Forming a first conductive layer on the electrode and the resin layer;
Forming a second conductive layer on the first conductive layer in a pattern corresponding to the predetermined pattern of the protrusions;
Heat treatment is performed to shrink the portion of the resin layer that is not covered by the second conductive layer, and the portion covered by the second conductive layer is relatively projected to form the protrusion and And a process of
Removing the first conductive layer in a portion not covered with the second conductive layer after the heat treatment;
A method for manufacturing a semiconductor device, comprising:   The method for manufacturing a semiconductor device according to claim 1, wherein the heat treatment is performed at a temperature equal to or higher than a glass transition temperature of the resin.   3. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of applying an antioxidant on the first conductive layer before the step of performing the heat treatment. After the step of removing the first conductive layer, a second resin layer is formed on the semiconductor device, and the second resin layer is formed on the second conductive layer on the protrusion. Patterning into a shape having an opening that exposes a location;
A step of providing an external connection terminal in an opening where the second conductive layer is exposed on the pattern made of the second resin layer;
The method for manufacturing a semiconductor device according to claim 1, wherein:   The method of manufacturing a semiconductor device according to claim 4, wherein the resin forming the protrusion has a higher elastic modulus than the second resin.   After the step of forming the external connection terminal, a step of covering a space between the external connection terminal and the second resin layer with a third resin layer in a state where at least an upper portion of the external connection terminal is exposed 6. The method of manufacturing a semiconductor device according to claim 4, wherein the semiconductor device is manufactured.   The method of manufacturing a semiconductor device according to claim 6, wherein the second resin has a higher elastic modulus than the third resin.   A semiconductor device manufactured using the method for manufacturing a semiconductor device according to claim 1.   A circuit board on which the semiconductor device according to claim 8 is mounted.   An electro-optical device comprising the semiconductor device according to claim 8 or the circuit board according to claim 9 mounted thereon.   An electronic apparatus comprising the circuit board according to claim 9 or the electro-optical device according to claim 10.

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