JP3905709B2 - Defect inspection apparatus and semiconductor device manufacturing method using the apparatus - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a defect inspection apparatus for inspecting defects on a wafer of a semiconductor device using an electron beam, and a semiconductor device manufacturing method using the apparatus.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, in a semiconductor device manufacturing process, when a fine pattern defect or the like on a processed wafer is inspected using an electron beam apparatus, an electron beam emitted from an electron gun, that is, a charged particle beam is narrowed down, The wafer surface is scanned with, and image data of the wafer surface is created based on the secondary electron beam generated thereby, and the image data is compared with the standard pattern image data to inspect defects such as scratches. Yes.
The defects include not only scratches but also the precision of fine patterns drawn on a resist-coated wafer and the precision of masks. For example, line width defects can be inspected by measuring the line width of a fine pattern based on image data obtained by a similar method.
Further, the image data obtained in this way can be displayed on the SEM monitor, and defect review, that is, inspection of defects by the human eye can be performed.
[0003]
As one of such defect inspection apparatuses using an electron beam, a mapping projection type defect inspection apparatus using a rectangular or elliptical beam having a diameter larger than the beam spot of the SEM is used.
This mapping projection type defect inspection apparatus once injects secondary electrons emitted from the wafer surface by irradiation of an electron beam from an electron gun to a micro channel plate (MCP), performs scintillation conversion by a fluorescent screen, Image data is obtained by projecting it onto a detector such as a CCD camera. Since this defect inspection apparatus can inspect the entire surface of the wafer with a smaller number of beam operations than the SEM method, it can satisfy the requirement of high throughput.
[0004]
FIG. 1 shows such a mapping projection type defect inspection apparatus. In FIG. 1, 1 is an electron gun that emits an electron beam, 2 is an electron beam from the electron gun 1, and 3 is a primary electrostatic lens. Reference numeral 4 denotes an EXB filter, and the electron gun 1, the primary electrostatic lens 3, and the EXB filter 4 constitute a primary electron optical system. Reference numeral 5 denotes a secondary electrostatic lens, 6 a secondary electron, 7 an MCP (micro channel plate), 8 a fluorescent plate, 9 a relay optical system, and 10 a CCD camera. The MCP 7, the fluorescent plate 8, the relay optical system 9, and the CCD camera 10 constitute a secondary electron optical system. The CCD camera 10 has a pixel size of 480 × 512, for example. 11 is a wafer to be inspected (sample wafer), 12 is an image data processing apparatus, and 13 is a display unit. The XY stage on which the wafer 11 is placed is not shown.
[0005]
In the defect inspection apparatus of FIG. 1, electrons emitted from the electron source 1 travel straight through the electrostatic lens 3 as an electron beam 2 by the accelerating electrode, and the cross-sectional shape is shaped into a rectangular or elliptical shape. The light penetrates and is deflected and irradiated onto the wafer 11. Then, secondary electrons 6 are emitted from the wafer 11, travel straight through the EXB filter 4, pass through the secondary electrostatic lens 5, and irradiate the MCP 7. The MCP 7 amplifies the secondary electrons 6, and the amplified secondary electrons are projected on the fluorescent plate 8. As a result, the secondary electrons 6 are converted into light and output as image data via the relay optical system 9 and the CCD camera 10. The image data obtained from the CCD camera 10 is displayed on the display unit 13 by obtaining a gradation for each pixel in the image data processing device 12.
[0006]
[Problems to be solved by the invention]
However, in the mapping projection type defect inspection apparatus described above, the MCP 7 used is formed as a perforated plate provided with a large number of holes for allowing secondary electrons to pass therethrough. Such a problem has arisen.
During the manufacturing process or use of the MCP 7 which is a perforated plate, defects such as crushing of the holes often occur. When the MCP 7 is crushed, the pixel at the corresponding position obtained by the CCD camera 10 has a lower floor. It becomes a furniture and appears as “black defect” in the image displayed on the display unit 13. Therefore, when the defect inspection algorithm is applied to the image data obtained by the CCD camera 10 in the image data processing unit 12, not only the true defect on the wafer but also the “black” which is a pseudo defect caused by the MCP. Since “defects” are also detected, it is necessary to distinguish between true defects and pseudo defects after application of the defect inspection algorithm.
In addition, if there is a true defect of the same level at the position of the pseudo defect, it is difficult to identify the defect, and the shape of the true defect can be accurately determined for a relatively large true defect. The reflected image cannot be obtained.
[0007]
The present invention has been made in view of such problems of the conventional example, and a first object thereof is obtained from a CCD camera or the like before applying a defect inspection algorithm in a defect inspection apparatus for a semiconductor device. In other words, it is possible to delete data on pseudo defects of “black flaws” by MCP from the obtained image data. A second object of the present invention is to provide a method of manufacturing a semiconductor device while inspecting the semiconductor device in the middle of the process using the defect inspection apparatus that achieves the first object.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, a rectangular or elliptical electron beam is irradiated onto a sample wafer of a semiconductor device, and secondary electrons emitted from the sample wafer are irradiated with a micro channel plate (MCP). In the defect inspection apparatus for detecting the defect of the sample wafer from the image data, the light is detected as image data by a CCD camera, and is converted into light by colliding with the fluorescent plate.
It is characterized by comprising calibration means for calibrating the gradation of one or a plurality of pixels at the black flaw position in the image data of the sample wafer using the gradations of the plurality of pixels adjacent to the pixel.
[0009]
In the defect inspection apparatus described above, in order to specify the pixel at the black flaw position to be calibrated by the calibration means, the defect inspection apparatus further performs black defect inspection having a mirror-polished surface without using the calibration means in the defect inspection apparatus. And a storage unit for storing the position of the obtained defective pixel as a black defect position. Further, as another method for specifying the pixel at the black flaw position, the defect inspection apparatus further includes a mirror polishing surface in the defect inspection apparatus for two black flaw inspections having different secondary electron emission coefficients. Means for controlling to obtain image data of the wafer, means for obtaining a difference in gradation between the two obtained image data, and storage means for storing the position of the pixel having the smallest difference as a black defect position. .
Further, in the defect inspection apparatus described above, when the black defect has a size of MxN pixels (M and N are arbitrary positive integers), the adjacent pixel size used for calibration is preferably MxN.
[0010]
The present invention further provides a semiconductor device manufacturing method including a step of evaluating a wafer during or after processing using the above-described defect inspection apparatus.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
The defect inspection apparatus of the present invention is an improvement of the image data processing apparatus 12 in the mapping projection type defect inspection apparatus shown in FIG. 1, and FIG. 2 shows the improved image data processing apparatus. . In FIG. 2, 20 is a first storage unit, 30 is an image data calibration unit, 40 is a defect extraction unit that executes a defect inspection algorithm, 50 is a second storage unit, and 60 controls the overall operation of the image data processing apparatus 12. It is a control unit.
The first storage unit 20 includes a first region that stores image data from the CCD camera 10 and a second region that stores a defect image obtained by the defect extraction unit 40. The second storage unit stores the image data obtained by the defect extraction unit 40, and the image data is supplied to the display unit 13 and displayed.
[0012]
A method for identifying a “black defect” caused by crushing a hole on the MCP 7 and detecting a true defect will be described below with reference to FIG.
First, in step S1, a wafer having a mirror-polished surface having no defect is placed on an XY stage (not shown) as a “black defect inspection wafer”, and the electron beam 2 is emitted from the electron gun 1 as described above. Irradiation onto the wafer is performed, image data is obtained from the CCD camera 10 from the secondary electrons 6, and the image data is stored in the first area of the first storage unit 20 of the image data processing device 12. In step S <b> 2, the defect extraction unit 40 applies a defect detection algorithm to the image data, extracts defective pixels, and stores the position data of the defective pixels in the second area of the first storage unit 20.
At this time, since the black flaw inspection wafer has a mirror-polished surface, the low-gradation pixels included in the image data correspond to “black flaws”, that is, portions where the holes of the MCP 7 are crushed. The position data of the defective pixel obtained from the defect extraction unit 40 represents the position of the black defect.
[0013]
Next, in step S <b> 3, the sample wafer to be actually inspected is placed on the XY stage, image data is acquired in the same manner, and stored in the first storage area of the first storage unit 20. Thereafter, the process proceeds to step S4, where the pixel data calibration unit 30 reads the image data and the black defect position data from the first area and the second area of the first storage unit 20, and based on the black defect position data, the sample wafer Image data is calibrated. This calibration is executed, for example, by performing an averaging process using image data of a plurality of pixels adjacent to the pixel at the black defect position.
That is, the gradation of the pixel in the i row and j column in the inspection area of the wafer is represented by D (i, j), and the pixel at the black defect position is a single pixel (as shown in FIG. 4A). I, J), the four pixels (I-1, J), (I, J-1), (I, J + 1), (I + 1, J) on the left and right and upper and lower sides of the pixel (I, J). ) Is calculated for the gradation of pixel (I, J).
D (I, J) = 1/4. [D (I-1, J) + D (I, J-1) + D (I, J + 1) + D (I + 1, J)]
[0014]
On the other hand, as shown in FIG. 4B, in the case where the pixels at the black defect position are a plurality of continuous pixels (in the figure, the defect size of the black defect is 2 × 3 pixels), FIG. As shown in Fig. 4, the average of four areas on the left, right, and top and bottom surrounding the plurality of pixels and having the same size (array) as the plurality of pixels at the black defect position is calculated, and the average value is calculated as black. It is set as the gradation of each of the plurality of pixels at the flaw position.
In FIG. 4A, the averaging is obtained without considering the two pixels at the upper and lower sides of the pixel at the black defect position, but a total of eight pixels including these four pixels are obtained. An average of pixel gradations may be obtained to obtain the gradation of the pixel at the black defect position. Similarly, in the case where there are a plurality of pixels at the black flaw position shown in FIG. 4B, an addition average of a total of eight areas may be obtained. In this case, it is preferable that the pixels that are farther away from the pixel at the black defect position are weighted with a smaller coefficient and then added and averaged.
A weighted average may be used instead of the addition average.
[0015]
Further, instead of detecting the black flaw position as described above, image data is obtained separately from two black flaw inspection wafers having a mirror-polished surface and having different secondary electron emission coefficients. It is also possible to obtain the difference between the gray levels and to set the position of the pixel having substantially zero difference as the black defect position.
That is, only by detecting the gradation of the image data from one black flaw inspection wafer having a mirror-polished surface, when dust or the like adheres to the wafer, the fact that the gradation is low is due to the adhesion of dust or It cannot be determined whether the defect is black due to crushing of the hole of MCP7. Further, if two black defect inspection wafers having the same secondary electron emission coefficient are used, the difference in gradation of pixels that are not at the black defect position is almost zero when the difference between the obtained image data is taken. Become. Therefore, as described above, if two inspection wafers having different secondary electron emission coefficients are used and the gradation difference of the image data obtained from these wafers is taken, only the pixel position where the hole of the MCP 7 is crushed is obtained. Therefore, the black defect position can be specified.
[0016]
Proceeding from step S4 to step S5, the defect extraction unit 40 applies a defect detection algorithm to the image data calibrated by the image data calibration unit 30, and performs defect extraction. In step S6, the image after the defect extraction process is supplied to the display unit 13, whereby an image of the surface of the sample wafer is displayed.
Therefore, the image data calibration unit 30 calibrates the gradation of the pixel at the black defect position with the gradation of the surrounding pixels in the image data of the wafer as the sample, so that the MCP 7 has a collapsed or clogged hole. Also, true defects on the wafer can be detected.
Note that such processing steps in the image data processing device 12 are executed under the control of the control unit 60.
[0017]
An actual machine test was performed using the defect inspection apparatus of the present invention. In this actual machine test, first, image data obtained from the wafer for black defect inspection on the mirror-polished surface is input to the defect extraction unit 40 without going through the image data calibration unit 30, and the extraction unit 40 detects the position of the black defect. I got the information. As a result, 20 black scratches having a 1 × 1 pixel size and 3 black scratches having a 2 × 2 pixel size were detected together with the positions of the respective black scratches.
Next, image data was obtained in the same manner from the DRAM wafer to be defect-inspected, and the obtained image data was processed in the image data calibration unit 30, and then defect extraction was performed in the defect extraction unit 40. The tested DRAM wafer actually had 14 defects, which are true defects such as pattern mistakes, particles, process defects, etc., but actual test using the defect inspection apparatus of the present invention. Then, twelve defects were detected, and one pseudo defect related to the contrast abnormality at the wafer pattern edge was also detected.
[0018]
Further, for the same DRAM wafer, an actual machine test for defect inspection was performed by a conventional method without black defect inspection. In this test, 10 true defects and 25 pseudo defects were extracted.
Therefore, according to the defect inspection apparatus of the present invention, it can be understood that the detection accuracy of the true defect is greatly improved as compared with the conventional example. Further, with respect to the shape of the true defect existing on the black defect, in the actual machine test using the apparatus of the present invention, a shape approximated by the true defect shape was obtained as compared with the case of the conventional example.
[0019]
Next, the semiconductor device manufacturing method of the present invention will be described. The semiconductor device manufacturing method of the present invention is performed using the defect inspection apparatus described in relation to FIGS. 1 to 4. Before describing the method, a general semiconductor device manufacturing method is described below. This will be described with reference to the flowcharts of FIGS.
As shown in FIG. 5, the semiconductor device manufacturing method is roughly divided into a wafer manufacturing step S11 for manufacturing a wafer, a wafer processing step S12 for performing processing necessary for the wafer, and a mask required for exposure. A mask manufacturing process S13, a chip assembling process S14 for cutting out chips formed on the wafer one by one and making them operable, and a chip inspection process S15 for inspecting a completed chip. Each of these steps includes several sub-steps.
[0020]
Among the processes described above, a process that has a decisive influence on the manufacture of a semiconductor device is a wafer processing process. This is because, in this process, the designed circuit pattern is formed on the wafer and a large number of chips that operate as a memory or MPU are formed.
Sub-processes of the wafer processing process that affect the manufacturing of semiconductor devices in this way will be described below.
[0021]
First, a dielectric thin film that forms an insulating layer is formed, and a metal thin film that forms a wiring portion and an electrode portion is formed. Thin film formation is performed by CVD, sputtering, or the like. Next, the formed dielectric thin film and metal thin film and the wafer substrate are oxidized, and a resist pattern is formed in the lithography process using the mask or reticle created in the mask manufacturing process S13. Then, the substrate is processed according to the resist pattern by dry etching technique or the like, and ions and impurities are implanted. Thereafter, the resist layer is peeled off and the wafer is inspected.
Such a wafer processing process is repeated for the required number of layers, and a wafer before being separated for each chip in the chip assembly process S14 is formed.
[0022]
FIG. 6 is a flowchart showing a lithography process which is a sub-process of the wafer processing process of FIG. As shown in FIG. 5, the lithography process includes a resist coating process S21, an exposure process S22, a developing process S23, and an annealing process S24.
In the resist coating step S21, a resist is coated on the wafer on which the circuit pattern is formed by using CVD or sputtering, and in the exposure step S22, the coated resist is exposed. Then, in the developing step S23, the exposed resist is developed to obtain a resist pattern, and in the annealing step S24, the developed resist pattern is annealed and stabilized. These steps S21 to S24 are repeated for the required number of layers.
[0023]
In the semiconductor device manufacturing method of the present invention, the defect inspection apparatus of the above-described embodiment is disposed in the vicinity of a processing apparatus related to semiconductor device manufacturing such as a wafer processing process, and the time required for the evaluation is Is controlled so as to be substantially equal to the processing time per wafer. As long as the processing apparatus which arrange | positions a defect inspection apparatus performs the process which requires the evaluation of a defect, arbitrary processing apparatuses may be sufficient as it.
[0024]
Since the present invention is configured as described above, in a mapping projection type defect inspection apparatus using a rectangular or elliptical electron beam and using an MCP for multiplying secondary electrons, an MCP hole is provided. Thus, the influence of black flaws caused by crushing or clogging can be greatly reduced, and thus true defects on the sample wafer can be detected with high accuracy. Further, when the true defect is relatively large, its shape can be detected with high accuracy.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a basic configuration of a defect inspection apparatus.
FIG. 2 is a block diagram showing a configuration of an image data processing unit in the defect inspection apparatus of the present invention.
FIG. 3 is a flowchart showing a processing flow executed in the image data processing apparatus shown in FIG. 2;
FIG. 4 is an explanatory diagram for explaining an averaging process that is an example of a calibration process executed in the image data calibration unit shown in FIG. 2;
FIG. 5 is a flowchart of a method of manufacturing a semiconductor device by applying the defect inspection apparatus of the present invention.
6 is a flowchart showing a sub-process of the wafer processing process shown in FIG.

Claims (4)

Irradiate a rectangular or elliptical electron beam onto a sample wafer of a semiconductor device, multiply secondary electrons emitted from the sample wafer by a micro channel plate (MCP), and collide with a fluorescent plate to convert it into light. In the defect inspection apparatus for detecting the light as image data by a CCD camera and extracting the defect of the sample wafer from the image data,
Means for controlling to obtain image data of two black defect inspection wafers having a mirror polished surface and having different secondary electron emission coefficients;
Means for obtaining a difference between two obtained image data;
Storage means for storing the position of the pixel with the smallest difference as a black defect position;
Calibration means for calibrating the gradation of one or more pixels at a black flaw position in image data of a sample wafer using the gradations of a plurality of pixels adjacent to the pixel, and calibrating the image data of the sample wafer A defect inspection apparatus comprising: calibration means configured to specify a pixel to be determined by a position of a black defect stored in the storage means . A rectangular or elliptical electron beam is irradiated onto the sample wafer of a semiconductor device, secondary electrons emitted from the sample wafer are multiplied by a micro channel plate (MCP), and collide with a fluorescent plate to be converted into light. In the defect inspection apparatus for detecting the light as image data by a CCD camera and extracting the defect of the sample wafer from the image data,
Means for controlling to obtain image data of two black flaw inspection wafers having a mirror polished surface and having different secondary electron emission coefficients;
Means for obtaining a difference between two obtained image data;
Storage means for storing the position of a pixel with substantially zero difference as a black defect position;
Calibration means for calibrating the gradation of one or a plurality of pixels at a black flaw position in image data of a sample wafer using the gradations of a plurality of pixels adjacent to the pixel, and calibrating the image data of the sample wafer Calibration means configured to identify a pixel to be identified by a black defect position stored in the storage means;
A defect inspection apparatus comprising: 3. The defect inspection apparatus according to claim 1 , wherein when the black defect has a size of MxN pixels (M and N are arbitrary positive integers), the adjacent pixel size used for calibration is MxN. A defect inspection apparatus characterized by that. A semiconductor device manufacturing method comprising the step of evaluating a wafer during or after processing using the defect inspection apparatus according to any one of claims 1 to 3. Production method.

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