JP3863534B2 - Multilayer printed wiring board manufacturing method and multilayer printed wiring board - Google Patents

Description

  The present invention relates to a method for producing a multilayer printed wiring board and a multilayer printed wiring board.

  When realizing large-scale and high-speed computer systems, it is usually important to use small, high-speed, highly-integrated LSI chips, etc., and mount them on a wiring board with a structure suitable for high-speed operation. It becomes a difficult task. In particular, in recent years, attempts have been actively made to produce a wiring board capable of higher density mounting by increasing the number of layers and thinning the conductor pattern.

  As a wiring board having a conductor pattern over a plurality of layers, a multilayer wiring board (so-called multilayer printed wiring board) using a plastic substrate or the like as a main material is well known. At present, this type of multilayer printed wiring board is most popular because of its low cost.

  Further, the method of forming a conductor pattern on a multilayer printed wiring board can be roughly classified into two types, that is, a subtractive process (SubtractiveProcess) and an additive process (AdditiveProcess).

  The subtractive process is a manufacturing method in which a necessary conductor pattern is formed by using a copper-clad laminate as a material and etching a copper foil on the surface. On the other hand, the additive process is a manufacturing method in which a conductor pattern is formed on a necessary portion by using a substrate to which a copper foil is not attached and mainly by electroless plating.

Here, the conventional multilayer printed wiring board produced by either of the two processes will be specifically described based on each drawing together with the manufacturing process.
FIG. 12D shows a multilayer printed wiring board (six-layer board) 30 by a subtractive process. The multilayer printed wiring board 30 is manufactured through the following procedure.

  First, two copper clad laminates 31 for the outer layer and one copper clad laminate 32 for the inner layer are prepared. Next, after forming a via hole forming hole in the copper clad laminate 31 for the outer layer, electroless and electrolytic copper panel plating and inner layer pattern etching are performed. For the copper clad laminate 32 for the inner layer, only the inner layer pattern etching is performed without forming the via hole forming hole. Next, as shown in FIG. 12A, the outer layer copper clad laminate 31, the prepreg 33, the inner layer copper clad laminate 32, the prepreg 33, and the outer layer copper clad laminate 31 are stacked in this order. Press the stack. Next, as shown in FIG. 12B, a through hole forming hole 34 is formed by drilling or the like. Here, after performing electroless and electrolytic copper panel plating and through-hole plating, an etching resist 35 is formed on the outermost layer as shown in FIG. Finally, after performing the outer layer pattern etching, the etching resist 35 is peeled off.

  Through the above steps, the multilayer printed wiring board 30 in which the conductor patterns 38 of the respective layers are connected by the via holes 36 and the plated through holes 37 is manufactured. FIG. 13D shows a multilayer printed wiring board (six-layer board) 40 manufactured by an additive process. Unlike the multilayer printed wiring board 30 of FIG. 12, the multilayer printed wiring board 40 includes wiring layers 42 on both surfaces of a copper clad laminate 41. The production procedure is as follows.

  First, as shown in FIG. 13A, for example, a copper-clad laminate 41 prepared by a mass lamination method is prepared. Next, after performing inner layer pattern etching, an interlayer insulating layer 43 is formed on both surfaces using a photosensitive resin. Then, by performing exposure and development, a via hole forming hole 44 is formed in the interlayer insulating layer 43 as shown in FIG. Next, after roughening, penetration of through-hole forming holes 45 and application of catalyst nuclei, permanent resist 46 is formed on the outermost layer as shown in FIG. Finally, electroless copper pattern plating is performed to deposit copper plating on the inner wall surface of the through-hole forming hole 45 or the like. Through the above steps, the multilayer printed wiring board 40 in which the conductor patterns 49 and 49a of the respective layers are connected by the via hole 47 and the plated through hole 48 is manufactured.

  The conductor pattern 49a formed by the additive process is characterized by being highly accurate and fine. Therefore, it can be said that the multilayer printed wiring board 40 formed through this process is more suitable for higher density than that by the subtractive process.

  FIG. 14 also shows a multilayer printed wiring board (six-layer board) 50 similarly formed by an additive process. This multilayer printed wiring board 50 is also provided with wiring layers 52 on both sides of a copper clad laminate 51. However, there is a difference in that each wiring layer 52 is constituted by two interlayer insulating layers 53 and 54 and a plated through hole 55 is completely buried. The conductor patterns 58 and 59 of each layer are connected by via holes 56 and 57 and a plated through hole 55. In addition, the multilayer printed wiring board 50 is also characterized in that formation of through-hole forming holes and the like is not performed on the thick copper-clad laminate.

  That is, as is clear from the above configuration, the multilayer printed wiring board 50 can further promote overall thinning and refinement of the conductor patterns 58 and 59. Therefore, it is considered that the configuration of the type shown in FIG. 14 is most suitable for increasing the density and reducing the size.

However, the conventional multilayer printed wiring board 50 shown in FIG. 14 has the following problems.
As described above, the conductor patterns 58 and 59 of each layer of the multilayer printed wiring board 50 need to be electrically connected by the conductor. Here, based on FIG.14 and FIG.15, the mode of the connection by the via holes 56 and 57 and the plating through hole 55 is demonstrated.

  A circular connection pad 55 a is formed on a part of the land 55 b of the plated through hole 55. A via hole 56 belonging to the inner interlayer insulating layer 53 is connected on the connection pad 55a. The via hole 56 is connected to a connection pad 56 a formed on the interlayer insulating layer 53 on the inner layer side. A via hole 57 belonging to the outer interlayer insulating layer 54 is connected to the connection pad 56a. In other words, conventionally, it is required to arrange the connection pads 55a and 56a while avoiding the upper part of the plated through hole 55 and the upper part of the via hole 56 (that is, the position on the axis).

  However, if the arrangement is as described above, the area that can be used for the wiring of the conductor pattern 58 is relatively reduced, so that a reduction in the degree of freedom of wiring is inevitable. Therefore, the multilayer printed wiring board 50 cannot be sufficiently reduced in size and density.

  In the case of the multilayer printed wiring board 50 of FIG. 14, since the plated through hole 55 has a cavity 55c and the via hole 56 belonging to the interlayer insulating layer 53 on the inner layer side has a recess 56b, the outermost conductor pattern 59 is provided. There is a problem that unevenness is likely to occur. In this way, when the conductor formation accuracy is poor, if the conductor pattern 59 is a bonding pad, the wire bonding accuracy deteriorates due to the presence of irregularities. As a result, it becomes difficult to mount an LSI chip or a package on the multilayer printed wiring board 50.

Furthermore, in the printed wiring board 50 of FIG. 14, if the through hole or the bottomed hole is filled with a filler or the like, the following problem occurs.
That is, in the roughening treatment step carried out after the formation of the insulating layer, depending on the choice of the filler used, exposure to a roughening liquid (chromic acid, chromic sulfuric acid, permanganic acid, etc.) The resin will dissolve. For this reason, there exists a possibility that the connection reliability between a filler part and another metal part may worsen, for example. Also, the electroless plating step (strong alkali) performed after the roughening treatment step tends to adversely affect the filler when the step takes a long time. In this case, connection reliability is also deteriorated.

  The present invention has been made in view of the above circumstances, and its purpose is to improve connection flexibility by improving the degree of freedom of wiring, improving the formation accuracy of conductor patterns, and improving resistance to roughening and plating solutions. It is an object of the present invention to provide a multilayer printed wiring board manufacturing method and a multilayer printed wiring board capable of reliably improving the performance.

In order to solve the above-mentioned problem, in the invention according to claim 1, a step of filling a filler in a plated through hole formed so as to penetrate the base material, and a metal film is formed on the filler And a step of chemically roughing the insulating layer after performing a step of forming an insulating layer having an opening on the metal film, and a step of chemically roughening the insulating layer; wherein disposed on the axis of the plated through hole, forming an insulating layer after the roughening treatment by electroless copper plating the via hole connected the plated through hole and electrically through the metal layer, no The gist of the present invention is a method for producing a multilayer printed wiring board comprising: filling a via hole formed by electrolytic copper plating with a filler, and further forming a metal film on the filler. .

According to a second aspect of the present invention, in the first aspect, an outer layer-side insulating layer having an opening corresponding to the via hole is formed on the insulating layer, and the outer layer-side insulating layer is chemically formed. After performing the roughening step, after roughening the via hole on the outer layer side disposed on the metal film and on the axis of the via hole and electrically connected to the via hole through the metal film The present invention includes a step of forming the insulating layer on the outer layer side and a step of filling the via hole on the outer layer side with a filler .

According to a third aspect of the present invention, in the second aspect, by performing electroless plating, the outer via hole is filled with copper plating. In a fourth aspect of the present invention, a base material having a plated through hole filled with a filler, a metal film formed on the filler, and a via formed on the metal film by electroless copper plating. In the multilayer printed wiring board provided with an insulating layer having a hole, the via hole is disposed on the metal film and on the axis of the plated through hole, and is electrically connected to the plated through hole through the metal film The gist of the multilayer printed wiring board is that a via hole formed by electroless copper plating is filled with a filler, and a metal film is further formed on the filler. In the invention according to claim 5, a base material having a plated through hole filled with a filler, a metal film formed on the filler, and a via formed by electroless copper plating on the metal film. In a multilayer printed wiring board comprising a two-layer structure of an insulating layer on the inner layer side having holes and an insulating layer on the outer layer side, via holes on the inner layer side are formed on the metal film and on the axis of the plated through hole. Arranged on the wire, electrically connected to the plated through hole through the metal film, and filled in a via hole on the inner layer side formed by electroless copper plating , on the filler Further, a metal film is formed, and the via hole on the outer layer side is disposed on the metal film and on the axis of the via hole on the inner layer side, and is electrically connected to the via hole on the inner layer side through the metal film. The multilayer printed wiring board characterized by comprising may be filled with the electroless copper plating layer side of the via hole formed by being the gist thereof.

The gist of the invention described in claim 6 is that in claim 5, copper plating is filled in the via hole on the outer layer side by performing electroless plating .

  According to the first and sixth aspects of the invention, since the roughening treatment step and the plating step are performed in a state where the filler exposed from the plated through hole is protected by the metal film, the filler is roughened. There is no direct exposure to chemicals or plating solutions. Therefore, dissolution of the resin in the filler by the roughening solution or the plating solution is prevented.

  In addition, according to the present invention, the end surface of the plated through hole is flattened by filling the filler, so that the portion can be used as a connection pad. That is, it is possible to connect the bottom surface of the bottomed hole (hereinafter referred to as a via hole) substantially on the axis of the plated through hole. Then, the plated through hole side and the via hole side can be electrically connected via the metal film, and it is not necessary to arrange the connection pads so as to avoid the upper part of the plated through hole.

  Furthermore, according to the present invention, since the insulating layer is prevented from dropping due to the presence of the cavity portion of the plated through hole, the conductive pattern formed in the portion corresponding to the upper portion of the plated through hole is not uneven.

  According to the second aspect of the present invention, since the roughening treatment step and the plating step are performed in a state where the filler exposed from the via hole is protected by the metal film, the filler is the roughening solution or the plating solution. Is not directly exposed to. Therefore, dissolution of the resin in the filler by the roughening solution or the plating solution is prevented.

  In addition, according to the present invention, the end face of the via hole is flattened by filling the filler, so that the portion can be used as a connection pad. That is, it becomes possible to connect the bottom surface of another via hole substantially on the axis of the via hole. The via holes in the inner and outer layers can be electrically connected to each other through the metal film, and it is not necessary to arrange the connection pads so as to avoid the upper part of the via hole on the inner layer side.

  Furthermore, according to the present invention, since the falling of the insulating layer due to the presence of the cavity portion of the via hole on the lower layer side is prevented, the conductor pattern formed in the portion corresponding to the upper portion of the via hole does not have unevenness.

  As described above in detail, according to the inventions described in claims 1 to 6, the connection is improved by improving the degree of freedom of wiring, improving the formation accuracy of the conductor pattern, and improving the resistance to roughening and plating solutions. Reliability can be reliably improved. In particular, according to the invention described in claims 3 to 5, since it is possible to surely prevent dissolution without incurring a long manufacturing process, the cost is increased while further improving the connection reliability. Can be prevented.

[Example 1]
Hereinafter, Embodiment 1 in which the present invention is embodied in a method for producing a multilayer printed wiring board will be described in detail with reference to FIGS.

  FIG. 1 shows a multilayer printed wiring board 1. The multilayer printed wiring board 1 is a six-layer board including thin film wiring layers 3 on both surfaces of a base material 2. Conductive patterns 4 are formed on both surfaces of the substrate 2. These conductor patterns 4 are connected by a plated through hole 5 provided so as to penetrate the substrate 2. Note that the plated through hole 5 of this embodiment has circular lands 5c at both ends thereof.

  The copper plating layer 5b constituting the plating through hole 5 has a hollow portion 5a at the center thereof. Then, the hollow portion 5a is filled with a copper paste 7 as a conductive filler. Both end surfaces of the plated through hole 5 are flattened by being filled with a copper paste 7. A plating film 8 as a metal film is formed on both end faces of the flattened plated through hole 5. That is, the copper paste 7 exposed from the plated through hole 5 is covered with the plated film 8.

  In the multilayer printed wiring board 1 of the present embodiment, a wiring layer 3 having a two-layer structure of an interlayer insulating layer 9 on the inner layer side and an interlayer insulating layer 10 on the outer layer side is formed. A permanent resist 11 is formed on the surface of the interlayer insulating layer 9 on the inner layer side. A conductor pattern 12 is formed in a portion of the surface of the interlayer insulating layer 9 on the inner layer side where the permanent resist 11 is not formed. Similarly, a permanent resist 13 is formed on the surface of the outer interlayer insulating layer 10. A conductor pattern 14 is formed on a portion of the surface of the interlayer insulating layer 10 on the outer layer side where the permanent resist 13 is not formed. A part of the conductor pattern 14 serves as a connection pad for surface mounting an LSI chip or the like. Moreover, the surface of the interlayer insulating layer 10 on the outer layer side is covered with the solder resist 6 except for a part thereof. For convenience of explanation, the conductor pattern 14 is hereinafter referred to as the “outermost layer conductor pattern 14”. Similarly, the conductor pattern 12 is referred to as an “outer layer conductor pattern 12”, and the conductor pattern 4 is referred to as an “inner layer conductor pattern 4”.

  A via hole 15 for interlayer connection is formed in the interlayer insulating layer 9 on the inner layer side. Similarly, via holes 16 for interlayer connection are formed in the interlayer insulating layer 10 on the outer layer side. The copper plating layers 15b and 16b constituting the via holes 15 and 16 have recesses 15a and 16a at the center thereof. The recess 15a of the via hole 15 belonging to the inner interlayer insulating layer 9 is filled with a copper paste 7 which is a conductive filler.

  In the case of this multilayer printed wiring board 1, the bottom surface of the via hole 15 belonging to the inner interlayer insulating layer 9 is electrically connected to the copper paste 7 exposed from the end face of the plated through hole 5 through the plated film 8. Has been. Further, on the copper paste 7 filled in the recess 15 a of the via hole 15, the bottom surface of the via hole 16 belonging to the interlayer insulating layer 10 on the outer layer side is also electrically connected through the plating film 8. Therefore, the plated through hole 5 and the via holes 15 and 16 are in a state of being arranged substantially in a straight line. That is, in the multilayer printed wiring board 1, the copper paste 7 functions as a connection pad for the via holes 15 and 16.

Next, a procedure for manufacturing the multilayer printed wiring board 1 will be described with reference to FIGS.
First, a copper-clad laminate 17 made of a glass cloth base epoxy resin is prepared, and a through-hole forming hole 18 is formed through the copper-clad laminate 17. Next, panel plating and through-hole plating are performed according to a conventionally known method to deposit the copper plating layer 5 b in the through-hole forming hole 18. As a result, the plated through hole 5 is formed in the copper clad laminate 17 as shown in FIG. In this embodiment, the inner diameter of the through hole forming hole 18 is set to about 300 μm, and the diameter of the land 5c of the plated through hole 5 is set to about 700 μm.

  Next, a metal mask having holes at positions corresponding to the positions where the plated through holes 5 are formed is arranged on the copper clad laminate 17 in which the plated through holes 5 are formed. Then, by moving the squeegee, the copper paste 7 is filled into the cavity 5a of the plated through hole 5 as shown in FIG. In the present embodiment, a copper paste 7 is used in which a small amount of a solvent, a thixotropic agent, or the like is added to the copper powder and thermosetting resin as main components.

  Next, the filled copper paste 7 is dried, and the surface is leveled by buffing, and then a plating film 8 is formed on both surfaces of the copper-clad laminate 17 by thin panel plating. When filling the copper paste 7, it is preferable that the height of the exposed surface of the copper paste 7 after drying is substantially the same as the height of the land 5 c surface of the plated through hole 5.

  As a means for forming the plating film 8 which is a metal film, there are an electrolytic plating method and an electroless plating method. In this case, the thickness of the plating film 8 to be formed is preferably 1 μm to 7 μm, more preferably 3 μm to 6 μm, and particularly preferably 4 μm to 5 μm. If the plating film 8 is thick, the manufacturing time cannot be shortened and the cost may increase. On the other hand, if the plating film 8 is too thin, the copper paste 7 may not be reliably protected from the roughening solution or the soft etching process. In this embodiment, the plating film 8 made of copper having a thickness of 5 μm is formed by electrolytic copper plating.

  Next, after forming an etching resist on the surface of the plating film 8, pattern etching is performed. Then, as shown in FIG. 4, an inner layer conductor pattern 4 having a predetermined shape is formed. In this embodiment, the inner conductor pattern 4 is mainly used as a power supply layer or a ground layer.

  Next, a resin filler that is relatively easily soluble in the oxidizing agent is dispersed in both sides of the copper clad laminate 17 on which the inner conductor pattern 4 is formed, in a resin matrix that is relatively insoluble in the oxidizing agent. Apply the photosensitive epoxy additive additive adhesive. By performing exposure / development here, as shown in FIG. 5, an interlayer insulating layer 9 on the inner layer side having a via hole forming hole 19 as an opening is formed. At this time, the via hole forming hole 19 is provided corresponding to the end face of the plated through hole 5 filled with the copper paste 7.

  Next, a chemical roughening process is performed on the interlayer insulating layer 9 on the inner layer side using chromic acid as a roughening agent (oxidant). Then, catalyst nucleus provision, formation of permanent resist 11, plating pretreatment, and electroless copper pattern plating are performed.

  After the above plating treatment, the copper plating layer 15b is deposited on the inner wall surface of the via hole forming hole 19, the surface of the plating film 8 exposed from the via hole forming hole 19, or the like. Therefore, as shown in FIG. 6, a via hole 15 having an opening diameter of about 100 μm is formed in the interlayer insulating layer 9 on the inner layer side. In this embodiment, the deposition thickness of the copper plating layer 15b is set to about 25 μm. Of the via holes 15, those arranged on the axis of the plated through hole 5 are in a state where the bottom surface is connected to the end surface of the plated through hole 5. Also, an outer layer conductor pattern 12 is formed on the surface of the inner layer side interlayer insulating layer 9.

  Next, a metal mask having holes at positions corresponding to the positions where the via holes 15 are formed is disposed on the surface of the inner interlayer insulating layer 9 where the via holes 15 are formed. Then, by moving the squeegee, the recess 15a of the via hole 15 is filled with the copper paste 7 described above. As a result, the end surface on the opening side of the via hole 15 is flattened by filling with the copper paste 7. At this time, the height of the exposed surface of the copper paste 7 is preferably approximately the same as the height of the land surface of the via hole 15.

  Next, after the filled copper paste 7 is dried, a plating film as a metal film as shown in FIG. 7 is also formed on the copper paste 7 in the via hole 15 by the thin panel plating described above. 8 is formed. In this case, means for forming the plating film 8 includes an electrolytic plating method and an electroless plating method. The thickness of the plating film 8 to be formed is preferably 1 μm to 7 μm, more preferably 3 μm to 6 μm, and particularly preferably 4 μm to 5 μm. The reason is as described above. In this embodiment, the plating film 8 made of copper having a thickness of 5 μm is formed by electrolytic copper plating as in the case of the plated through hole 5.

  Next, the interlayer insulating layer 10 on the outer layer side is formed in accordance with the procedure for forming the interlayer insulating layer 9 on the inner layer side described above. At this time, by performing exposure and development, a via hole forming hole as an opening is provided corresponding to the end face of the via hole 15 filled with the copper paste 7. Subsequently, after performing chemical roughening treatment and catalyst nucleus application to the interlayer insulating layer 10 on the outer layer side, formation of the permanent resist 13, pre-plating treatment, and electroless copper pattern plating are performed. After the above plating treatment, the copper plating layer 16b is deposited on the inner wall surface of the via hole forming hole, the surface of the copper paste 7 in the recess 16a, and the like. Therefore, as shown in FIG. 8, a via hole 16 having an opening diameter of about 100 μm is formed in the interlayer insulating layer 10 on the outer layer side.

  Among the via holes 16, those arranged on the axis of the via hole 15 belonging to the inner interlayer insulating layer 9 are in a state where the bottom surface is connected to the end face of the via hole 15. An outermost conductor pattern 14 is formed on the surface of the outer interlayer insulating layer 10. Further, the outermost conductor pattern 14 is covered with the solder resist 6. In this embodiment, a liquid photo solder resist is used. On the other hand, the via hole 16 belonging to the outer interlayer insulating layer 10 is exposed from the solder resist 6. That is, in the multilayer printed wiring board 1, the via hole 16 is used as an external connection terminal for joining leads or bumps such as LSI chips.

Now, the operation and effect of the manufacturing method of the multilayer printed wiring board 1 of the present embodiment as described above will be described.
According to this manufacturing method, the copper paste 7 exposed from the end surfaces of the plated through hole 5 and the via hole 15 is protected in advance by the plating film 8 before performing the roughening process. And since a roughening process process is performed in this state, the copper paste 7 is not directly exposed to a roughening liquid. Therefore, dissolution of the resin in the copper paste 7 by the roughening liquid can be prevented. For this reason, unevenness etc. are reduced on the exposed surface of the copper paste 7, and the connection state between the copper paste 7 portion and the copper plating layers 15b and 16b formed thereon is reliably improved. As a result, the multilayer printed wiring board 1 having excellent connection reliability can be obtained.

  Moreover, in this manufacturing method, the electroless copper plating process for forming the via holes 15 and 16 is performed in the state protected previously by the plating film 8 as mentioned above. For this reason, even when the electroless copper plating process is performed over a long time of several hours, the copper paste 7 is not directly exposed to the plating solution, and the copper paste 7 is particularly adversely affected. Absent.

  Furthermore, according to this manufacturing method, since the end surface of the plated through hole 5 is flattened by filling the copper paste 7, that portion can be used as a connection pad. That is, it is possible to connect the bottom surface of the via hole 15 substantially on the axis of the plated through hole 5. Similarly, since the end surface of the via hole 15 is flattened by filling the copper paste 7, that portion can also be used as a connection pad. In other words, it is possible to connect the bottom surface of another via hole 16 substantially on the axis of the via hole 15.

  Then, the plated through hole 5 side, the via hole 15 side, and the via holes 15 and 16 side can be electrically connected to each other through the plated film 8. Therefore, it is not necessary to arrange the connection pads so as to avoid the upper part of the plated through hole 5 and the upper part of the via hole 15 on the inner layer side.

  As is clear from the above, in the case of the multilayer printed wiring board 1 of the present embodiment, the plated through holes 5 and the via holes 15 and 16 are arranged in a substantially straight line. Therefore, in this multilayer printed wiring board 1, the area that can be used for wiring of the conductor patterns 4, 12, and 14 is relatively larger than that of the conventional multilayer printed wiring board. In addition, as the wiring area increases, the degree of freedom in wiring is also greatly improved, so that the multilayer printed wiring board 1 can be sufficiently reduced in size and density. In addition, as a result of improving the degree of freedom in design, it is extremely convenient for fully automatic wiring. By realizing such a complete automation of the wiring, the design period can be shortened and the cost can be reduced.

  Furthermore, according to the present invention, it is possible to prevent the interlayer insulating layer 9 on the inner layer side from dropping due to the presence of the cavity 5 a of the plated through hole 5. For this reason, unevenness does not occur in the outer conductor pattern 12 formed in the upper portion of the plated through hole 5. Similarly, since the fall of the interlayer insulating layer 10 on the outer layer side due to the presence of the cavity portion of the via hole 15 on the inner layer side is prevented, the conductor pattern 14 on the outermost layer formed on the upper portion of the via hole 15 is uneven. Does not occur.

  As is clear from the above, the outer layer conductor pattern 12 and the outermost layer conductor pattern 14 formed substantially on the axial line of the plated through hole 5 and the via hole 15 are not uneven. Therefore, the multilayer printed wiring board 1 of the present embodiment has the conductor patterns 12 and 14 with extremely excellent dimensional accuracy. For this reason, even when a part of the outermost conductor pattern 14 is used as a bonding pad, wire bonding can be performed with high accuracy. In addition, the above configuration improves the flatness of the interlayer insulating layer 10 on the outer layer side, which is very convenient when surface mounting an IC chip, an LSI chip, or the like on the multilayer printed wiring board 1.

  In the case of this manufacturing method, since the plating film 8 made of copper having a thickness of 5 μm is used as a metal film, it is possible to reliably prevent dissolution without incurring a long manufacturing process. If the plating film 8 has such a thickness, the resin in the copper paste 7 is not dissolved in the plating process. Of course, the plating film 8 has an advantage that it is easy to form and low cost.

  Furthermore, in this embodiment, since the copper paste 7 containing copper powder as a main component is used as the filler, the filling operation does not take time. Therefore, it is advantageous in terms of manufacturing process and cost as compared with a conventional method of filling a filler by electroless plating (for example, a conventionally known method for forming filled vias). In particular, according to the filling method using the copper paste 7 as in the present embodiment, it is not always necessary to apply the adhesive twice or to surface the surface by polishing. For this reason, it is superior to the conventional method for forming filled vias.

  In the multilayer printed wiring board 1 of this embodiment, the plated through hole 5 is completely buried under the wiring layer 3. Therefore, unlike the conventional multilayer printed wiring board having the plated through hole 5 penetrating, there is an advantage that the sealing performance and the airtightness when the package is configured are improved. According to this configuration, it is sufficient to provide the through-hole forming hole 18 only in the copper clad laminate 17 serving as the substrate 2. Therefore, unlike the conventional multilayer printed wiring board that requires processing of not only the through hole forming hole 18 but also the via hole forming hole, the processing cost is reduced.

Further, according to the multilayer printed wiring board 1 of the present embodiment, as a result of the copper paste 7 being completely filled in the cavity 5 a of the plated through hole 5, no bubbles remain inside the plated through hole 5. Therefore, there is no risk of cracks due to the internal bubbles, and the heat resistance of the multilayer printed wiring board 1 is improved.
[Example 2]
FIG. 9 shows a multilayer printed wiring board 20 according to the second embodiment. The multilayer printed wiring board 20 is characterized in that the recess 16a of the via hole 16 in the multilayer printed wiring board 1 of the first embodiment is filled with the copper paste 7. Further, it is preferable to form a plating film 8 (not shown) as in the first embodiment. Therefore, in the multilayer printed wiring board 20 of the second embodiment, the end face on the opening side of the via hole 16 is almost flattened.

  With this configuration, for example, when the end surface on the opening side of the via hole 16 is used as a connection pad for surface mounting, it is easier to join leads and bumps such as LSI chips and packages than when the end surface is not flat. become. That is, since the recess 16a is eliminated from the end face on the opening side, wire bonding can be more easily performed. In addition, when connecting a lead etc. by soldering, there also exists an advantage that a solder supply amount may be small.

Example 3
FIG. 10 shows a multilayer printed wiring board 22 according to the third embodiment. The multilayer printed wiring board 22 is a six-layer board including the wiring layers 3 on both surfaces of the base material 2, similarly to the multilayer printed wiring board 1 of the first embodiment. However, the multilayer printed wiring board 22 has a difference in the configuration of the portion that is an outer layer than the interlayer insulating layer 9 on the inner layer side constituting the wiring layer 3. Therefore, here, the description will be focused on the configuration related to the differences, and the description of the configuration related to the common points will be omitted.

  As shown in FIG. 10, a via hole 23 different from the via hole 16 of the first embodiment is formed in the interlayer insulating layer 10 on the outer layer side. That is, the via hole 23 has a so-called mushroom-like copper plating layer (that is, a mushroom type bump) 25 in the via hole forming hole 24. Therefore, the via hole 23 does not have the concave portion 16a on the opening side and protrudes somewhat from the surface of the interlayer insulating layer 10 on the outer layer side.

  The multilayer printed wiring board 22 is characterized in that the outermost conductor pattern 14 is not formed on the surface of the outer interlayer insulating layer 10. Therefore, unlike the first and second embodiments, the multilayer printed wiring board 22 does not include the permanent resist 13 or the solder resist 6.

Here, a procedure for manufacturing the multilayer printed wiring board 22 of Example 3 will be described.
First, using the copper-clad laminate 17 as a starting material, the process up to the step of forming the via hole 15 belonging to the interlayer insulating layer 9 on the inner layer side is performed according to the method of the first embodiment. A plating film 8 made of copper having a thickness of 5 μm is formed on the end face of the via hole 15. Next, an interlayer insulating layer 10 on the outer layer side is formed by applying a photosensitive epoxy adhesive on the surface of the interlayer insulating layer 9 on the inner layer side. Next, by performing exposure and development, a via hole forming hole 24 as an opening is formed in the interlayer insulating layer 10 on the outer layer side. Subsequently, electroless plating is performed for a predetermined time using an electroless copper plating bath. Then, copper plating starts to deposit using only the plating film 8 exposed from the via hole forming hole 24 as a nucleus. Then, the via hole forming hole 24 is filled by copper plating, and finally a mushroom type bump 25 as shown in FIG. 10 is formed.

  Now, according to the multilayer printed wiring board 22 of Example 3, the end surface on the opening side of the via hole 23 which is an external connection terminal is in a state of protruding from the interlayer insulating layer 10 on the outer layer side. Accordingly, as in the case of the second embodiment, bonding of leads and bumps such as LSI chips and packages is further facilitated.

  In addition, when a package is configured using the multilayer printed wiring board 22, the package can be easily mounted on the mother board using the mushroom type bumps 25 as external connection terminals.

  Furthermore, according to the configuration of Example 3 in which the outermost conductor pattern 14 is not provided, the solder resist 6 and the permanent resist 13 can be omitted. For this reason, while being able to simplify the structure of the multilayer printed wiring board 22, the flat outer surface suitable for component mounting can be obtained. And when the above structures are taken, the whole outer surface of the multilayer printed wiring board 22 can be utilized as an area for surface mounting of components.

The filling method by electroless copper plating as described above has an advantage that the via hole forming holes 24 formed in the outer interlayer insulating layer 10 can be filled uniformly. As a result, the desired via hole 23 can be obtained relatively easily. According to this method, the copper plating layer 25 can be deposited using the plating film 8 as a nucleus. Therefore, there is an advantage that the catalyst nucleus for the first deposition of the electroless copper plating becomes unnecessary. Of course, also in this case, since the plating film 8 exists, dissolution of the resin in the copper paste 7 located therebelow is prevented.
Example 4
FIG. 11 shows a multilayer printed wiring board 27 according to the fourth embodiment.

  In the multilayer printed wiring board 27, as in the multilayer printed wiring board 20 of Example 2, the copper paste 7 is filled in the recess 16a of the via hole 16 belonging to the outer interlayer insulating layer 10. However, the multilayer printed wiring board 27 is different in that the outermost conductor pattern 14 and the solder resist 6 are not present, and the plated through hole 28 has no land.

  Accordingly, in the case of the third embodiment having the above-described configuration, there is an advantage that the wiring area on the base material 2 is increased by the amount of no land in the plated through hole 28. Therefore, a separate wiring layer can be formed on the substrate 2, which is extremely convenient for further promoting the downsizing and higher density of the multilayer printed wiring board 27. Moreover, according to this structure, since the pitch of the plated through holes 28 can be reduced, there is an advantage that overall compactness can be achieved.

Furthermore, according to the configuration of Example 4 in which the outermost conductor pattern 14 is not provided, the solder resist 6 can be omitted, so that the configuration can be simplified and a flat outer surface suitable for component mounting can be obtained. it can. And when the above structures are taken, the whole outer surface of the multilayer printed wiring board 22 can be utilized as an area for surface mounting of components.
Example 5
In Example 5, the multilayer printed wiring board 1 having substantially the same configuration as that of Example 1 is manufactured by a slightly different method. Here, the procedure of the different parts will be mainly described.

  First, in accordance with the manufacturing procedure of Example 1, as shown in FIG. 5, the process is carried out up to the step of forming the inner interlayer insulating layer 9 having the via hole forming hole 19 as an opening. Next, sputtering is performed without performing a roughening treatment. By this sputtering, a sputter film 8 as a metal film is formed on the entire surface of the interlayer insulating layer 9 on the inner layer side.

  In this case, the thickness of the sputtered film 8 to be formed is preferably 0.05 μm to 2.0 μm, particularly 0.1 μm to 1.0 μm. The reason is almost the same as that of the plating film 8. In the present embodiment, a sputtered film 8 made of copper having a thickness of 0.1 μm is formed.

  Next, a plating resist is formed on a predetermined portion of the sputtered film 8, and electrolytic copper plating is performed. Thereafter, after removing the plating resist, only unnecessary portions of the sputtered film 8 are removed by flash etching. Then, it becomes a structure close to FIG. 6 (that is, a structure in which the permanent resist 11 does not exist). Thereafter, the process is carried out until the final step according to the procedure of Example 1.

  Even with the manufacturing method of the fifth embodiment as described above, the same effects as those of the first embodiment can be obtained. That is, the provision of the sputtered film 8 prevents the copper paste 7 from being directly exposed to the plating solution. In particular, in the case of this manufacturing method, since the sputtered film 8 made of copper having a thickness of 0.1 μm is a metal film, it is possible to surely prevent dissolution without incurring a long manufacturing process. In addition, this method has an advantage that a normal roughening process is not required.

In addition, this invention is not limited only to the said Example, It can be changed into the following structures. For example,
(A) The filler for filling the cavity 5a and the recesses 15a and 16a is not limited to the copper paste 7. For example, a paste material containing tungsten, molybdenum, niobium, tantalum, gold, silver, or the like, that is, a conductive material containing a metal other than copper may be used. In this case, it is desirable to select a metal having a melting point equal to or higher than the melting point of the solder used in consideration of the convenience of soldering and the like. Moreover, when cost performance, electroconductivity, etc. are considered, it will be a result that the copper paste 7 like each Example is especially preferable.

  Further, as an alternative to filling with the copper paste 7 or the like, for example, a method of inserting a metal pin or plug or the like may be employed. Furthermore, when filling the cavity 5a of the plated through hole 5 with copper paste 7 or the like or the like, it is not always required to completely fill the cavity 5a. That is, it is sufficient that at least both ends of the plated through hole 5 are sealed.

  Furthermore, the filler is not necessarily limited to a conductive material. For example, a conventionally known non-conductive substance may be used, such as a resin for forming a solder resist or an interlayer insulating layer. In this case, the preferable range of the thickness of the metal film (plating film) 8 to be formed is 5 μm to 30 μm. This is because if the metal film 8 is too thin, there is a possibility that sufficient conduction cannot be secured. Moreover, if the metal film 8 is too thick, the plating process takes a long time, which may adversely affect the resin that is the filler.

  (B) The base material 2 is not limited to a double-sided board, and may be a multilayer board produced by, for example, a mass lamination method. Moreover, the base material 2 is not limited to the board | substrate which made resin the main material. As an alternative, for example, a material mainly made of copper, aluminum, iron or the like may be used. When this type of metal substrate is selected, a multilayer printed wiring board having excellent heat dissipation can be realized. For this reason, it is convenient when a large number of chips with a large amount of heat generation are mounted.

  (C) The adhesive for forming the inner insulating layers 9 and 10 on the inner layer side and the outer layer side is not necessarily a photosensitive epoxy, and may be replaced with, for example, a photosensitive polyimide. Further, as a means for forming the via hole forming hole 19 in the applied interlayer insulating layer, a method other than exposure / development such as laser light irradiation may be selected.

(D) In the case where the outermost conductor pattern 14 is not formed in the interlayer insulating layer 10 on the outer layer side, for example, a material without a resin filler can be used.
(E) Of course, the wiring layer 3 may be only on one side of the substrate 2. In addition, the wiring layer 3 can be configured to be further multilayered as necessary.

  (F) The via holes 15 and 16 do not necessarily have a substantially circular cross section as in the first and second embodiments. For example, the via holes 15 and 16 may have an elliptical cross section or a rectangular cross section. Further, the via holes 15 and 16 can be formed into a groove shape as a whole. As a method for forming the non-circular via hole as described above, a method using exposure / development of a photosensitive resin is extremely suitable.

  (G) For example, a conductor portion in which the plated through hole 5 and the via holes 15 and 16 are arranged substantially in a straight line is used as a heat radiation path for connecting a heat generating component on the mounting surface side and a heat sink on the non-mounting surface side. It is also possible to do. With such a configuration, since the heat generating component and the heat sink can be connected with a low thermal resistance and the shortest distance, there is an advantage that the heat radiation efficiency is increased.

  (H) After the copper paste 7 is filled in the recesses 15a and 16a of the via holes 15 and 16, the surface polishing is preferably performed. By performing such surface polishing, the end surfaces of the via holes 15 and 16 on the opening side can be made even more flat. The surface polishing is suitable when the copper paste 7 is filled without using a metal mask.

  (I) Instead of the via hole 23 provided with the mushroom type bump 25 as in the third embodiment, for example, a straight wall type bump may be provided. In this case, after electroless copper plating is performed in a state where a plating resist having a predetermined thickness is formed on the interlayer insulating layer 10 on the outer layer side, the plating resist may be peeled off.

  (J) As a metal for forming the plating film 8 or the sputtered film 8, for example, a metal other than copper such as gold, nickel, aluminum, or chromium may be used. However, among these metals, copper has a merit that it is relatively inexpensive and excellent in conductivity.

Here, in addition to the technical ideas described in the claims, the technical ideas grasped by the above-described embodiments and other examples are listed below together with the effects thereof.
(1) The multilayer printed wiring board obtained by the manufacturing method of Claims 1-3 . With this configuration, the pattern dimensional accuracy and reliability are excellent.

Next, technical terms used in this specification are defined as follows.
“Metal film: When the filler is a conductive material, a thin 1 μm to 7 μm copper plated film, nickel plated film, gold plated film, aluminum plated film, chromium plated film, etc. formed by electrolytic plating or electroless plating Various metal plating films, or various metal sputtered films such as very thin copper sputtered film of 0.05 μm to 2 μm, nickel sputtered film, gold sputtered film, aluminum sputtered film, chromium sputtered film, etc. In the case of a reactive substance, it means various metal plating films such as a copper plating film, a nickel plating film, a gold plating film, an aluminum plating film, and a chromium plating film of about 5 μm to 30 μm formed by electrolytic plating or electroless plating.

1 is a partially broken schematic sectional view showing a multilayer printed wiring board of Example 1. FIG. It is the partially broken schematic sectional drawing which shows the state which performed the panel plating to the copper clad laminated board similarly in the manufacturing process. It is a partially broken schematic sectional drawing which shows the state by which the copper paste was similarly filled in the cavity part of the plating through hole in the manufacturing process. It is the partially broken schematic sectional drawing which shows the state by which the plating film was similarly formed on the copper paste in the manufacturing process. Similarly, in the manufacturing process, it is a partially broken schematic sectional view showing a state in which an inner interlayer insulating layer having a via hole forming hole is formed. It is a partially broken schematic sectional drawing which shows the state which has arrange | positioned the permanent resist and electroless copper plating similarly in the manufacturing process. Similarly, in the manufacturing process, it is a partially broken schematic cross-sectional view showing a state in which a plating film is further formed on a copper paste filled in a recess of a via hole. Similarly, in the manufacturing process, it is a partially broken schematic cross-sectional view showing a state in which an outer interlayer insulating layer having a via hole is formed. 6 is a partially broken schematic cross-sectional view showing a multilayer printed wiring board of Example 2. FIG. 6 is a partially broken schematic cross-sectional view showing a multilayer printed wiring board of Example 3. FIG. It is a partially broken schematic sectional drawing which shows the multilayer printed wiring board of Example 4. (A)-(d) is a partially broken schematic sectional drawing which shows the manufacturing process of the conventional multilayer printed wiring board. (A)-(d) is a partially broken schematic sectional drawing which shows the manufacturing process of the conventional multilayer printed wiring board. It is a partially broken schematic sectional drawing which shows the conventional multilayer printed wiring board. It is a partial fracture expansion schematic plan view of the multilayer printed wiring board for demonstrating the conventional problem.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1,20,22,27 ... Multilayer printed wiring board, 2 ... Base material, 5,28 ... Plating through hole, 7 ... Copper paste as filler, 8 ... Plating film (or sputtered film) as metal film, 9 ... Interlayer insulating layer on the inner layer side as an insulating layer, 10... Interlayer insulating layer on the outer layer side as an insulating layer, 15, 16, 23... Bottomed hole (= via hole), 19, 24. Forming hole.

Claims (6)

A step of filling a filler in a plated through hole formed so as to penetrate the substrate, a step of forming a metal film on the filler, and an insulating layer having an opening on at least the metal film A step of chemically roughening the insulating layer, and a step of chemically roughing the insulating layer, the metal film and an axis of the plated through hole, and the metal film through the metal film. Forming a via hole electrically connected to the plated through hole in the insulating layer after the roughening treatment by electroless copper plating , filling the via hole formed by electroless copper plating with a filler, Forming a metal film on the filler, and a method for producing a multilayer printed wiring board. After performing a step of forming an insulating layer on the outer layer side having an opening corresponding to the via hole on the insulating layer, and a step of chemically roughening the insulating layer on the outer layer side, Forming a via hole on the outer layer side disposed on the axis of the via hole and electrically connected to the via hole through the metal film in an insulating layer on the outer layer side after the roughening treatment; and The method for manufacturing a multilayer printed wiring board according to claim 1, further comprising a step of filling a filler in the via hole on the side . 3. The method of manufacturing a multilayer printed wiring board according to claim 2, wherein the outer via hole is filled with copper plating by performing electroless plating . A substrate having a plated through hole filled with a filler, a metal film formed on the filler, and an insulating layer having a via hole formed by electroless copper plating on the metal film In multilayer printed wiring boards,
The via hole is disposed on the metal film and on the axis of the plated through hole, and is electrically connected to the plated through hole through the metal film . In the via hole formed by electroless copper plating , A multilayer printed wiring board comprising a filler and a metal film formed on the filler. A base material having a plated through hole filled with a filler, a metal film formed on the filler, an inner insulating layer having a via hole formed by electroless copper plating on the metal film, and In a multilayer printed wiring board provided with a wiring layer comprising a two-layer structure of an insulating layer on the outer layer side,
An inner layer side via hole is disposed on the metal film and on the axis of the plated through hole, and is electrically connected to the plated through hole via the metal film, and is formed by electroless copper plating. The via hole is filled with a filler, and a metal film is further formed on the filler,
The via hole on the outer layer side is disposed on the metal film and on the axis of the via hole on the inner layer side, electrically connected to the via hole on the inner layer side through the metal film, and formed by electroless copper plating A multilayer printed wiring board, wherein a filler is filled in a via hole on the outer layer side. 6. The multilayer printed wiring board according to claim 5, wherein the outer via hole is filled with copper plating by performing electroless plating .

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