JP3813016B2 - Differential conversion circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a differential conversion circuit that processes an input signal and converts it into a differential signal.
[0002]
[Prior art]
A differential conversion circuit that performs processing to remove the applied DC component and other predetermined processing such as filtering on the given analog input signal, and outputs the processed signal and its inverted signal There is. An example of such a differential conversion circuit is shown in FIG.
[0003]
The differential conversion circuit 9 includes a low-pass filter 11 including a coupling capacitor 10, an amplifier 11a and a buffer 11b, and a differential conversion amplifier 20. The coupling capacitor 10 and the low-pass filter 11 constitute a signal processing circuit 30. is doing. The signal processing circuit 30 is supplied with an input signal VIN to be processed and a reference voltage VREF from a reference voltage source (not shown), removes the direct current component of the input signal VIN by the coupling capacitor 10, and adds the reference voltage VREF thereto. As a result, a signal having an AC component of the input signal VIN and a DC component of the reference voltage VREF is generated. Further, only the signal having a predetermined frequency is transmitted and output as an intermediate signal VA.
[0004]
The differential conversion amplifier 20 is supplied with the output signal VA of the signal processing circuit 30 and the reference voltage VREF from the reference voltage source, and subtracts the signal VA from the difference signal obtained by subtracting the reference voltage VREF from the signal VA and the reference voltage VREF. A difference signal is generated, the two difference signals are amplified at a predetermined rate, and output as a non-inverted signal VOUT1 and an inverted signal VOUT2. The non-inverted signal VOUT1 and the inverted signal VOUT2 are differential signals having the same direction of vibration and the same amplitude.
[0005]
[Problems to be solved by the invention]
However, the reference voltage may carry noise generated by other circuits or noise flying from the outside. The noise of the reference voltage appears as noise of the output signal of the signal processing circuit, but the magnitude of the noise increases or decreases according to the processing in the signal processing circuit, and the signal and reference voltage supplied to the differential conversion circuit The noise is not always the same. Further, when a delay occurs in the signal processing circuit, the time when noise is input to the differential conversion circuit is shifted. For this reason, even if the process which takes the difference between both signals in the differential conversion circuit is performed, noise is not removed, and noise appears in both the non-inverted signal and the inverted signal.
[0006]
Further, when the signal processing circuit is complicated, interference may occur inside the signal processing circuit, and noise may be generated in the output signal of the signal processing circuit. Also at this time, noise occurs in the non-inverted signal and the inverted signal.
[0007]
Furthermore, it takes a certain amount of time for the signal processing circuit to start and stabilize, and it takes time for the DC component of the output signal to reach the reference voltage. In the meantime, there is a difference between the DC component of the signal applied to the differential conversion amplifier and the reference voltage, and since the difference changes, the non-inverted signal and the inverted signal cannot correctly represent the input signal. For this reason, the differential signal output from the differential conversion circuit cannot be used until the operation of the signal processing circuit is stabilized at least after the start of power supply or the end of the standby state.
[0008]
The present invention has been made in view of the above problems, and provides a differential conversion circuit that outputs a differential signal without noise and outputs a usable differential signal in a short time after the operation is started. Objective.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, a differential conversion circuit according to the present invention includes a first input terminal and a second input terminal, wherein a first input terminal signal is subtracted from a first input terminal signal. A difference signal; or a second difference signal obtained by subtracting the signal at the first input terminal from the signal at the second input terminal; and generating the first difference signal or the second difference signal at a predetermined rate. And a differential conversion amplifier that amplifies and outputs the signal, a process in which an input signal and a reference voltage are given, and the reference voltage is used as a DC component; and a filter unit including N (N ≧ 2) filter circuits. A signal processing circuit that applies an intermediate signal to the input signal by performing a predetermined process including a process of passing a frequency component of the input signal to the first input terminal, and the reference voltage to the first input terminal. A differential circuit having a transmission circuit for feeding to two input terminals In road, the transmission circuit has a structure consisting of any of omitting the number of filter circuits identical or equivalent circuit from one at the filter portion to the N-1.
[0010]
The circuit provided for passing the reference voltage supplied to the differential conversion amplifier is the same as or equivalent to a part of the signal processing circuit, and acts on the reference voltage in the same manner as the corresponding part. Accordingly, even if there is noise in the applied reference voltage, the noise will appear in both the intermediate signal and the reference voltage applied to the differential conversion amplifier, and as a result, the first and second difference signals Noise can be suppressed. In addition, the circuit interferes in the same way as the corresponding part of the signal processing circuit, and causes noise similar to the noise that the corresponding part brings to the intermediate signal to the reference voltage. Therefore, noise due to interference in the signal processing circuit is also difficult to appear in the first and second difference signals.
[0011]
Further, since the above circuit stabilizes over time in the same way as the signal processing circuit after the operation starts, the reference voltage applied to the differential conversion amplifier rises in the same manner as the DC component of the intermediate signal, and the signal processing circuit Even before stabilization, no difference occurs between the DC component of the intermediate signal and the reference voltage. Therefore, the first and second difference signals correctly represent the input signal immediately after the operation of the differential conversion circuit starts, and can be used early.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of a differential conversion circuit of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of the differential conversion circuit 1 of the first embodiment. The differential conversion circuit 1 includes a low-pass filter 11 including a coupling capacitor 10, an amplifier 11a and a buffer 11b, and a differential conversion amplifier 20. These have the same configuration as each element of the differential conversion circuit 9 shown in FIG. 6 and function similarly.
[0013]
That is, the signal processing circuit 30 including the coupling capacitor 10 and the low-pass filter 11 is supplied with the input signal VIN to be processed and the reference voltage VREF from a reference voltage source (not shown), and is applied with the direct current applied from the input signal VIN. After removing the components and adding the reference voltage VREF as a new DC component thereto, only the components of a predetermined frequency are transmitted to generate the intermediate signal VA. The differential conversion amplifier 20 generates a difference signal obtained by subtracting the reference voltage VREF from the signal VA and a difference signal obtained by subtracting the signal VA from the reference voltage VREF, and amplifies these difference signals at a predetermined rate. The non-inverted signal VOUT1 and the inverted signal VOUT2 are output.
[0014]
In addition, the differential conversion circuit 1 includes a circuit 11 ′ including an amplifier 11a ′ and a buffer 11b ′. The circuit 11 ′ forms a transmission circuit 31 for transmitting the reference voltage VREF from the reference voltage source to the differential conversion amplifier 20. The transmission circuit 31 is not supplied with the input signal VIN. The amplifier 11a ′ and the buffer 11b ′ are the same as the amplifier 11a and the buffer 11b, respectively. Therefore, the transmission circuit 31 acts on the reference voltage VREF in the same manner as the signal processing circuit 30.
[0015]
The output terminal of the buffer 11b ′ of the transmission circuit 31 is connected to the reference voltage input terminal of the differential conversion amplifier 20. The differential conversion amplifier 20 is supplied with the reference voltage VREF ′ after receiving the action of the transmission circuit 31. It is done. All processing of the differential conversion amplifier 20 including the inversion of the signal VA is performed based on the reference voltage VREF ′.
[0016]
When noise occurs in the reference voltage VREF supplied from the reference voltage source, the noise is input to both the signal processing circuit 30 and the transmission circuit 31. The noise of the reference voltage VREF appears as the noise of the signal VA output from the signal processing circuit 30, but substantially the same noise appears in the reference voltage VREF ′ output from the transmission circuit 31 at substantially the same time. These noises are canceled when the differential conversion amplifier 20 generates the difference signal, and no noise appears in either the non-inverted signal VOUT1 or the inverted signal VOUT2.
[0017]
Further, when interference occurs inside the signal processing circuit 30, the same interference also occurs in the transmission circuit 31 having the same configuration. Therefore, substantially the same noise as the noise of the signal VA generated by the interference of the signal processing circuit 30 appears in the reference voltage VREF ′ output from the transmission circuit 31 and both are input to the differential conversion amplifier 20. Therefore, the noise is canceled by the differential conversion amplifier 20, and no noise appears in either the non-inverted signal VOUT1 or the inverted signal VOUT2.
[0018]
After the supply of power to the differential conversion circuit 1 is started, it takes some time for the signal processing circuit 30 to operate stably. During this time, the DC component of the output signal VA of the signal processing circuit 30 is It gradually rises. Since the transmission circuit 31 has the same configuration as that of the signal processing circuit 30, it takes the same time until the operation is stabilized, and the reference voltage VREF ′ output from the voltage circuit 31 during that time is the same as the DC component of the signal VA. It will gradually rise.
[0019]
Therefore, the DC component of the signal VA and the reference voltage VREF ′ supplied to the differential conversion amplifier 20 are the same immediately after the supply of power to the differential conversion circuit 1 is started. As a result, the non-inverted signal VOUT1 and the inverted signal VOUT2 correctly represent the input signal VIN before the signal processing circuit 30 operates stably, and are used even before the operation of the signal processing circuit 30 is stabilized. be able to.
[0020]
The reason why the coupling circuit 10 is not provided in the transmission circuit 31 is that the input signal VIN to be processed is not given to the transmission circuit 31. The transmission circuit 31 may have the same configuration as the signal processing circuit 30, and the capacitor may not be connected to the signal line that supplies the input signal VIN.
[0021]
FIG. 2 shows the configuration of the differential conversion circuit 2 according to the second embodiment. The differential conversion circuit 2 of this embodiment includes a signal processing circuit 40 including a coupling capacitor 10 and a five-stage filter circuit, and a differential conversion amplifier 20. The signal processing circuit 40 receives an input signal VIN and a reference voltage VREF from a reference voltage source (not shown), removes a DC component from the input signal VIN, and adds a reference voltage VREF as a new DC component. Also, it functions as a band pass filter, and generates an intermediate signal VA by transmitting only frequency components in a predetermined band.
[0022]
The first-stage filter circuit includes an amplifier 12a and a buffer 12b, and the second-stage filter circuit includes an amplifier 13a, a buffer 13b, and a capacitor 13c. These form a band-pass filter portion 12. The third filter circuit includes an amplifier 14a, a buffer 14b, and a capacitor 14c, and forms a primary low-pass filter unit 14. The fourth stage filter circuit includes an amplifier 15a, a buffer 15b, and a capacitor 15c, and the fifth stage filter circuit includes an amplifier 16a, a buffer 16b, and a capacitor 16c. These form a secondary low-pass filter section 15.
[0023]
The differential conversion circuit 2 includes a circuit 41 having the same configuration as that obtained by removing the coupling capacitor 10 from the signal processing circuit 40. The circuit 41 is for transmitting the reference voltage VREF from the reference voltage source to the differential conversion amplifier 20, and does not receive the input signal VIN. The constituent elements of the transmission circuit 41 are represented by reference numerals obtained by adding prime (′) to the reference numerals of the corresponding constituent elements of the signal processing circuit 40. The transmission circuit 41 acts on the reference voltage VREF in the same manner as the signal processing circuit 40, and outputs the reference voltage VREF ′ after receiving the action. This reference voltage VREF ′ is applied to the reference voltage input terminal of the differential conversion amplifier 20.
[0024]
The differential conversion amplifier 20 performs all processes including inversion of the signal VA based on the reference voltage VREF ′. Therefore, even when the reference voltage VREF supplied from the reference voltage source varies or when interference occurs in the signal processing circuit 40, the differential conversion is performed in the same manner as the differential conversion circuit 1 of the first embodiment. Noise does not appear in the non-inverted signal VOUT1 and the inverted signal VOUT2 output from the circuit 2. Further, the non-inverted signal VOUT1 and the inverted signal VOUT2 can be used immediately after the operation starts.
[0025]
In the differential conversion circuits 1 and 2 of the above two embodiments, the same components as those of the signal processing circuits 30 and 40 are used as the components of the transmission circuits 31 and 41 that transmit the reference voltage to the differential conversion amplifier 20. Although used, the components of the transmission circuit are not necessarily the same as the components of the signal processing circuit as long as the characteristics are equivalent. Further, the transmission circuit does not have to be the same or equivalent to the entire signal processing circuit, and the transmission circuit may be composed of elements that are the same or equivalent to a part of the signal processing circuit.
[0026]
The configurations of the differential conversion circuits 3, 4, and 5 of the third, fourth, and fifth embodiments having only a part of the signal processing circuit as a transmission circuit are shown in FIGS. The signal processing circuit 40 of the differential conversion circuits 3, 4, and 5 is the same as that of the second embodiment.
[0027]
The transmission circuit 42 of the differential conversion circuit 3 includes the band-pass filter unit 12 of the signal processing circuit 40, that is, the same circuit 12 ′ as the first stage and second stage filter circuits, and the transmission circuit 43 of the differential conversion circuit 4. Consists of a second-order low-pass filter unit 15 of the signal processing circuit 40, that is, the same circuit 15 ′ as the fourth-stage and fifth-stage filter circuits. Further, the transmission circuit 44 of the differential conversion circuit 5 includes a circuit 16 ′ that is the same as the fifth-stage filter circuit that is the subsequent stage of the secondary low-pass filter unit 15 of the signal processing circuit 40.
[0028]
As described above, when the transmission circuits 42, 43, and 44 are configured by the same or equivalent elements as a part of the signal processing circuit 40, the noise between the non-inverted signal VOUT1 and the inverted signal VOUT2 output from the differential conversion amplifier 20 is changed. It cannot be removed to the same extent as the dynamic conversion circuits 1 and 2. However, the noise of the non-inverted signal VOUT1 and the inverted signal VOUT2 can be reduced as compared with the conventional differential conversion circuit, and the non-inverted signal VOUT1 and the inverted signal VOUT2 cannot be used after the operation is started. It can be shortened.
[0029]
As described above, when the reference voltage is applied to the differential conversion amplifier via the same or equivalent circuit as the whole or a part of the signal processing circuit, noise appears in the differential signal output from the differential conversion circuit. Can be prevented or suppressed. In a device equipped with such a differential conversion circuit, even when the operation of each part of the device is unstable when the power supply is started or when the operation is resumed from the standby state, the differential signal is stabilized quickly. The differential signal can be used early. In addition, it is not necessary to apply advanced interference prevention measures to the signal processing circuit.
[0030]
Note that which part of the signal processing circuit is provided as a transmission circuit is determined according to the scale and characteristics of the signal processing circuit. When the signal processing circuit is small, it may be a transmission circuit that is the same or equivalent to the entire circuit. In addition, when there is a part that easily causes delay or interference in the signal processing circuit, it is preferable to use a transmission circuit including at least the part. The differential conversion circuit of the present invention can be applied to any device that processes analog signals, including a magnetic recording device.
[0031]
【The invention's effect】
The differential conversion circuit of the present invention can suppress the appearance of noise in the output differential signal even when noise occurs in the reference voltage or noise occurs due to interference of the signal processing circuit. it can. Furthermore, a usable differential signal can be output in a short time after the operation starts.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a differential conversion circuit according to a first embodiment.
FIG. 2 is a diagram showing a configuration of a differential conversion circuit according to a second embodiment.
FIG. 3 is a diagram illustrating a configuration of a differential conversion circuit according to a third embodiment.
FIG. 4 is a diagram showing a configuration of a differential conversion circuit according to a fourth embodiment.
FIG. 5 is a diagram showing a configuration of a differential conversion circuit according to a fifth embodiment.
FIG. 6 is a diagram showing a configuration of a conventional differential conversion circuit.
[Explanation of symbols]
1, 2, 3, 4, 5 Differential conversion circuit 10 Coupling capacitor 20 Differential conversion amplifier 30 Signal processing circuit 31 Transmission circuit 40 Signal processing circuits 41, 42, 43, 44 Transmission circuit 11 Low-pass filter 11a, 11a 'Amplifier 11b 11b 'buffer 12 band-pass filter unit 14, 15 low-pass filter unit 12a, 12a' amplifier 12b, 12b 'buffer 13a, 13a' amplifier 13b, 13b 'buffer 13c, 13c' capacitor 14a, 14a 'amplifier 14b, 14b' buffer 14c, 14c 'capacitors 15a, 15a' amplifiers 15b, 15b 'buffers 15c, 15c' capacitors 16a, 16a 'amplifiers 16b, 16b' buffers 16c, 16c 'capacitors

Claims (1)

A first difference signal comprising a first input terminal and a second input terminal, wherein the signal of the second input terminal is subtracted from the signal of the first input terminal; or the signal of the second input terminal; A differential conversion amplifier that generates a second difference signal obtained by subtracting the first difference signal; and amplifies and outputs the first difference signal or the second difference signal at a predetermined rate;
A process of receiving an input signal and a reference voltage and using the reference voltage as a DC component; and a process of passing a component of a predetermined frequency by a filter unit including N (N ≧ 2) filter circuits. A signal processing circuit that applies predetermined processing to the input signal to generate an intermediate signal, and applies the intermediate signal to the first input terminal;
A differential conversion circuit comprising: a transmission circuit that applies the reference voltage to the second input terminal;
2. The differential conversion circuit according to claim 1, wherein the transmission circuit is composed of a circuit that is the same as or equivalent to a filter unit in which an arbitrary number of filter circuits from 1 to N-1 are omitted .

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