JP3797570B2 - セマフォ命令用のセマフォ・バッファを用いた装置と方法 - Google Patents

セマフォ命令用のセマフォ・バッファを用いた装置と方法 Download PDF

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Publication number
JP3797570B2
JP3797570B2 JP25465796A JP25465796A JP3797570B2 JP 3797570 B2 JP3797570 B2 JP 3797570B2 JP 25465796 A JP25465796 A JP 25465796A JP 25465796 A JP25465796 A JP 25465796A JP 3797570 B2 JP3797570 B2 JP 3797570B2
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Japan
Prior art keywords
semaphore
data
instruction
initial
address
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Expired - Fee Related
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JP25465796A
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English (en)
Japanese (ja)
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JPH09138778A (ja
JPH09138778A5 (OSRAM
Inventor
ソーリン・イアコボビッチ
ディーン・エイ・ミューラ
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HP Inc
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Hewlett Packard Co
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Publication of JPH09138778A5 publication Critical patent/JPH09138778A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
JP25465796A 1995-09-29 1996-09-26 セマフォ命令用のセマフォ・バッファを用いた装置と方法 Expired - Fee Related JP3797570B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/536,534 US5696939A (en) 1995-09-29 1995-09-29 Apparatus and method using a semaphore buffer for semaphore instructions
US536,534 1995-09-29

Publications (3)

Publication Number Publication Date
JPH09138778A JPH09138778A (ja) 1997-05-27
JPH09138778A5 JPH09138778A5 (OSRAM) 2004-08-12
JP3797570B2 true JP3797570B2 (ja) 2006-07-19

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ID=24138895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25465796A Expired - Fee Related JP3797570B2 (ja) 1995-09-29 1996-09-26 セマフォ命令用のセマフォ・バッファを用いた装置と方法

Country Status (2)

Country Link
US (1) US5696939A (OSRAM)
JP (1) JP3797570B2 (OSRAM)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5889983A (en) * 1997-01-21 1999-03-30 Intel Corporation Compare and exchange operation in a processing system
US5895492A (en) * 1997-05-28 1999-04-20 International Business Machines Corporation Processor associated blocking symbol controls for serializing the accessing of data resources in a computer system
US5893157A (en) * 1997-05-28 1999-04-06 International Business Machines Corporation Blocking symbol control in a computer system to serialize accessing a data resource by simultaneous processor requests
US5895494A (en) * 1997-09-05 1999-04-20 International Business Machines Corporation Method of executing perform locked operation instructions for supporting recovery of data consistency if lost due to processor failure, and a method of recovering the data consistency after processor failure
US6453375B1 (en) * 1999-03-23 2002-09-17 Intel Corporation Method and apparatus for obtaining coherent accesses with posted writes from multiple software drivers
US6381663B1 (en) * 1999-03-26 2002-04-30 Hewlett-Packard Company Mechanism for implementing bus locking with a mixed architecture
US6405233B1 (en) 1999-06-30 2002-06-11 Intel Corporation Unaligned semaphore adder
JP4923288B2 (ja) * 2000-03-13 2012-04-25 陽子 友保 非同期共有オブジェクトシステムの耐故障合意手法およびその実現機構
US6725457B1 (en) * 2000-05-17 2004-04-20 Nvidia Corporation Semaphore enhancement to improve system performance
US7089555B2 (en) * 2001-06-27 2006-08-08 International Business Machines Corporation Ordered semaphore management subsystem
US7454753B2 (en) * 2001-06-27 2008-11-18 International Business Machines Corporation Semaphore management subsystem for use with multi-thread processor systems
US7406690B2 (en) * 2001-09-26 2008-07-29 International Business Machines Corporation Flow lookahead in an ordered semaphore management subsystem
US7143414B2 (en) 2001-09-26 2006-11-28 International Business Machines Corporation Method and apparatus for locking multiple semaphores
US6892258B1 (en) * 2001-10-26 2005-05-10 Lsi Logic Corporation Hardware semaphores for a multi-processor system within a shared memory architecture
US20040019722A1 (en) * 2002-07-25 2004-01-29 Sedmak Michael C. Method and apparatus for multi-core on-chip semaphore
JP4767361B2 (ja) * 2008-03-31 2011-09-07 パナソニック株式会社 キャッシュメモリ装置、キャッシュメモリシステム、プロセッサシステム
JP5968463B2 (ja) * 2012-01-06 2016-08-10 インテル コーポレイション データを別の記憶装置にコピーせずにデータソースによりバッファに格納されたデータを処理するためのポインタのスワッピング

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179665A (en) * 1987-06-24 1993-01-12 Westinghouse Electric Corp. Microprocessor information exchange with updating of messages by asynchronous processors using assigned and/or available buffers in dual port memory
US5050070A (en) * 1988-02-29 1991-09-17 Convex Computer Corporation Multi-processor computer system having self-allocating processors
US5050072A (en) * 1988-06-17 1991-09-17 Modular Computer Systems, Inc. Semaphore memory to reduce common bus contention to global memory with localized semaphores in a multiprocessor system
US5276886A (en) * 1990-10-11 1994-01-04 Chips And Technologies, Inc. Hardware semaphores in a multi-processor environment
US5428783A (en) * 1990-11-28 1995-06-27 Motorola, Inc. Lan based loosely coupled large grain parallel processing method
US5434970A (en) * 1991-02-14 1995-07-18 Cray Research, Inc. System for distributed multiprocessor communication
GB9123264D0 (en) * 1991-11-01 1991-12-18 Int Computers Ltd Semaphone arrangement for a data processing system
DE69230462T2 (de) * 1991-11-19 2000-08-03 Sun Microsystems, Inc. Arbitrierung des Multiprozessorzugriffs zu gemeinsamen Mitteln
US5261106A (en) * 1991-12-13 1993-11-09 S-Mos Systems, Inc. Semaphore bypass
JP3005402B2 (ja) * 1993-09-29 2000-01-31 三洋電機株式会社 Ｒｏｍの読出切換回路

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Publication number Publication date
US5696939A (en) 1997-12-09
JPH09138778A (ja) 1997-05-27

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