JP3793033B2 - Infrared sensor and driving method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an infrared sensor and a driving method thereof, and more particularly, to an infrared sensor and a driving method thereof in which a signal readout circuit is improved in an uncooled infrared sensor.
[0002]
[Prior art]
An imaging device using infrared rays can take images regardless of day and night, has a feature of being more permeable to smoke and fog than visible light, and can obtain temperature information of a subject. Have. For this reason, it has a wide range of applications as a surveillance camera and a fire detection camera in the defense field.
[0003]
The biggest drawback of the conventional quantum infrared solid-state image sensor, which is a mainstream element, is that it requires a cooling mechanism for low-temperature operation, but in recent years it has not required such a cooling mechanism. The development of is becoming popular. In an uncooled type, that is, a thermal type infrared solid-state imaging device, incident infrared rays having a wavelength of about 10 μm are converted into heat by an absorption structure, and the temperature change of the heat-sensitive part caused by the weak heat is converted by some thermoelectric conversion means. Infrared image information is obtained by converting into an electrical signal and reading out the electrical signal.
[0004]
As an uncooled infrared solid-state imaging device, a silicon pn junction that converts a temperature change into a voltage change by a constant forward current is formed in an SOI region (Tomohiro Ishikawa, et al., Proc. SPIE Vol.3698, p.556, 1999). A silicon pn junction type element using an SOI substrate has a feature that it can be manufactured only by a silicon LSI manufacturing process, and is therefore an element excellent in mass productivity. In addition, the silicon pn junction type element has a feature that the internal structure of the pixel can be simplified because the pn junction, which is a thermoelectric conversion means, has a pixel selection function using rectification characteristics.
[0005]
By the way, although the temperature change of the pixel part in an uncooled infrared solid-state image sensor depends on the absorption rate of the infrared absorption layer and the optical system, it is generally 5 × 10 of the temperature change of the subject. ^-3 If the subject temperature changes by 1 [K], the pixel temperature changes by 5 [mK]. When eight silicon pn junctions are connected in series, the thermoelectric conversion efficiency is about 10 [mV / K]. Therefore, when the subject temperature changes by 1 [K], a signal voltage of 50 [μV] is applied to the pixel portion. appear. Actually, since it is often required to identify about 0.1 [K] as the temperature change of the subject, it is necessary to read a signal voltage of about 5 [μV] generated in that case.
[0006]
As a method for reading out such a very weak signal voltage, a circuit configuration is known in which the signal voltage generated in the pixel portion is current-amplified as the gate voltage of the amplification transistor, and the amplified signal current is time-integrated with a storage capacitor. ing. This circuit configuration is a circuit called a gate modulation integration circuit. By arranging this circuit configuration for each column and processing current amplification for one row in parallel, the signal band can be limited and random noise can be reduced. effective.
[0007]
The voltage gain G in the gate modulation integration circuit is determined by the mutual conductance gm (= δId / δVg) of the amplification transistor, the integration time ti, and the storage capacitor Ci.
G = (ti × gm) / Ci (1)
It is expressed by When the integration time ti and the storage capacitor Ci are given, the above gain is governed by the mutual conductance gm of the amplification transistor, and gm when the n-type MOS transistor operates in the saturation region is expressed by the following equation (2). Approximate expression.
[0008]
gm = (W / L) · (εox / Tox) · μn · (Vgs−Vth) (2)
Where W: channel width, L: channel length, εox: gate oxide dielectric constant, Tox: gate oxide film thickness, μn: electron mobility, Vgs: gate-source voltage, Vth: transistor threshold voltage is there.
[0009]
As already described, since it is required to recognize about 0.1 [K] as the temperature difference of the subject, it is necessary to read a signal of about 5 [μV] generated at the pixel output unit at that time. Become. This signal voltage level is a very low voltage compared to a CMOS sensor that is a sensor that captures visible light. For example, according to the literature (“High-sensitivity CMOS image sensor”, Journal of the Institute of Image Information and Television Engineers, Vo1.54, No.2, p.216, 2000), the noise voltage is about 0.4 [mV] = 400 [μV]. Compared with this, the noise level of the infrared sensor is as low as about 1/80 that of a CMOS sensor, and the signal voltage to be handled is also as low as about 1/80. Accordingly, considering that the sensor output is processed by a circuit similar to a CMOS sensor that is a general image sensor, it is desirable to realize a gain of about 80 times.
[0010]
However, a fluctuation component larger than the pixel output of about 5 [μV] exists in the gate of the amplification transistor in the gate modulation integration circuit, and the gain is actually designed to be low. This fluctuation component is caused by the threshold fluctuation of the MOS amplifying transistor and the threshold fluctuation of the load MOS transistor used as a constant current source, and both generally generate fluctuations of about 30 [mV]. It is known.
[0011]
This threshold fluctuation component is amplified by the amplification readout circuit in the same manner as the pixel output signal given as the gate voltage of the amplification transistor. Therefore, when the gain is designed to be about 80 times, 2.4 [V ] Fluctuations will occur. Of course, this threshold fluctuation is a fluctuation inherent to each amplification MOS transistor and each load MOS transistor, and is generated as a fixed pattern on the image, so that correction by an external circuit can be performed. However, if such correction is performed, most of the voltage swing of the storage capacitor is consumed as a countermeasure for threshold fluctuation, and at the same time, the dynamic range required for the external circuit is expanded.
[0012]
Therefore, until now, the load on the processing in the external circuit has to be reduced at the expense of the gain of the amplification read circuit. Further, since the gain cannot be increased sufficiently, the influence of random noise such as current shot noise and 1 / f noise in the amplification readout circuit cannot be sufficiently reduced.
[0013]
[Problems to be solved by the invention]
As described above, in the conventional uncooled infrared sensor, since the signal voltage level generated at the pixel output portion is low, it is necessary to sufficiently amplify using the amplification transistor, but there is a fluctuation component at the gate of the amplification transistor. Therefore, when the amplification gain is increased, the fluctuation appearing in the storage capacity also increases. For this reason, the load on processing in the external circuit has to be reduced at the expense of gain. In addition, since the gain cannot be increased sufficiently, there is a problem that the influence of random noise such as current shot noise and 1 / f noise in the amplification readout circuit cannot be sufficiently reduced.
[0014]
The present invention has been made in consideration of the above circumstances, and the object of the present invention is to reduce the influence of fluctuation appearing at the gate of the amplification transistor, and to reduce non-noise, high sensitivity, and wide dynamic range. A cooling type infrared sensor and a driving method thereof are provided.
[0015]
[Means for Solving the Problems]
(Constitution)
In order to solve the above problems, the present invention adopts the following configuration.
[0016]
That is, according to the present invention, in an infrared sensor, an imaging region in which infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate, and a plurality of row selection lines arranged in the row direction in the imaging region. A plurality of signal lines arranged in a column direction in the imaging region, a plurality of amplification transistors each modulated by a signal voltage generated in these signal lines, and the transistors connected to the drains of these amplification transistors, respectively A plurality of storage capacitors for storing the signal charges from the plurality of amplifiers, a plurality of reset means for resetting the drain potentials of the respective amplification transistors, a plurality of readout means for reading the signal charges held in the respective storage capacitors, A plurality of coupling capacitors provided between each signal line and the gate of the amplification transistor; And characterized by being provided with a plurality of sampling transistors respectively provided between the static drain and gate.
[0017]
Here, preferred embodiments of the present invention include the following.
[0018]
(1) The infrared detection pixel includes infrared absorption means for absorbing incident infrared rays on a semiconductor substrate and converting them into heat, and thermoelectric conversion means for converting temperature changes caused by heat generated by the infrared absorption means into electrical signals. The pixel selection unit selects a pixel from which the pixel output signal from the thermoelectric conversion unit is read, and the output unit outputs the pixel output signal from the infrared detection pixel selected by the pixel selection unit.
[0019]
(2) The semiconductor substrate is an SOI substrate formed by stacking an SOI single crystal silicon layer on a single crystal silicon supporting substrate via a silicon oxide layer, and the thermoelectric conversion means is a first conductivity type SOI single crystal silicon. This is a single crystal silicon pn junction formed by providing a second conductivity type region inside the layer, and is hollowly supported on a hollow structure formed inside the SOI substrate.
[0020]
(3) In the imaging area, at least one row of insensitive pixel columns in which insensitive pixels that do not change the pixel output signal due to incident infrared rays and insensitive to the incident infrared rays are arranged in the row direction is arranged. ing.
[0021]
(4) Insensitive pixels are made insensitive because the thermoelectric conversion means is not thermally separated from the semiconductor substrate.
[0022]
(5) A storage holding means for holding a first row output information group obtained in time series from the reading means, and a first output information group based on the first row output information group held in the storage holding means. Correction means for correcting a second row output information group obtained as a result of selecting a row different from the obtained row.
[0023]
According to the present invention, in the driving method for driving the infrared sensor configured as described above, in the non-selection period in which the infrared detection pixel is not selected by the row selection line within one frame period, In the period 1, the drain means of the amplification transistor is not reset by turning off the reset means, and the drain and gate of the transistor are connected to have the same potential by turning on the sample transistor, In the second period excluding the first period in the non-selection period, the drain and gate of the transistor are separated by turning off the sample transistor, and the transistor in the first period is connected to the gate of the amplification transistor. The drain potential is maintained, and the infrared detection pixel is selected as the row within one frame period. The selection period are selected, and the period for reading a signal voltage by said reading means, characterized in that for holding the sample transistor off.
[0024]
As another driving method, in the non-selection period in which no infrared detection pixel is selected by the row selection line within one frame period, the resetting means is turned off in the first period within the non-selection period. The drain potential of the amplification transistor is not reset, and the sample transistor is turned on to connect the drain and gate of the amplification transistor to have the same potential, and the first source voltage is applied to the source of the amplification transistor. In the second period excluding the first period in the non-selection period, the drain and gate of the amplification transistor are separated by turning off the sample transistor, and the gate of the amplification transistor has a first period. The drain voltage of the transistor at the same time is maintained, and the row selection line is applied within one frame period. In the row selection period in which the infrared detection pixel is selected, the sample transistor is held in an off state, and a second source voltage different from the first source voltage is applied to the source of the amplification transistor, In the period in which the signal voltage is read by the reading means within one frame period, the first source voltage is applied to the source of the amplification transistor after the sample transistor is held in the off state.
[0025]
According to the present invention, in the infrared sensor, an imaging region in which infrared detection pixels that detect incident infrared rays are two-dimensionally arranged on a semiconductor substrate and at least one insensitive pixel row having no infrared sensitivity is included. The plurality of row selection lines arranged in the row direction in the imaging region, the plurality of signal lines arranged in the column direction in the imaging region, and the signal voltage generated in these signal lines are respectively modulated. A plurality of amplifying transistors, a plurality of storage capacitors connected to the drains of the amplifying transistors, respectively, for accumulating signal charges from the transistors, a plurality of reset means for resetting the drain potentials of the amplifying transistors, A plurality of readout means for respectively reading out the signal charges held in the storage capacitors; the signal lines; and the amplification transistor corresponding to the signal lines. A plurality of coupling capacitances respectively provided between the gate of Njisuta, characterized in that said formed by including a plurality of sampling transistors respectively provided between the drain and gate of each amplification transistor.
[0026]
According to the present invention, in the driving method for driving the infrared sensor configured as described above, the first selection period in which the insensitive pixel row is selected by the row selection line within one frame period is the first selection period. In the first period within the selection period, the drain means of the amplification transistor is not reset by turning off the reset means, and the drain and gate of the amplification transistor are connected by turning on the sample transistor. And the same potential is applied, the first source voltage is applied to the source of the amplification transistor, and the sample transistor is turned off in the second period excluding the first period in the first selection period. The drain and the gate of the amplification transistor are separated, and the transistor in the first period is connected to the gate of the amplification transistor In the second selection period in which the drain potential is held and the sensitive pixel row is selected by the row selection line within one frame period, the sample transistor is held in an off state, and then the amplification transistor A second source voltage different from the first source voltage is applied to the source, and the sample transistor is held in an off state during a period in which the signal voltage is read by the reading means by the row selection line within one frame period. Then, a first source voltage is applied to the source of the amplification transistor.
[0027]
Furthermore, as another driving method,
In the first selection period in which the insensitive pixel row is selected by the row selection line within one frame period, the resetting unit is turned off in the first period within the first selection period. The drain potential of the amplification transistor is not reset, and the sample transistor is turned on to connect the drain and gate of the amplification transistor to have the same potential, and the first source voltage is applied to the source of the amplification transistor. In the second period excluding the first period within the first selection period, the sample transistor is turned off to separate the drain and gate of the amplification transistor, and the gate of the amplification transistor includes the first The drain potential of the transistor in the first period is held, and the first period and the second period in the first selection period are excluded. In the third period, in the row selection period in which the first source voltage is applied to the source of the amplification transistor and the infrared detection pixel is selected by the row selection line within one frame, the sample transistor In the off-state, a second source voltage different from the first source voltage is applied to the source of the amplifying transistor, and the signal voltage is read out by the reading means within one frame. Is maintained in an off state, and a first source voltage is applied to the source of the amplification transistor.
[0028]
According to the present invention, in the infrared sensor, an imaging region in which infrared detection pixels that detect incident infrared rays are two-dimensionally arranged on a semiconductor substrate and at least one insensitive pixel row having no infrared sensitivity is included. The plurality of row selection lines arranged in the row direction in the imaging region, the plurality of signal lines arranged in the column direction in the imaging region, and the signal voltage generated in these signal lines are respectively modulated. A plurality of amplifying transistors, a plurality of storage capacitors connected to the drains of the amplifying transistors, respectively, for accumulating signal charges from the transistors, a plurality of reset means for resetting the drain potentials of the amplifying transistors, A plurality of readout means for respectively reading out the signal charges held in the storage capacitors; the signal lines; and the amplification transistor corresponding to the signal lines. A plurality of coupling capacitors respectively provided between the gates of the transistors, a plurality of sampling transistors provided between the drains and the gates of the amplification transistors, and a first time series obtained from the readout means in time series As a result of selecting a row different from the row from which the first row output information group is obtained based on the storage holding unit holding the row output information group and the first row output information group held in the storage holding unit. And correction means for correcting the obtained second row output information group.
[0029]
The present invention also provides an imaging region in which infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate and at least two insensitive pixel rows having no infrared sensitivity are included in an infrared sensor. The plurality of row selection lines arranged in the row direction in the imaging region, the plurality of signal lines arranged in the column direction in the imaging region, and the signal voltage generated in these signal lines are respectively modulated. A plurality of amplifying transistors, a plurality of storage capacitors connected to the drains of these amplifying transistors, respectively, for accumulating signal charges from the transistors, a plurality of reset means for resetting the drain voltages of the respective amplifying transistors, A plurality of readout means for respectively reading out the signal charges held in the storage capacitors; the signal lines; and the amplification transistor corresponding to the signal lines. A plurality of coupling capacitances respectively provided between the gate of Njisuta, characterized by comprising and a plurality of sampling transistors respectively provided between the drain and the gate of the amplifying transistor.
[0030]
According to the present invention, in the driving method for driving the infrared sensor having the above configuration, in the first selection period in which the first insensitive pixel row is selected by the row selection line within one frame period, In the first period within the first selection period, the drain means of the amplification transistor is not reset by turning off the reset means, and the drain and gate of the amplification transistor are turned on by turning on the sample transistor. To the same potential, a first source voltage is applied to the source of the amplification transistor, and the sample transistor is turned off in a second period excluding the first period in the first selection period. And separating the drain and gate of the amplification transistor, and the transistor in the first period is connected to the amplification transistor gate. A second selection period in which a drain insensitive pixel row is held and a second insensitive pixel row different from the first insensitive pixel row is selected by the row selection line within one frame period, and the row selection line has a drain potential. In a third selection period in which a sensitivity pixel row is selected, the sample transistor is held in an off state, and then a second source voltage different from the first source voltage is applied to the source of the amplification transistor, In the period in which the signal voltage is read by the reading means within one frame period, the first source voltage is applied to the source of the amplification transistor after the sample transistor is held in the off state.
[0031]
Further, the present invention provides an insensitive infrared sensor that has two-dimensionally arranged infrared detection pixels for detecting incident infrared rays on a semiconductor substrate and has no infrared sensitivity together with a plurality of sensitive pixel rows having infrared sensitivity. An imaging region including at least one pixel row, a plurality of row selection lines arranged in the row direction in the imaging region, a plurality of signal lines arranged in the column direction in the imaging region, and A plurality of amplifying transistors respectively connected to each of the signal lines via a first coupling capacitor; a plurality of sampling transistors provided between the drains and the gates of the amplifying transistors; and the drains of the amplifying transistors And a plurality of first storage capacitors connected via the second coupling capacitors and the drain potentials of the amplification transistors, respectively. A plurality of reset means, a plurality of first clamp means for clamping the voltage of each first storage capacitor, and a plurality of readout means for reading signal charges held in each first storage capacitor, respectively. It is characterized by comprising.
[0032]
Here, a plurality of second storage capacitors respectively connected to the first storage capacitors via transfer transistors, and a plurality of second reset means for resetting the voltages of the second storage capacitors, respectively. It is preferable that the signal charges transferred to the second storage capacitors are respectively read by the plurality of reading means.
[0033]
According to the present invention, in the driving method for driving the infrared sensor configured as described above, a period during which the detection signals of the infrared detection pixels are read out in units of rows is defined as a horizontal scanning period, and the horizontal blanking period of each horizontal scanning period is set. The threshold transistor sampling operation of the amplification transistor is performed by turning on the sampling transistor in a state where the reset unit is turned off, and then the amplification reading operation of the insensitive pixel row selected by the row selection line is performed. Next, an amplification read operation of the sensitive pixel row selected by the row selection line is performed, and during the read period of the insensitive pixel row, the voltage of the storage capacitor is clamped to a predetermined voltage by the clamp means, During the amplification readout period of the sensitive pixel row, the clamp means is held in the off state, and the sensitive pixel row is amplified. At the end of the readout period, the difference output between the insensitive pixel output and the sensitive pixel output is stored in the storage capacitor, the difference output is sequentially read out through the reading means, and each frame within each frame is read out. Sensitive pixel rows are different for each scanning period.
[0034]
Further, the present invention provides an insensitive infrared sensor that has two-dimensionally arranged infrared detection pixels for detecting incident infrared rays on a semiconductor substrate and has no infrared sensitivity together with a plurality of sensitive pixel rows having infrared sensitivity. An imaging region including at least one pixel row, a plurality of row selection lines arranged in the row direction in the imaging region, a plurality of signal lines arranged in the column direction in the imaging region, and A plurality of amplifying transistors respectively connected to each of the signal lines via a first coupling capacitor; a plurality of first sampling transistors provided between drains and gates of the amplifying transistors; and the amplifying transistors. Reset the drain potential of each of the plurality of first storage capacitors connected to the respective drains via the second coupling capacitors and the respective amplification transistors. A plurality of reset means, a plurality of clamp means for clamping the voltage of the first storage capacitor, a plurality of second storage capacitors connected via the first storage capacitor and the second sampling transistor, and a second storage capacitor, respectively. And a plurality of horizontal selection readout means for reading out each signal voltage held in the circuit.
[0035]
According to the present invention, in the driving method for driving the infrared sensor configured as described above, a period during which the detection signals of the infrared detection pixels are read out in units of rows is defined as a horizontal scanning period, and the reset means is provided during the first horizontal scanning period. By turning on the sampling transistor in an off state, the threshold information sampling operation of the amplification transistor is performed, and then the amplification reading operation of the insensitive pixel row selected by the row selection line is performed, and then the row selection line Amplifying and reading operation of the sensitive pixel row selected by the above is performed. During the amplification and reading period of the insensitive pixel row, the voltage of the first storage capacitor is clamped to a predetermined voltage by the clamping means, and the sensitive pixel row is In the amplification readout period, the clamp means is held in an off state, and at the end of the amplification readout period of the sensitive pixel row In the first storage capacitor, the difference output between the output of the insensitive pixel row and the output of the sensitive pixel row is stored, and then the second sampling transistor is turned on, so that the difference output stored in the first storage capacitor is The signal charges are transferred to the second storage capacitor, and after the end of the first horizontal scanning period, in the second horizontal scanning period following the first horizontal scanning period, the signal charges are held until sequentially read through the reading unit, and the second In the horizontal scanning period, the same operation as that in the first horizontal scanning period is repeatedly performed with the second sampling transistor turned off.
[0036]
(Function)
According to the present invention, in order to eliminate the variation in the voltage gain of each column, which is caused by the variation of the threshold value of the amplification transistor which is different for each column, the coupling between the signal line where the pixel output is generated and the gate of the amplification transistor is performed. Capacitance is provided for DC separation, and the threshold information of the amplification transistor for each column is given to the gate of the amplification transistor for each frame, so that the influence of the threshold variation for each column is eliminated, and accumulation caused by this threshold variation is eliminated. It is not necessary to set a margin for the operating voltage region of the storage capacitor necessary for ensuring the voltage swing of the capacitor. Therefore, the gain of the gate modulation integration circuit can be designed to be large, and a highly sensitive uncooled infrared sensor can be obtained. For the same reason, the storage capacitor potential can be fully utilized, and an uncooled infrared sensor having a wide dynamic range can be obtained.
[0037]
Further, according to the present invention, at the timing when the insensitive pixel voltage at the time of selection of the insensitive pixel including the threshold information of the load MOS transistor is generated in the signal line, simultaneously with the threshold information of the amplification MOS transistor for each column, By sampling the threshold information of the load MOS transistor for each column, the variation of the threshold value of the amplification transistor is corrected and the variation of the operating point is also corrected, thereby eliminating the influence of the threshold variation of the load MOS transistor for each column. In addition, it is not necessary to set a margin in the operating voltage region of the storage capacitor necessary for ensuring the voltage swing of the storage capacitor. Therefore, the gain of the gate modulation integration circuit can be designed to be large, and a highly sensitive uncooled infrared sensor can be obtained. For the same reason, the storage capacitor potential can be fully utilized, and an uncooled infrared sensor having a wide dynamic range can be obtained.
[0038]
Further, according to the present invention, since the insensitive pixel output information group for one insensitive pixel row including the reset noise is held for one frame period, the reset noise of the coupling capacitance is constant within the frame. Therefore, it is possible to remove the reset noise component within the same frame, and it is possible to increase the sensitivity without the influence of random noise caused by the coupling capacitance. Here, the memory holding means for holding the first row output information group obtained in time series from the reading means, and the correction for correcting the second row output information group based on the held first row output information group By providing the means, the reset noise component can be removed more effectively.
[0039]
Further, according to the present invention, the threshold information of the amplification transistor is sampled every horizontal scanning period, so that the threshold information may be held in a period corresponding to the horizontal scanning period. Therefore, the time that the leakage current of the coupling capacitor and the transistor connected to the coupling capacitor has an influence on the holding voltage is greatly shortened from the frame period to the horizontal scanning period. Therefore, even if the leakage current increases from the design value due to fluctuations in the manufacturing process, the possibility of the occurrence of characteristic defects such as vertical shading is greatly reduced due to the influence. Yield can be obtained.
[0040]
Further, according to the present invention, the threshold information sampling operation of the amplification transistor, the amplification read operation of the insensitive pixel output signal, the amplification read operation of the selected pixel output signal, the insensitive pixel output signal, It is possible to perform a difference processing operation with respect to the selected pixel output signal. Therefore, the reset noise component, which is a random noise generated in the coupling capacitor in accordance with the threshold information sampling operation of the amplification transistor, is removed in the above-described differential processing, and the above-described random noise in the external circuit or the on-chip circuit. A memory holding circuit that holds information for a frame period and a correction circuit that corrects an output signal based on random noise information held in the memory holding circuit are unnecessary, and the element structure and element driving can be greatly simplified. .
[0041]
Further, according to the present invention, since the difference processing operation between the insensitive pixel output signal and the selected pixel output signal can be performed within the horizontal scanning period, the band limitation is imposed on the low frequency side of the signal band. Therefore, 1 / f noise of the amplification transistor that becomes high noise on the low frequency side and 1 / f noise of the load MOS transistor used as a constant current source connected to the signal line can be greatly reduced. Further, by providing a memory holding circuit for one horizontal scanning period between the differential processing operation circuit and the horizontal reading circuit, it is possible to perform amplification reading of the imaging signal during the horizontal effective period that occupies most of the horizontal scanning period. Become. For this reason, band limitation is imposed on the high frequency side of the signal frequency band, and noise can be further reduced. In addition, such a structure and drive significantly reduce the specifications for the leakage current of the single element in the sensor chip and the MOS interface trap density, so that stable manufacturing is possible regardless of variations in the manufacturing process. .
[0042]
DETAILED DESCRIPTION OF THE INVENTION
The details of the present invention will be described below with reference to the illustrated embodiments.
[0043]
(First embodiment)
FIG. 1 is a circuit diagram showing the overall configuration of an infrared sensor according to the first embodiment of the present invention. In the figure, a 2 × 2 pixel configuration with 2 rows and 2 columns is shown for the sake of simplicity, but it is needless to say that the present invention can be applied to an m × n pixel configuration with more rows and columns.
[0044]
An infrared detection pixel 1 that converts incident infrared light into an electrical signal is two-dimensionally arranged on a semiconductor substrate to form an imaging region 3. In the imaging area 3, a plurality of row selection lines 4 (4-1, 4-2) and a plurality of vertical signal lines 5 (5-1, 5-2) are arranged.
[0045]
For pixel selection, a row selection circuit 40 and a horizontal address circuit 6 are arranged adjacent to each other in the row direction and the column direction of the imaging region 3, and a row selection line 4 is connected to the row selection circuit 40. Are connected to horizontal selection lines 7 (7-1, 7-2). A load MOS transistor 8 (8-1, 8-2) is connected to the vertical signal line 5 of each column as a low current source for obtaining a pixel output voltage. A substrate voltage Vs is applied to the source of the load MOS transistor 8.
[0046]
The power supply voltage Vd is applied to the row selection line 4 selected by the row selection circuit 40, and Vs is applied to the row selection line not selected by the row selection circuit 40. As a result, the pn junction in the infrared detection pixel 1 in the selected row becomes a forward bias, and a bias current flows. The operating point is determined by the temperature of the pn junction in the pixel and the forward bias current, and the vertical signal line 5 in each column. A pixel signal output voltage is generated. At this time, the pn junction of the pixel 1 that is not selected by the row selection circuit 40 is reverse-biased. That is, the pn junction inside the pixel has a pixel selection function.
[0047]
The voltage generated in the vertical signal line 5 is extremely low, and the ratio of the subject temperature change dTs to the pixel temperature change dTd is 5 × 10. ^-3 Assuming this value and the thermoelectric conversion sensitivity dV / dTd = 10 [mV / K] when eight pn junctions are connected in series as the pn junction of the pixel, a slight amount is obtained when dTs = 0.1 [K]. 5 [μV]. Therefore, in order to recognize this subject temperature difference, it is necessary to reduce the noise generated in the vertical signal line 5 to 5 [μV] or less. The value of this noise is as low as about 1/80 of the noise of a CMOS sensor which is a MOS type visible light image sensor.
[0048]
In order to amplify the low voltage signal voltage, an amplification read circuit 9 is arranged for each column, and the gate of the amplification transistor 10 in each column and the vertical signal line 5 in each column are capacitively coupled by a coupling capacitor 11. is doing. By this coupling capacitor 11, the vertical signal line 5 and the amplification readout circuit 9 are separated in a DC manner.
[0049]
A storage capacitor 12 for integrating and storing the current-amplified signal current is connected to the drain side of the amplification transistor 10. The accumulation time for integrating the signal current is determined by the row selection pulse applied to the row selection line 4 by the row selection circuit 40. A reset transistor 13 for resetting the voltage of the storage capacitor 12 is connected to the storage capacitor 12, and a reset operation is performed after the signal voltage is read by the horizontal selection transistor 14.
[0050]
The drain of the amplifying transistor 10 is connected to the gate of the amplifying transistor 10 via the sample transistor 15. When the sample transistor 15 is turned on, the gate and the drain of the amplifying transistor 10 have the same potential.
[0051]
FIG. 2 is a schematic configuration diagram for explaining a cross-sectional structure (a) and a planar structure (b) of the infrared detection pixel in the infrared sensor of the present embodiment. The sensor unit 16 including a pn junction for thermoelectric conversion is formed for the infrared absorption layer 22 formed on the hollow structure 18 formed inside the single crystal silicon support substrate 17 and for thermoelectric conversion. It consists of a pn junction inside the SOI layer 19 and a buried silicon oxide film layer 20 that supports the SOI layer 19. Further, a support unit 21 is provided to support the sensor unit 16 on the hollow structure 18 and to output an electric signal from the sensor unit 16, and connects the sensor unit 16 to the vertical signal line 5 and the row selection line 4. A connecting portion (not shown) is provided.
[0052]
As described above, the sensor unit 16 and the support unit 21 are provided on the hollow structure 18 so that the temperature of the sensor unit 16 is efficiently modulated by incident infrared rays. FIG. 2 shows a structure in which two pn junctions are connected in series.
[0053]
FIG. 3 is a timing chart for explaining the operation of this embodiment, and is a driving timing chart in the case of 4 pixels having 2 rows and 2 columns shown in FIG. Both the source potential of the load MOS transistor 8 and the source potential of the amplification transistor 10 which are not shown in the timing chart give a substrate potential, and the drain voltage of the reset transistor 13 gives a power supply voltage.
[0054]
Before the period 101 when the row selection line 4-1 of the first row selection is selected, there is a non-selection period 100 in which the row selection circuit 40 does not perform row selection. Here, threshold information of the amplification transistor 10 is acquired. Perform the save operation. In the non-selection period 100, the voltage of the vertical signal line 5 becomes equal to the source voltage of the load MOS transistor 8, and thus becomes the substrate potential.
[0055]
First, the reset transistor 13 is turned on to reset the voltages Vc1 and Vc2 of the storage capacitor 12. Next, in the non-selection period 100, the sample transistor (SMP) 15 is turned on, and the drain voltage of the amplification transistor 10 reset to the power supply voltage is applied to the gate of the amplification transistor 10. Therefore, the amplification transistor 10 is turned on and a drain current flows. Due to this drain current, the drain voltage Vc is lowered and the conductance of the amplification transistor 10 is lowered, and the gate voltage in a state where the drain current does not flow is acquired as the drain voltage Vc. This voltage is the threshold voltage of the amplification transistor 10 for each column.
[0056]
The threshold information is held in the coupling capacitor 11 by turning off the sample transistor 15 after the threshold information of the amplification transistor 10 is read to the drain voltage Vc. Since the threshold information is read once in the frame period, it is performed prior to the selection of the first row, not before the selection of the second and subsequent rows, and thereafter before the selection of the first row. The stored threshold information is used as it is. Next, prior to selection of the first row, the reset transistor 13 is turned on to reset the drain voltage Vc from which the threshold voltage has been read.
[0057]
In the first row selection period 101, a row selection pulse V1 is applied to the first row selection line 4-1, and the load MOS transistor 8 to the vertical signal line 5 to the first row of pixels 1 to the first row selection line 4 are applied. A bias current determined by the load MOS transistor 8 flows through the current path of the −1 to row selection circuit 40. The operating point of the pixel 1 is determined by the bias current and the temperature of the pn junction that is the thermoelectric conversion means of the pixel 1, and a pixel output voltage that changes depending on the temperature of the pixel 1 is generated in the vertical signal line 5 of each column. Then, the voltage of the vertical signal line 5 changes from the substrate voltage to the pixel output voltage.
[0058]
This voltage change of the vertical signal line 5 changes the gate voltage of the amplification transistor 10 by coupling by the coupling capacitor 11. Therefore, the gate voltage of the amplification transistor 10 is obtained by adding pixel output voltage change information to the threshold information of the amplification transistor 10 held in the non-selection period 100. As a result, the amplifying transistor 10 is turned on, and a drain current corresponding to the vertical signal line voltage flows. The current is integrated in the storage capacitor 12 during the first row selection period 101, and the drain voltage Vc changes. At this time, the gate voltage that dominates the drain current of the amplification transistor 10 is determined by the shift amount from the held threshold voltage, and thus is not affected by the threshold value that varies from column to column.
[0059]
In the horizontal readout period 102 following the selection period 101, the horizontal readout transistor 14 is sequentially selected by the horizontal selection circuit 6 and the drain voltages Vc1 and Vc2 are read out to the output line 24 in time series. The operations after the second row are the same as the operations in the first row except that there is no operation of the sample transistor 15, and the drain currents in the row selection period are integrated and sequentially read.
[0060]
According to the present embodiment, the threshold information of the amplification transistor 10 that is different for each column is held in the coupling capacitor 11 connected to the gate of the amplification transistor 10 by the threshold value reading operation in the non-selection period 100. In the current integration operation performed in the period 101, the influence of the variation in the threshold value of the amplification transistor 10 is eliminated, and the drain current is determined only by the pixel output voltage generated in the vertical signal line 5.
[0061]
Therefore, in the operation of the amplification readout circuit 9 by the drain current integration, the saturation of the storage capacitor 12 due to the threshold variation of about 30 mV, which is much higher than the pixel signal voltage on the order of μV generated in the vertical signal line 5 is prevented. It is not necessary to design a margin for this purpose. As a result, it becomes possible to obtain a high voltage gain, and the influence of noise in the amplification readout circuit 9 and thereafter can be greatly reduced, so that an infrared sensor with low noise, high sensitivity, and wide dynamic range can be obtained.
[0062]
The operation of the amplifying readout circuit 9 in this embodiment depends on the source voltage of the load MOS transistor 8, the selection pulse voltage of the row selection circuit 40, the source voltage of the amplifying transistor 10, the drain voltage of the reset transistor 13, etc. It is possible to optimize the operation.
[0063]
(Second Embodiment)
FIG. 4 is a timing chart for explaining the driving method of the infrared sensor according to the second embodiment of the present invention.
[0064]
The sensor configuration in this embodiment is the same as that in FIGS. 1 and 2 used in the first embodiment, and the timing chart is almost the same as that in FIG. 3 in the first embodiment. In 4), the source voltage SS of the amplification transistor 10 is pulse-driven. That is, during the threshold information acquisition operation of the amplification transistor 10 in the non-selection period 100, the pulse voltage is applied to the source SS of the transistor 10.
[0065]
According to such driving, it becomes possible to adjust the gate-source voltage of the amplification transistor 10 during the amplification read operation without changing the operating point of the path through which the bias current including the pixel 1 flows when the pixel is selected. The operating point of the reading circuit 9 can be easily adjusted, and the operation in a more optimal state can be performed. Therefore, an infrared sensor with lower noise, higher sensitivity, and wide dynamic range can be obtained.
[0066]
(Third embodiment)
FIG. 5 is a circuit diagram showing the overall configuration of an infrared sensor according to the third embodiment of the present invention. The sensor configuration diagram shown in FIG. 1 is simplified and the configuration of 25 pixels in 5 rows and 5 columns. Is shown. In addition, the same code | symbol is attached | subjected to FIG. 1 and an identical part, and the detailed description is abbreviate | omitted.
[0067]
A row selection pulse is applied to the row selection line 4 selected by the row selection circuit 40, and the bias current supplied from the low current circuit 80 by the load MOS transistor is applied to the vertical signal line 5 to the pixel 1 in the selected row. The pixel output voltage corresponding to the operating point of the pixel pn junction determined by the bias current and the temperature of the pixel 1 is generated in the vertical signal line 5. The vertical signal line 5 is connected to the amplification read circuit 90 via a threshold holding circuit 110 composed of a coupling capacitor 11 and a sample transistor 15, and the signal voltage information group for one row amplified in the amplification read circuit 90 is Then, the data are sequentially read from the horizontal reading circuit 70 selected by the horizontal selection circuit 6 to the output terminal Vout.
[0068]
In the present embodiment, an insensitive pixel row 200 in which one insensitive pixel 2 having no infrared sensitivity is arranged in the imaging region is arranged, and the row selection circuit 40 is similar to the normal pixel 1. The insensitive pixel 2 can be selected by the row selection means.
[0069]
FIG. 6 is a cross-sectional structure diagram (a) and a surface structure diagram (b) illustrating an example of the structure of the insensitive pixel 2. As apparent from the structure of the normal pixel shown in FIG. 2, the structure is the same as that of the normal pixel 1 except that the hollow structure 18 is not formed inside the support substrate 17. The structural structure is the same. However, since the hollow structure 18 is not formed, the heat generated when the incident infrared rays are absorbed by the infrared absorption layer 22 is conducted to the support substrate 17. That is, since the temperature of the sensor unit 16 does not change even when infrared rays are incident, the result is an insensitive pixel that does not have sensitivity to infrared rays.
[0070]
As shown in FIG. 5, output information of the insensitive pixel row 200 is obtained by driving the sensor including the insensitive pixel row 200 in the imaging region 3 according to the timing chart shown in FIG. 3. By obtaining the output of the insensitive pixel row 200, noise can be further reduced. That is, when the threshold information of the amplification transistor 10 is held in the coupling capacitor 11, reset noise of the coupling capacitor 11 is generated in the coupling capacitor 11. This reset noise is because the threshold information is held for one frame period. It is constant in each column within the frame period. Therefore, the signal can be removed by reading out the signal of the insensitive pixel row 200 and performing signal processing so that a difference from the normal pixel output can be obtained by an external circuit. An infrared sensor with low noise and high sensitivity can be obtained.
[0071]
This reset noise is represented by (kT / Cc) where Bc is the Boltzmann constant and T is the absolute temperature of the element, where Cc is the coupling capacitance value. ^1/2 In the case of Cc = 1 pF, it becomes about 60 μV. Since this value is 1/100 or less of the threshold variation value (about 30 mV) of the amplification transistor 10, it is not necessary to set an operation margin in the amplification readout circuit 9. In addition, it is generated as vertical streak-like fixed pattern noise in the frame, but it can be removed by taking the difference from the insensitive pixel output using the correlation in the frame, resulting in an increase in noise. There is nothing.
[0072]
Further, as shown in FIG. 7, a storage circuit 301 that holds an output information group for one row is provided, and an output from a row different from the held row is corrected by the output information group held in the storage circuit 301. It is also possible to perform processing on the chip by a sensor structure including the correction circuit 302 in the chip.
[0073]
(Fourth embodiment)
FIG. 8 is a timing chart for explaining a driving method of the infrared sensor according to the fourth embodiment of the present invention, and an example of driving a 2-by-2 element including an insensitive pixel row in the first row. Show.
[0074]
The sensor configuration in this embodiment is the same as that of FIG. 5 used in the third embodiment. In FIG. 8, an example of 2 rows and 2 columns is shown for ease of explanation, but it is needless to say that the case of 5 rows and 5 columns can be similarly applied.
[0075]
In the present embodiment, the threshold information of the amplification transistor 10 is read not during the non-selection period but during the selection period 103 of the insensitive pixel row. In order to read threshold information in the period 103 during which the insensitive pixel row 200 is selected, a pulse voltage is applied to the amplification transistor source SS in this period 103. The threshold information read in the insensitive pixel row selection period 103 is read out to the output line 24 by sequentially selecting the horizontal readout transistors 14 by the horizontal selection circuit 6 in the subsequent horizontal readout period 104.
[0076]
As described above, in this embodiment, the offset voltage added to the threshold information read to the coupling capacitor 11 can be adjusted by the pulse voltage applied to the amplification transistor source. Therefore, the operating point of the amplification readout circuit 9 can be adjusted. Is possible. By performing the operation of reading the threshold information during the period 103 during which the insensitive pixel row 200 is selected, not only the threshold information of the amplification transistor 10 but also the threshold information of the load MOS transistor 8 that is a constant current source is read simultaneously. As a result, the gain of the amplification readout circuit 9 can be set larger, and an infrared sensor with lower noise, higher sensitivity, and wider dynamic range can be obtained.
[0077]
(Fifth embodiment)
FIG. 9 is a timing chart for explaining the driving method of the infrared sensor according to the fifth embodiment of the present invention. In this figure, driving of a pixel configuration of 2 rows and 3 columns with an insensitive pixel row in the first row is shown.
[0078]
In the present embodiment, the row selection circuit 40 selects the insensitive pixel row 200 twice, reads threshold information in the first row selection period 103, and performs insensitive pixels in the second row selection period 105. I am getting output. Further, the threshold information read in the selection period 103 is read in the subsequent horizontal reading period 104, and the insensitive pixel output read in the selection period 105 is read in the subsequent horizontal reading period 106.
[0079]
As described above, according to the timing of FIG. 9, it is possible to perform the threshold value reading operation by the insensitive pixel and the reading of the insensitive pixel output with a structure in which only one insensitive pixel row is provided. Then, the influence of the threshold value variation of the amplification transistor 10 can be eliminated by reading the threshold value, and in addition to the reading of the insensitive pixel output, the difference is obtained from the normal pixel output by the external circuit described above. The reset noise of the capacitor 11 can be eliminated.
[0080]
(Sixth embodiment)
FIG. 10 is a circuit diagram showing the overall configuration of an infrared sensor according to the sixth embodiment of the present invention. The sensor configuration diagram shown in FIG. 1 is simplified and the configuration of 25 pixels in 5 rows and 5 columns. Is shown. Although basically the same as the configuration of FIG. 5 described in the third embodiment, two rows of insensitive pixels 2 are provided in this embodiment.
[0081]
The sensor driving method of FIG. 10 is as shown in the timing chart of FIG. 11. The threshold information is read in the period 103 for selecting the first insensitive pixel row, and the insensitive pixel in the second row. Insensitive pixel output is obtained in a period 105 for selecting a row. A high voltage is applied to the source of the amplification transistor 10 during the threshold information readout period 103, and a low voltage is applied to the amplification readout periods 105 and 101 of the pixel output signal.
[0082]
According to the present embodiment, similarly to the fifth embodiment, it is possible to perform the threshold value reading operation by the insensitive pixel and the reading of the insensitive pixel output, thereby eliminating the influence of the variation in the threshold value of the amplification transistor 10. And reset noise of the coupling capacitor 11 can be eliminated. In addition, since a simple shift register circuit can be used for the row selection circuit 40, it is easy to design a peripheral circuit.
[0083]
(Seventh embodiment)
In the configuration example shown in FIG. 7, the storage / holding means 301 that holds the output signal based on the held threshold information for one frame period, or the correction for the effective output signal based on the held / stored information. Correction means 302 is necessary. Further, since the threshold information is held in the coupling capacitor 11 for one frame period, the coupling capacitor 11 is easily affected by a leakage current of a transistor connected to the coupling capacitor 11 and the coupling capacitor 11. Therefore, when these leak currents are large, the stored threshold information changes within one frame period, and there is a possibility that vertical shading occurs in the output image. Therefore, this is solved in the following embodiment.
[0084]
FIG. 12 is a circuit diagram showing an overall configuration of an infrared sensor according to the seventh embodiment of the present invention, and shows a 3 × 2 pixel configuration in 3 rows and 2 columns. The same parts as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. Further, in the figure, a 3 × 2 pixel configuration with 2 rows and 2 columns is shown for ease of explanation, but it is of course applicable to an m × n pixel configuration with more rows and columns.
[0085]
Infrared detection pixels 1 are arranged in the upper two rows of FIG. 12, and insensitive pixels 2 are arranged in the lower row of FIG. The imaging region 3 includes a region in which infrared detection pixels 1 that convert incident infrared rays into electric signals are two-dimensionally arranged, and an insensitive pixel row 200 in which the insensitive pixels 2 are arranged in the row direction. is doing.
[0086]
An example of the structure of the infrared detection pixel 1 is the same as that shown in FIG. An example of the structure of the insensitive pixel 2 is the same as that shown in FIG. In FIG. 12, the insensitive pixel row 200 is arranged in the lower row in FIG. 12, but a configuration such as arrangement in the upper row in FIG. 12 is also possible if necessary. Further, it is necessary to arrange at least one insensitive pixel row 200, but it is also possible to arrange two or more rows as necessary.
[0087]
In the imaging region 3, row selection lines 4 (4-1, 4-2, 4-3) and vertical signal lines 5 (5-1, 5-2) are arranged. The row selection line 4 is connected to a row selection circuit 40 that is a circuit for row selection, and is row-selected. A constant current source for supplying a bias current for reading signals from the infrared detection pixel 1 and the insensitive pixel 2 is connected to the vertical signal line 5.
[0088]
A first coupling capacitor 11 is disposed between the vertical signal line 5 and the gates of the amplification transistors 10 (10-1 and 10-2), and a sampling transistor 15 is disposed between the gate and drain of the amplification transistor 10. The problem due to the threshold voltage variation of the amplification transistor 10 is avoided as in the configuration of FIG. However, in the configuration of FIG. 12, the configuration after the amplification read circuit is different. The drain of the amplification transistor 10 is connected to the second coupling capacitor 33 via the integration transistor (INT) 32 arranged in each column. The other end of the second coupling capacitor 33 is connected to a storage capacitor 30 and a clamp transistor (CL) 31. The signal voltage stored and held in the storage capacitor 30 is sequentially read out by the horizontal selection circuit 6 to the output unit Vout in time series via the horizontal read transistors 6 (6-1 and 6-2).
[0089]
With the configuration of FIG. 12, it is possible to sample the threshold voltage information of the amplification transistor within each horizontal scanning period, and to shorten the period during which the threshold voltage information is held in the coupling capacitor 11 to the horizontal scanning period. 11 and the sampling transistor 15 connected thereto can be greatly reduced in the influence of leakage current.
[0090]
For example, in the configuration of FIG. 1 in which the threshold voltage holding period in the coupling capacitor 11 is a frame period, vertical shading may occur due to the influence of the above-described leakage current. Furthermore, if the above-described leakage current increases due to fluctuations in the manufacturing process or the like, a larger vertical shading problem may occur, or imaging may not be possible after a certain line. There are problems with stability and manufacturing stability.
[0091]
On the other hand, according to the present embodiment, since the threshold voltage is sampled every horizontal scanning period, the above-described vertical shading does not occur essentially. In addition, the threshold voltage holding time has been greatly shortened from the frame period to the horizontal scanning period, so the specifications for leakage current will be greatly relaxed, greatly improving manufacturing stability and stability. Manufacturing is possible.
[0092]
Furthermore, according to the configuration of FIG. 12, it is possible to perform a difference process between the output voltage from the infrared detection pixel 1 and the output voltage from the insensitive pixel 2 within each horizontal scanning period. The effects obtained by this difference processing are the following two noise reduction effects and the manufacturing yield improvement effect obtained in association with each of them. One is that the reset noise of the coupling capacitor 11 generated in the sampling of the threshold voltage information of the amplification transistor 10 can be removed inside the column amplification readout circuit. The reset noise in the coupling capacitor 11 is estimated as follows.
[0093]
The reset noise voltage Vn is Vn = (kT / C) ^1/2 It is expressed by However, k: Boltzmann constant, T: Absolute temperature. Accordingly, assuming 1 pF as the coupling capacitance value, the reset noise generated in the coupling capacitance is about 60 μV. This is a very large noise component that is 1.2 [° C.] in terms of subject temperature when the above-described estimation result of infrared sensitivity is applied. Therefore, in order to realize a highly sensitive sensor, it is indispensable to remove this coupling capacitance reset noise by some means. One example of an element configuration for removing the reset noise is shown in FIG.
[0094]
Next, an example of a timing chart for driving the infrared sensor of the present embodiment is shown in FIG. 13, and the operation of the infrared sensor of FIG. 12 will be described along the timing chart of FIG. The operations in the horizontal blanking period 301 are the threshold sampling operation of the amplification transistor 10 (FIG. 13, period a), the signal reading operation from the insensitive pixel 2 (FIG. 13, period b), and the signal from the infrared detection pixel 1. This is a read operation (FIG. 13, period c).
[0095]
First, all the row selection lines 4 are turned off in a non-selected state in which row selection by the row selection circuit 40 is not performed. Therefore, as described above, the substrate potential Vs applied as the source voltage of the load MOS transistor 8 is generated on the vertical signal line 5. Then, the sampling transistor 15 and the reset transistor 14 are turned on. By this operation, the gate and the drain of the amplification transistor 10 have the same voltage, and are reset by the reset transistor 15, so that both of the amplification transistors 10 are turned on.
[0096]
Next, when the reset transistor 15 is turned off, the drain voltage and the gate voltage of the amplification transistor 10 are reduced by the respective drain currents, and converge to the state where the respective drain currents are zero. At this time, the drain voltage and the gate voltage of each amplification transistor 10 are the threshold voltages of each amplification transistor 10. Thereafter, by turning off the sampling transistor 15, the gate and drain of the amplification transistor 10 are separated, and thereafter, each sampled threshold voltage is held in the first coupling capacitor 11 for each column.
[0097]
Next, the reset transistor 14, the integration transistor 32, and the clamp transistor 31 are turned on. At this time, the drain voltage of the amplification transistor 10 and the voltage of the second coupling capacitor 33 are reset, and the voltage Vcs of the storage capacitor 30 is fixed to a desired voltage.
[0098]
Next, the reset transistor 14 is turned off, and amplification readout by the gate modulation integration circuit is started. The power supply voltage Vd is applied to the row selection line 4-3 by the row selection circuit 40, and the insensitive pixel row 200 is selected. At this time, the insensitive pixels 2 in the insensitive pixel row 200 are forward biased from the load MOS transistor 8 through the vertical signal line 5, and the forward bias current determined by the load MOS transistor 8 and the temperature of the semiconductor substrate 17 are determined. The operating point of the pn junction in the insensitive pixel 2 is determined, and an insensitive pixel output is generated on the vertical signal line 5. The voltage change generated in the vertical signal line 5 modulates the gate voltage change of the amplifying transistor 10 via the coupling capacitor 11, the amplifying transistor 10 is turned on, a drain current flows, and is accumulated in the second coupling capacitor 33.
[0099]
Next, by turning off the selection of the row selection line 4-3 by the row selection circuit 40, the amplification transistor 10 is turned off, the gate modulation integration readout operation is completed, and the signal output of the insensitive pixel 2 is second coupled. Accumulated in the capacity 33. Then, after the clamp transistor 31 is turned off, the reset transistor 14 is turned on, the drain voltage of the amplification transistor 10 and the voltage of the second coupling capacitor 33 are reset, and the reset transistor 14 is turned off again.
[0100]
The row selection circuit 40 applies a power supply voltage to the row selection line 4-1, and selects the infrared detection pixels in the first row. At this time, the infrared detection pixels 1 in the first row selected from the load MOS transistor 8 via the vertical signal line 5 are forward-biased, the forward bias current determined by the load MOS transistor 8, and the inside of the infrared detection pixel 1. The operating point of the pn junction in the infrared detection pixel 1 is determined by the temperature of the sensor unit 16, and the infrared detection pixel output of the first row is generated on the vertical signal line 5. The period during which the first row is selected by the row selection circuit 40 (FIG. 13, period c), and the gate modulation integration by the infrared detection pixel output by the same operation as the insensitive pixel row selection period (FIG. 13, period b). A read operation is performed, and the drain current is accumulated in the second coupling capacitor 33 as a signal charge. At this time, since the clamp transistor 31 is off, the voltage Vcs of the storage capacitor 30 is modulated by the generation of the signal charge by the infrared detection pixel.
[0101]
Finally, the integration transistor 32 is turned off to complete the operation of the horizontal blanking period for the first row. At this time, the storage capacitor 30 holds the voltage Vcs modulated by the difference between the output from the insensitive pixel 2 and the output from the infrared detection pixel 1 on the basis of the clamp voltage fixed by the ON operation of the clamp transistor 31. Has been.
[0102]
Next, in the horizontal effective period 300, the horizontal reading transistor 7 is sequentially turned on by the horizontal selection circuit 6, and the output signal is read to the output line 24 in time series. In the subsequent horizontal blanking period 302, the operation is basically the same as that in the horizontal blanking period 301 described above, and the row selection line selected by the row selection circuit 40 is the first row selection line 4-1. However, the same operation is performed except that the second row selection line 4-2. Further, in the horizontal effective period 300 subsequent to the horizontal blanking period 302, the horizontal read transistors 6 are sequentially turned on by the horizontal selection circuit 6 in the same manner as the signal reading of the first row, and the output signal is read to the output line 24 in time series. It is.
[0103]
According to the above operation, as described above, it is possible to perform threshold sampling of the amplifying transistor 10 in each horizontal scanning period, which is low noise and highly resistant to manufacturing process fluctuations, and has a high manufacturing yield. An infrared sensor can be realized. In addition, unlike the configuration example shown in FIG. 7, the infrared sensor system can be reduced in cost because it can be realized on-chip without the need to provide external circuits such as the memory holding means 301 and the correction means 302.
[0104]
Although there are variations in the timing chart for driving the embodiment of FIG. 12 other than FIG. 13, an example in which the source voltage of the amplification transistor 10 is pulse-driven will be described with reference to FIG. FIG. 14 and FIG. 13 basically perform the same operation, and most of the timing charts are the same. In FIG. 14, the voltage of the amplification transistor source SS, which was DC drive in FIG. 13, is pulse driven. A pulse is also added to the row selection line 4-3 of the insensitive pixel row 200 at the timing synchronized with it. Since the operation in FIG. 14 is basically the same as that in FIG. 13, the description of the same parts is omitted.
[0105]
In the drive of FIG. 14, the pulse voltage Vs is applied to the source SS in the threshold voltage sampling operation of the amplification transistor 10 in the initial stage of the horizontal blanking period 301 (FIG. 14, period a), and at the same time, the insensitive row 200 is selected. For this purpose, the row selection line 4-3 is also turned on. In this operation, since the source SS of the amplifying transistor 10 is set to a voltage higher than the substrate voltage Vs, the threshold voltage to be sampled becomes a value when the source SS of the amplifying transistor 10 is Vs. A higher threshold voltage will be sampled. In the subsequent operation from selection of the insensitive pixel row 200 to gate modulation integration readout operation and selection of the infrared detection pixel to gate modulation integration readout operation, the source SS is set to the substrate voltage Vs.
[0106]
According to the driving shown in FIG. 14, the number of adjustment targets for adjustment of the operating point of the amplification transistor 10 is increased, and the element operation can be performed in a more optimal state. As a result, higher sensitivity characteristics can be obtained. That is, in the driving of FIG. 13, the operating point of the amplification transistor 10 is determined by the power supply voltage Vd applied to the row selection line 4 by the row selection circuit 40. However, the power supply voltage Vd applied by the row selection circuit 40 also affects the sensitivity of the infrared detection pixel 1, so that adjustment for optimizing the operation of the amplification transistor 10 cannot always be performed. Therefore, the amplification factor of the amplification transistor 10 may not be optimized, and the highest sensitivity cannot be obtained.
[0107]
13 and 14 exemplify timing charts in which the signal output from the insensitive pixel 2 is read first, and then the signal output from the infrared detection pixel 1 is illustrated. Conversely, the signal readout from the infrared detection pixel 1 is performed. It is of course possible to read out the signal from the insensitive pixel 2 after it has been performed. 13 and 14 exemplify timing charts for differential processing of the output signals of the infrared detection pixel 2 and the insensitive pixel 1, the differential processing between outputs from the infrared detection pixels in different rows is illustrated. It is also possible to do this. In that case, in addition to the effects described so far, for example, difference processing between adjacent rows can be performed, and although it is limited to the vertical direction, so-called edge detection can also be performed.
[0108]
(Eighth embodiment)
FIG. 15 is a configuration diagram of an infrared sensor for explaining an eighth embodiment of the present invention. FIG. 15 shows a 3 × 2 pixel configuration. Infrared detection pixels 1 are arranged in the upper two rows of FIG. 15, and insensitive pixels 2 are arranged in the lower row of FIG. Has been.
[0109]
The imaging region 3 includes a region in which infrared detection pixels 1 that convert incident infrared rays into electric signals are two-dimensionally arranged, and an insensitive pixel row 200 in which the insensitive pixels 2 are arranged in the row direction. is doing. The structures of the infrared detection pixel 1 and the insensitive pixel 2 are the same as those illustrated in FIGS. 2 and 6, respectively. The basic part of the configuration of FIG. 15 is the same as that of FIG. 12 which is the seventh embodiment, and therefore the description thereof will be omitted. Here, differences from the seventh embodiment will be mainly described.
[0110]
The imaging region 3 and its peripheral circuit configuration, the configuration of the gate modulation integration readout circuit connected from the vertical signal lines 5-1 and 5-2 through the first coupling capacitor 11, and differential processing of the two signal readout results The circuit has the same configuration as in FIG. In the present embodiment, a one-stage sample hold circuit is further provided between the first storage capacitor 30 that holds the signal voltage after differential processing and the horizontal readout transistor 14.
[0111]
That is, the signal voltage held in the first storage capacitor 30 is connected to the second storage capacitor 43 via the transfer transistor 42, and the horizontal read transistor 14 is the signal stored in the second storage capacitor 43. Are sequentially read out. In order to initialize the voltage of the second storage capacitor 43, a second reset transistor 44 is connected to the second storage capacitor 43. Gate modulation integration performed using the first storage capacitor 30 while the signal voltage is held in the second storage capacitor 43 by separating the first storage capacitor 30 and the second storage capacitor 43 by the transfer transistor 42. A read operation can be performed.
[0112]
An example of a timing chart for driving the infrared sensor according to the present embodiment of FIG. 15 is shown in FIG. 16, and the operation and effect will be described below.
[0113]
The present embodiment is different from the seventh embodiment in that the readout operation of the imaging signal performed in the horizontal blanking periods 101 and 102 is performed in the effective period 100. In the first effective period 100, an operation similar to the operation in the horizontal blanking period in FIG. 13 is performed, whereby the threshold voltage sampling operation of the amplification transistor 10 in each horizontal scanning period (FIG. 16, period a), the first A dark signal gate amplification integration readout operation from the insensitive pixel 2 in a state where the voltage of the storage capacitor 30 is fixed (FIG. 16, period b), and selection performed after the clamp transistor 31 for differential processing is turned off The gate amplification integration readout operation (FIG. 16, period c) of the optical signal from the infrared detection pixel 1 in the row is performed. As a result, the first storage capacitor 30 is free from the influence of variations in the threshold value of the amplification transistor 10, and further, as a result of band limitation at a low frequency, the 1 / f noise of the load MOS transistor 8 and the amplification transistor 10 is obtained. A low-noise signal voltage in a state where the voltage drops is maintained.
[0114]
During this time, the transfer transistor 42 is turned off, and the horizontal read transistor 14 is separated from the first storage transistor 30. The horizontal readout transistors 14 are sequentially selected by a horizontal selection pulse from the horizontal selection circuit 6, but a reset signal is output to the output unit 24.
[0115]
The operation in the horizontal blanking period 101 in the present embodiment is only an operation of transferring the signal voltage stored in the first storage capacitor 30 to the second storage capacitor 43 (FIG. 16, period d). First, the second reset transistor 44 is turned on to reset the voltage of the second storage capacitor 43, and the second reset transistor 44 is turned off again. Next, the transfer transistor 42 is turned on, the signal charge held in the first storage capacitor 30 is transferred to the second storage capacitor 43, and the transfer transistor 42 is turned off again. In the horizontal blanking period 101, the signal voltage transferred to the second storage capacitor 43 is sequentially read out in the next effective period (FIG. 16, period e).
[0116]
According to the present embodiment, the gate modulation integration readout operation from the insensitive pixel 2 and the gate modulation integration readout operation from the infrared detection pixel 1 can be performed within an effective period that occupies most of the horizontal scanning period. It becomes. That is, the width of the row selection pulse that governs the above-described gate modulation integration reading operation can be greatly expanded. As a result, band limitation on the high frequency side of the signal frequency band is possible, and random noise can be reduced, so that an infrared sensor with lower noise can be obtained. Of course, the effect of the seventh embodiment, which is the effect of reducing the 1 / f noise generated in the load MOS transistor and the amplification transistor due to the band limitation on the low frequency side of the signal frequency band, and the threshold voltage in every horizontal scanning period. The effect of preventing vertical shading by sampling and the effect of removing high-level reset noise generated in the first coupling capacitor 11 by the differential processing operation can also be obtained in this embodiment.
[0117]
In addition, because of these features, resistance to fluctuations in the manufacturing process has been improved. As in the seventh embodiment, even if there are fluctuations in the manufacturing process, it is possible to stably manufacture with a high yield. Can also be obtained.
[0118]
Although there are variations in the timing chart for driving the infrared sensor shown in FIG. 15 in addition to FIG. 16, an example in which the source voltage of the amplification transistor 10 is pulse-driven will be described with reference to FIG. 17 and 16 basically perform the same operation, and most of the timing charts are the same. In FIG. 17, the potential of the source SS of the amplification transistor 10, which was DC drive in FIG. 16, is pulse-driven. A pulse is also added to the row selection line 4-3 of the insensitive row 200 at the timing synchronized with it.
[0119]
Since the operation in FIG. 17 is basically the same as that in FIG. 16, the description of the same parts is omitted. The drive of FIG. 17 applies the pulse voltage Vs to the source SS of the amplifying transistor 10 in the threshold voltage sampling operation of the amplifying transistor 10 in the initial stage of the effective period 100 (FIG. 17, period a), and at the same time, The row selection line 4-3 is also turned on to make a selection. In this operation, since the source SS of the amplifying transistor 10 is set to a voltage higher than the substrate voltage Vs, the threshold voltage to be sampled becomes a value when the source SS of the amplifying transistor 10 is Vs. A higher threshold voltage will be sampled. In the subsequent operation from selection of the insensitive pixel row to gate modulation integration readout operation and selection of the infrared detection pixel to gate modulation integration readout operation, the source SS is set to the substrate voltage Vs.
[0120]
According to the driving of FIG. 17, the number of adjustment targets for the adjustment of the operating point of the amplification transistor 10 is increased, and the element operation can be performed in a more optimal state. As a result, further high sensitivity characteristics can be obtained. That is, in the driving of FIG. 16, the operating point of the amplification transistor 10 is determined by the power supply voltage Vd applied to the row selection line 4 by the row selection circuit 40. However, the power supply voltage Vd applied by the row selection circuit 40 also affects the sensitivity of the infrared detection pixel 1, so that adjustment for optimizing the operation of the amplification transistor 10 cannot always be performed. Therefore, the amplification factor of the amplification transistor 10 may not be optimized, and the highest sensitivity cannot be obtained.
[0121]
16 and 17 exemplify timing charts in which the signal output from the insensitive pixel 2 is first read and the signal output from the infrared detection pixel 1 is subsequently read. However, the signal read from the infrared detection pixel 1 is reversed. It is of course possible to read out the signal from the insensitive pixel 2 after performing the above. Further, FIGS. 16 and 17 illustrate timing charts for differential processing of output signals from the infrared detection pixel 2 and the insensitive pixel 1, but differential processing between outputs from the infrared detection pixels in different rows is performed. It is also possible to do this. In that case, in addition to the effects described so far, for example, difference processing between adjacent rows can be performed, and although it is limited to the vertical direction, so-called edge detection can also be performed.
[0122]
The present invention is not limited to the above-described embodiments. The pixel configuration can be applied to various m × n pixel configurations other than those shown in the embodiment. The infrared detection pixel is not limited to the structure in FIG. 2 and can be appropriately changed according to the specification. Specifically, infrared absorption means for absorbing incident infrared rays on a semiconductor substrate and converting them into heat, thermoelectric conversion means for converting temperature changes caused by heat generated by the infrared absorption means into electrical signals, and thermoelectric conversion What is necessary is just to have a pixel selection means for selecting a pixel from which the pixel output signal from the means is read out and an output means for outputting a pixel output signal from the infrared detection pixel selected by the pixel selection means. It is also possible to use an element capable of directly converting infrared light into an electrical signal.
[0123]
In addition, various modifications can be made without departing from the scope of the present invention.
[0124]
【The invention's effect】
As described above in detail, according to the present invention, a coupling capacitor is provided between the signal line for generating a pixel output and the gate of the amplification transistor to separate them in a DC manner, and sampling is performed between the drain and the gate of the amplification transistor. A transistor is provided so that the threshold information of the amplification transistor for each column is provided to the gate of the amplification transistor for each frame. Therefore, the operation voltage of the storage capacitor necessary for ensuring the voltage swing of the storage capacitor due to the threshold variation. It is not necessary to set the margin of the area. Therefore, the gain of the gate modulation integration circuit can be designed to be large, and the sensitivity can be improved. For the same reason, the storage capacitor potential can be fully utilized, and the dynamic range can be expanded. This makes it possible to realize an uncooled infrared sensor with low noise, high sensitivity, and wide dynamic range. In addition, since resistance to fluctuations in the manufacturing process is improved, stable manufacturing is possible with a high manufacturing yield.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an overall configuration of an infrared sensor according to a first embodiment.
FIG. 2 is a diagram showing a cross-sectional structure and a planar structure of an infrared detection pixel used in the first embodiment.
FIG. 3 is a timing chart for explaining a driving method of the infrared sensor according to the first embodiment.
FIG. 4 is a timing chart for explaining a driving method of an infrared sensor according to a second embodiment.
FIG. 5 is a circuit diagram showing an overall configuration of an infrared sensor according to a third embodiment.
FIG. 6 is a diagram showing a cross-sectional structure and a planar structure of an insensitive pixel used in the third embodiment.
FIG. 7 is a view showing a modification of the third embodiment.
FIG. 8 is a timing chart for explaining a driving method of the infrared sensor according to the fourth embodiment.
FIG. 9 is a timing chart for explaining an infrared sensor driving method according to a fifth embodiment;
FIG. 10 is a circuit diagram showing an overall configuration of an infrared sensor according to a sixth embodiment.
FIG. 11 is a timing chart for explaining a driving method of the infrared sensor according to the sixth embodiment.
FIG. 12 is a circuit diagram showing the overall configuration of an infrared sensor according to a seventh embodiment.
FIG. 13 is a timing chart for explaining an infrared sensor driving method according to the seventh embodiment;
FIG. 14 is a timing chart for explaining an infrared sensor driving method according to the seventh embodiment;
FIG. 15 is a circuit diagram showing the overall configuration of an infrared sensor according to an eighth embodiment.
FIG. 16 is a timing chart for explaining an infrared sensor driving method according to an eighth embodiment;
FIG. 17 is a timing chart for explaining a driving method of the infrared sensor according to the eighth embodiment.
[Explanation of symbols]
1 ... Infrared detection pixel
2 ... Insensitive pixels
3 ... Imaging area
4 ... Row selection line
40. Row selection circuit
5. Vertical signal line
6 ... Horizontal selection circuit
7 ... Horizontal selection line
70: Horizontal readout circuit
8 ... Load MOS transistor
80 ... Constant current circuit
9 ... Column amplification readout circuit
90 ... Amplification readout circuit
10 ... Amplification transistor
11 ... Coupling capacity
110... Threshold holding circuit
12 ... Storage capacity
14 ... Reset transistor
15 ... Sample transistor
16 ... sensor part
17 ... Support substrate
18 ... Hollow structure
19 ... SOI single crystal silicon layer
20 ... Embedded silicon oxide layer
21 ... Supporting part
22 ... Infrared absorbing layer
24 ... Output unit
25 ... Amplification transistor source
100 ... Non-selection period
101, 103, 105 ... row selection period
102, 104, 106 ... horizontal readout period
200 ... insensitive pixel row
301: Row output information storage circuit
302 ... Output correction circuit

Claims (10)

An imaging region in which infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate;
A plurality of row selection lines arranged in the row direction in the imaging region;
A plurality of signal lines arranged in a column direction in the imaging region;
A plurality of amplification transistors each modulated by a signal voltage generated in these signal lines;
A plurality of storage capacitors connected to the drains of these amplification transistors, respectively, for storing signal charges from the transistors;
A plurality of reset means for resetting the drain potential of each amplification transistor;
A plurality of readout means for respectively reading out signal charges held in the respective storage capacitors;
A plurality of coupling capacitors respectively provided between each signal line and the gate of the amplification transistor corresponding to the signal line;
A plurality of sampling transistors provided between the drain and gate of each amplification transistor;
An infrared sensor comprising: A driving method for driving the infrared sensor according to claim 1,
In a non-selection period in which the infrared detection pixel is not selected by the row selection line within one frame period, the drain potential of the amplification transistor is turned off in the first period of the non-selection period. In a non-reset state, the drain and gate of the amplification transistor are connected to the same potential by turning on the sample transistor, and in the second period excluding the first period in the non-selection period, The sample transistor is turned off to separate the drain and gate of the transistor, the amplification transistor gate holds the drain potential of the transistor in the first period,
The infrared transistor is characterized in that the sample transistor is held in an off state during a selection period in which the infrared detection pixel is selected by the row selection line within one frame period and a period in which a signal voltage is read out by the reading means. Sensor drive method. An imaging region in which infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate and at least one insensitive pixel row having no infrared sensitivity is included;
A plurality of row selection lines arranged in the row direction in the imaging region;
A plurality of signal lines arranged in a column direction in the imaging region;
A plurality of amplification transistors each modulated by a signal voltage generated in these signal lines;
A plurality of storage capacitors connected to the drains of these amplification transistors, respectively, for storing signal charges from the transistors;
A plurality of reset means for resetting the drain potential of each amplification transistor;
A plurality of readout means for respectively reading out signal charges held in the respective storage capacitors;
A plurality of coupling capacitors respectively provided between each signal line and the gate of the amplification transistor corresponding to the signal line;
A plurality of sampling transistors provided between the drain and gate of each amplification transistor;
An infrared sensor comprising: A driving method for driving the infrared sensor according to claim 3,
In the first selection period in which the insensitive pixel row is selected by the row selection line within one frame period, the resetting unit is turned off in the first period within the first selection period. The drain potential of the amplification transistor is not reset, and the sample transistor is turned on to connect the drain and gate of the amplification transistor to have the same potential, and the first source voltage is applied to the source of the amplification transistor. In the second period excluding the first period within the first selection period, the sample transistor is turned off to separate the drain and gate of the amplification transistor, and the gate of the amplification transistor includes the first Holding the drain potential of the transistor during the period of
In the second selection period in which the sensitive pixel row is selected by the row selection line within one frame period, the sample transistor is held in an off state, and the source of the amplification transistor is the first source. Applying a second source voltage different from the voltage;
In a period in which a signal voltage is read by the reading means by the row selection line within one frame period, the first source voltage is applied to the source of the amplifying transistor while the sample transistor is held in an off state. A method for driving an infrared sensor. An imaging region in which infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate and at least one insensitive pixel row having no infrared sensitivity is included;
A plurality of row selection lines arranged in the row direction in the imaging region;
A plurality of signal lines arranged in a column direction in the imaging region;
A plurality of amplification transistors each modulated by a signal voltage generated in these signal lines;
A plurality of storage capacitors connected to the drains of these amplification transistors, respectively, for storing signal charges from the transistors;
A plurality of reset means for resetting the drain potential of each amplification transistor;
A plurality of readout means for respectively reading out signal charges held in the respective storage capacitors;
A plurality of coupling capacitors respectively provided between each signal line and the gate of the amplification transistor corresponding to the signal line;
A plurality of sampling transistors each provided between a drain and a gate of the amplification transistor;
Storage holding means for holding a first row output information group obtained in time series from the reading means;
Based on the first row output information group held in the memory holding means, the second row output information group obtained as a result of selecting a row different from the row from which the first row output information group is obtained is corrected. Correction means;
An infrared sensor comprising: An imaging region in which infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate and at least two insensitive pixel rows having no infrared sensitivity are included;
A plurality of row selection lines arranged in the row direction in the imaging region;
A plurality of signal lines arranged in a column direction in the imaging region;
A plurality of amplification transistors each modulated by a signal voltage generated in these signal lines;
A plurality of storage capacitors connected to the drains of these amplification transistors, respectively, for storing signal charges from the transistors;
A plurality of reset means for resetting the drain voltage of each of the amplification transistors;
A plurality of readout means for respectively reading out signal charges held in the respective storage capacitors;
A plurality of coupling capacitors respectively provided between each signal line and the gate of the amplification transistor corresponding to the signal line;
A plurality of sampling transistors each provided between a drain and a gate of the amplification transistor;
An infrared sensor comprising: A driving method for driving the infrared sensor according to claim 6,
In the first selection period in which the first insensitive pixel row is selected by the row selection line within one frame period, the reset unit is turned off in the first period within the first selection period. Thus, the drain potential of the amplification transistor is not reset, and the sample transistor is turned on to connect the drain and gate of the amplification transistor to the same potential, and the source voltage of the amplification transistor is the first source voltage. Is applied, and in the second period excluding the first period within the first selection period, the sample transistor is turned off to separate the drain and gate of the amplification transistor, and the amplification transistor gate includes Holding the drain potential of the transistor during one period;
A second selection period in which a second insensitive pixel row different from the first insensitive pixel row is selected by the row selection line within one frame period, and a sensitive pixel row is selected by the row selection line. In the third selection period, the sample transistor is held in an off state, and a second source voltage different from the first source voltage is applied to the source of the amplification transistor,
An infrared sensor characterized in that a first source voltage is applied to a source of the amplification transistor while the sample transistor is held in an off state during a period in which a signal voltage is read by the reading means within one frame period. Driving method. Infrared detection pixels for detecting incident infrared rays are two-dimensionally arranged on a semiconductor substrate, and at least one insensitive pixel row not having infrared sensitivity is included together with a plurality of sensitive pixel rows having infrared sensitivity. An imaging area;
A plurality of row selection lines arranged in the row direction in the imaging region;
A plurality of signal lines arranged in a column direction in the imaging region;
A plurality of amplification transistors respectively connected to each of these signal lines via a first coupling capacitor;
A plurality of sampling transistors provided between the drain and gate of each of these amplification transistors;
A plurality of first storage capacitors respectively connected to the drains of the amplification transistors via a second coupling capacitor;
A plurality of first reset means for resetting the drain potential of each of the amplification transistors;
A plurality of clamping means for clamping the voltage of each of the first storage capacitors;
A plurality of readout means for respectively reading out the signal charges held in each of the first storage capacitors;
An infrared sensor comprising: A plurality of second storage capacitors respectively connected to the first storage capacitors via transfer transistors; and a plurality of second reset means for resetting the voltages of the second storage capacitors, respectively.
9. The infrared sensor according to claim 8, wherein the signal charges transferred to the second storage capacitors are respectively read by the plurality of reading means. A driving method for driving the infrared sensor according to claim 8,
A period for reading out detection signals of the infrared detection pixels in units of rows is a horizontal scanning period, and the amplification transistor is turned on by turning on the sampling transistor in a state where reset means is turned off during a horizontal blanking period of each horizontal scanning period. The threshold information sampling operation is performed, then the insensitive pixel row selected by the row selection line is amplified and read out, and then the sensitive pixel row selected by the row selection line is amplified and read out. In the readout period of the insensitive pixel row, the clamp means clamps the voltage of the storage capacitor to a predetermined voltage, and holds the clamp means in the off state in the amplification readout period of the sensitive pixel row, At the end of the amplification readout period of the sensitive pixel row, the insensitive pixel output and the sensitive are stored in the storage capacitor. A method of driving an infrared sensor, which accumulates a difference output from a pixel output, sequentially reads out the difference output through the readout means, and makes a sensitive pixel row different for each scanning period in one frame. .

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