JPH01154678A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To improve sensitivity by accumulating the output of an amplifying means to amplify a signal charge accumulated at a photodiode, to an accumulating means and scanning successively the output of the accumulating means. CONSTITUTION:When a photodiode 1 of one horizontal direction column is selected, respective picture element amplifiers 4 of one column are operated as the driver transistor of a source follower. The output of respective source followers is stored through a gate switch 9 to an accumulating capacity 11. Next, the output of respective source followers is stored through a gate switch 10 to an accumulating capacity 12. During the horizontal scanning output period, a horizontal register 22 successively switchably scans horizontal gate switches 13 and 14 corresponding to respective picture elements and thus, the source follower output charge accumulated at accumulating capacities 11 and 12 is successively outputted from a horizontal signal line 20.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention achieves the following by simplifying the structure of each pixel and reducing noise.
In particular, the present invention relates to a high-sensitivity solid-state imaging device with a large aperture ratio.

[Conventional technology]

The solid-state image sensor must have a resolution comparable to that of the imaging electron tube used in current television broadcasting. Therefore, on the semiconductor substrate, there are 5
A picture element (photoelectric conversion element) matrix of 800 to 1000 picture elements (photoelectric conversion elements) arranged in the horizontal (row) direction and a scanning element corresponding thereto are required. Therefore, the above-mentioned solid-state image sensor is manufactured using MO8 large-scale circuit technology that allows for high integration, and its constituent elements are generally Charge Couple.
A pled device (hereinafter referred to as CCD) or a MOS transistor is used.

These conventional techniques will be described below with reference to the drawings.

FIG. 6 is a diagram showing a circuit diagram of a conventional CCD type solid-state imaging device. This figure shows a case where the number of pixels is assumed to be 2×2 for simplicity.

This drawing, ', here, 611, 621, 631, 64
1 is a photoelectric conversion element (photodiode) for converting incident light into charge, 66, 67, and 68 are CODs for signal charge transfer, 901 and 902 are driver transistors for source follower, and 903 and 904 are for source follower. It is a load transistor.

Further, 501, 502, 503 are current buffer circuits;
04, 505, 506 are resistances, 507゜508 are capacitances,
509 and 510 are switches, and 511 is a power supply. 50
1 to 511 constitute a correlated double sampling circuit 500. When light enters the photodiodes 611 to 641, signal charges corresponding to the amount of incident light are accumulated in each photodiode.

These signal charges are sequentially transferred to the gate of the source follower driver transistor 901 by C0D66,67,68, and the output of the source follower is input to the correlated double sampling circuit 500. Furthermore, the correlated double sampling circuit 500 uses the difference between the output of the source follower before and after the signal charge contributes as the output of the correlated double sampling circuit. That is, initially, the switch 509 is on and the switch 510 is off, and the source follower output before signal charge is contributed is input to the capacitor 507. Next, when the switch 509 is off and the switch 510 is on, the difference with the source follower output after the signal charge has been contributed is calculated as a value 508.
Take it out. This type of device is described in Preliminary Lectures for the National Conference of the Television Society, 1984, pp. 59-60.
Discussed on page.

Next, a MOS type solid-state image pickup device will be explained with reference to FIG. 7. For simplicity, the number of pixels is assumed to be one. 611 is a photodiode that functions in the same way as shown in Fig. 6, 6゜l is a transistor for signal amplification, 604 is a switch, 605 is a load resistor, 606 is a power supply, and the switch 602 and power supply 603 are used for a reset circuit. It consists of Further, 64 is a signal line. When light enters the photodiode, a signal charge corresponding to the amount of incident light is generated in the photodiode, this signal charge is amplified into a current by the transistor 601, and this current is outputted to the output end via the signal line 4. Regarding this type of device, the National Institute of Electronics and Communication Engineers, 1981, Vol.
Discussed on page 136.

[Problem that the invention seeks to solve]

In the conventional example shown in FIG. 6, the signal charge is carried to the output amplifier as it is by using a COD. Therefore.

There is a problem in that noise is mixed in during charge transfer by C0D66.67.68, and the S/N ratio is likely to deteriorate due to this noise charge.

In particular, the smear phenomenon caused by noise charges generated when a portion of the incident light leaks through gaps in the light-shielding film leaks into the CCD 66°67.68 has been a major problem.

In addition, in the conventional example shown in FIG. 7, variations in the output signal level called offset due to variations in the impurity concentration under the gate of the plurality of charge amplification transistors 601 and variations in the interface state are output as they are. However, there is a problem in that this variation in gain is observed as if it were a signal, generating noise called fixed pattern noise.

Therefore, the present inventors have proposed a solid-state imaging device that suppresses the smear phenomenon and has low noise in Japanese Patent Application No. 245249.

An example of this solid-state imaging device will be explained using FIG. 5. FIG. 5 is a circuit diagram showing an example of a solid-state imaging device previously proposed by the present inventors. The photoelectric conversion elements (photodiodes) 1 accumulate charges according to incident light, and are arranged two-dimensionally. The photodiode 1 is connected to the gate of the pixel amplifier 4 and the reset switch 3 via a vertical gate switch 2 controlled by a vertical gate line 5 and a horizontal gate switch 43 controlled by a horizontal gate line 51. The drain of the pixel amplifier 4 is the drain line 4
4, the source is the horizontal signal line 45. Read gate switch 47. Vertical signal line 48. It is connected to a load transistor 49, and together constitute a source follower circuit. 1 selected by the horizontal scanning circuit (horizontal register) 22 and the vertical scanning circuit (vertical register) 21
The operation of each pixel will be described below. After first being reset by the reset switch 3, the pixel amplifier 4
operates as a source follower circuit and outputs an output signal at the time of reset to the output 50, and then the signal charge stored in the photodiode 1 is transferred to the vertical gate switch 2. The signal is input to the pixel amplifier 4 via the horizontal gate switch 43, and an output signal corresponding to the signal charge is outputted to the output 50. with this.

Reading of one pixel is completed. From such a device, the outputs for one pixel amplifier 4 both at the time of reset and at the time of signal charge input are obtained continuously over time, so by further calculating the difference between these plane outputs,
Noise caused by input offset variations of the plurality of pixel amplifiers 4 and 1/f noise of the pixel amplifiers 4 can be easily suppressed.

However, since the one shown in FIG. 5 basically has four transistors arranged in each pixel, the area of the photodiode is limited, and there is a problem that improvement in sensitivity is prevented.

An object of the present invention is to provide a solid-state imaging device in which the area of the photodiode can be made larger and the sensitivity can be further improved.

[Means for solving problems]

The above object is to provide a solid-state imaging device having photodiodes arranged two-dimensionally, means adjacent to each photodiode for amplifying signal charges accumulated in the photodiodes, and means for resetting the input of the amplification means. A plurality of means are provided for accumulating the output of the amplifying means both when the input of the amplifying means is reset and when the signal charge accumulated in the photodiode is input to the amplifying means.

Furthermore, this can be achieved by having means for sequentially scanning the outputs of these storage means.

[Effect]

A means for sequentially scanning these outputs is added to the above-mentioned W product means, and the final output of the device is performed by the means for sequentially scanning this output. That is, the output of each pixel can be transferred to the storage means corresponding to each pixel at the same time for each plurality of pixels. Therefore, it is no longer necessary to provide each pixel with a gate switch for sequentially scanning each pixel, and it is possible to increase the area of the photodiode by the portion corresponding to the gate switch.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. 1st
The figure is a circuit diagram of one embodiment of the present invention.

The two-dimensionally arranged photodiodes 1 are connected to the gate of a one-pixel amplifier 4 and a reset switch 3 controlled by a reset line 6 via a vertical gate switch 2 controlled by a vertical gate line 5 . Pixel amplifier 4 is M
It is an OS transistor, and its drain is the drain, a
7, the source is connected to the drain of the load transistor 15 via the vertical signal line 8, and the whole constitutes a source follower circuit. Note that the source of the load transistor 15 is connected to the load source line 19 and the gate is connected to the load gate line 18. The source follower circuit includes gate switches 9 and 1 controlled by gate lines 16 and 17, respectively.
Storage capacitors 11 and 12 are respectively provided via the storage capacitors 11 and 12, and these storage capacitors 11 and 12 are further connected to the horizontal signal line 20 via horizontal gate switches 13 and 14. Note that each scanning line is connected to a vertical scanning circuit (vertical register) 2.
1 and a horizontal scanning circuit (horizontal register) 22.

The output of the signal charge generated by the incident light and accumulated in each photodiode 1 is performed in a first-order procedure.

At the beginning of the horizontal retrace period of the output of the device, when the horizontal photodiode 1 to be read next is selected, the reset R1A6 corresponding to that column is turned on.

After being turned off and reset by the reset switch 3, the drain line 7 is then turned on, and each pixel amplifier 4 in this - column operates as a source follower driver transistor. The output of each source follower at this time is the amplifier output when there is no signal charge, and by turning on and off the gate line 16, this output voltage is stored in the storage capacitor 11 via the gate switch 9. Next, the vertical gate line 5 corresponding to this horizontal column is turned on.

When turned off and signal charges are applied to the gate 1- of each pixel amplifier 4, the output of each source follower takes a value corresponding to the amount of signal charges. By turning on and off the gate line 17, this output voltage is stored in the storage capacitor 12 via the gate switch 10. The operations during the horizontal blanking period are as described above, and during the horizontal scanning output period, the horizontal register 22
By sequentially opening and closing the horizontal gate switches 13 and 14 corresponding to each pixel, the source follower output charges stored in the storage capacitors 11 and 12 are sequentially output from the horizontal signal line 20. The output charges stored in the storage capacitors 11 and 12 are the temporally continuous outputs of one pixel amplifier 4 both at the time of reset and at the time of signal charge input, and further By taking the difference between these two outputs.

Noise caused by input offset variations of a plurality of source followers and 1/f noise of the source followers can be easily suppressed. However, here, storage capacity 1
1.12 preferably has a certain size or more. This is because when switching the capacitance, kTC noise and IkrC occur due to thermal noise of the switching transistor.

Its size can be expressed as Ihrc=, /””: 770,000 kyo, where k is Boltzmann's constant, 1゛ is temperature, C is capacitance, and fc is switching frequency.

fa is the bandwidth. If the photodiode 1 is not completely depleted during reading by the gate switch 2, the capacitance and CPD of the photodiode 1 will also be
TC noise is generated, but if the size of the storage capacitor 11.12 is made the same as this Cpo, the size of the kTC noise generated from the storage capacitor 11.12 is equal to the photodiode 1.
It is almost equal to the magnitude of the kTc noise generated from .

- On the other hand, if the size of the storage capacitor 11.12 is made 100 times this Cpo, the kTC noise will increase 10 times, but the amount of accumulated charge will also increase 100 times, so the kTC seen from the S/N The noise is reduced to 1/10 of the kTC noise due to Cpo. In the end, it is preferable to make the storage capacitance 11°12 large as long as it does not exceed the driving capacity of the source follower.
If the design is performed so that the depletion is almost completely performed during reading by Cpo, the generation of kTC noise due to Cpo can be suppressed.

Another embodiment of the present invention will be described below with reference to FIG. FIG. 2 shows gate switches 24 to 27. M product capacity 28~3
1. According to this embodiment, which is the same as in FIG. 1 except that four horizontal gate switches 32 to 35 are provided and that the well of the pixel amplifier MOS transistor 23 is connected to the source, It is possible to simultaneously read two rows by simultaneously scanning two rows of photodiodes;
Also, since the well and source of the pixel amplifier 23 are at the same potential,
There are two advantages: variations in the wells of each pixel amplifier 23 do not cause noise as variations in gain due to the back bias effect. Regarding the former, the outputs of the pixel amplifiers 23 for two columns in the horizontal direction are stored in the respective storage capacitors 28 to 31 during the horizontal retrace period, and the outputs of each are stored from the horizontal signal lines 40 and 41 during the horizontal scanning period. Regarding the latter, especially SOI (Silicon On In
It is preferable to separate the wells of the pixel amplifier 23 using the 5ulator method or the like because the area can be reduced.

Another embodiment of the present invention will be described below with reference to FIG. 3 is the same as FIG. 1 except that it does not have a vertical gate switch. In the case of this embodiment, the output of the pixel amplifier 4 when there is a signal charge is stored in the storage capacitor 11, and then reset by the reset switch 3. The output of the pixel amplifier 4 after performing this is stored in the storage capacitor 12. In this case, reset noise occurs due to variations in the reset level caused by the reset each time, but the structure of the pixel section can be made simpler.

Another embodiment of the present invention will be described below with reference to FIG. 4 is the same as FIG. 1 except that the pixel amplifier 42 is a bipolar transistor and there is no reset switch. Although bipolar transistors tend to have large 1/f noise, the structure of the pixel section is simpler because a reset switch is not required.

Note that in the above embodiments, semiconductor conductivity types of p type and n type are used.
It goes without saying that even if the mold is reversed, effects similar to those of the above embodiment can be obtained.

Further, in the above embodiment, a solid-state imaging device with 2×2 pixels was taken as an example, but it is clear that the same applies to a general device with n×m pixels.

〔Effect of the invention〕

According to the present invention, by simplifying the structure of each pixel and reducing noise, a high-sensitivity solid-state imaging device with a particularly large aperture ratio can be obtained.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figures 2 and 3 are circuit diagrams showing one embodiment of the present invention.
4 and 4 are circuit diagrams showing other embodiments of the present invention, and FIG.
The figure shows an example of the solid-state imaging device previously proposed by the present inventors, and FIGS. 6 and 7 are circuit diagrams showing the prior art. 1... Photodiode, 2... Vertical gate switch. 3...Reset switch, 4...Pixel amplifier MOS
Transistor, 11...Storage capacitor, 13...Horizontal gate switch, 15...Load transistor, 42...
・Pixel 2nd f1 pu I! 3 Color $da prisoner ≠ 214 element A, de $Sm No. 6121 Chi 7 figure

Claims (1)

[Claims] A plurality of photoelectric conversion elements that are arranged in one or two dimensions and accumulate charges according to incident light, and an amplifier that is provided adjacent to the photoelectric conversion elements and amplifies the signal charges accumulated in the photoelectric conversion elements. and means for resetting the input of the amplification means, when the input of the amplification means is reset and when the signal charge accumulated in the photoelectric conversion element is input to the amplification means. a plurality of storage means for storing the outputs of both said amplification means;
A solid-state imaging device characterized by comprising: scanning means for sequentially scanning the output of the storage means.