JP3766314B2 - Pressure contact type semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a pressure contact type semiconductor device that uses a plurality of semiconductor chips having control electrodes in a state of being pressure contacted together.
[0002]
[Prior art]
Conventionally, a structure in which a single semiconductor chip is sandwiched between pressure contact electrode plates is widely known as a pressure contact type semiconductor device. However, in this type of pressure contact type semiconductor device, in order to increase the rated current, it is necessary to increase the chip size. There is a problem that the manufacturing yield is lowered due to the increase.
[0003]
[Problems to be solved by the invention]
As described above, the conventional pressure contact type semiconductor device has a problem that it is difficult to increase the capacity. In addition, there is a high possibility that a defect that cannot be repaired will occur with an increase in capacity, resulting in a decrease in manufacturing yield.
[0004]
The present invention has been made in view of the circumstances as described above, and an object of the present invention is to provide a pressure contact type semiconductor device that can easily increase the capacity and contribute to an improvement in manufacturing yield. .
[0005]
Another object of the present invention is to provide a pressure contact type semiconductor device capable of preventing erroneous pressure contact due to positional deviation of a semiconductor chip due to vibration during transportation when a structure in which a plurality of semiconductor chips are pressure contacted is adopted.
[0006]
[Means for Solving the Problems]
The pressure contact type semiconductor device according to the present invention includes a plurality of semiconductor chips arranged on the same plane without using solder, and arranged on the main surface side of the plurality of semiconductor chips, and opened at positions corresponding to the semiconductor chips. An insulating frame, a disk-type heat buffer plate disposed on the back side of the semiconductor chip, a main surface of each semiconductor chip in the opening of the insulating frame, and the disk-type heat buffer plate The first and second pressure contact electrode plates that are in pressure contact with each other and the adjacent ones in contact with each other are disposed at positions corresponding to the openings of the insulating frame, and the main surfaces of the plurality of semiconductor chips and the first A frame-shaped chip frame interposed between the pressure contact electrode plates and fixing the four sides of each semiconductor chip, and each semiconductor chip is moved up and down by the insulating frame and the disk-type heat buffer plate. Sandwich from the direction And a, performs positioning and fixation of the vertical direction of the semiconductor chip, performs positioning and fixation of the horizontal direction of the semiconductor chip and the insulating frame and the chip frame.
[0007]
According to the above configuration, a plurality of semiconductor chips are press-contacted by the first and second press-contact electrode plates, and when the rated current is increased, the number of semiconductor chips may be increased, so that the capacity can be increased. It is easy to form a large number of small-sized semiconductor chips, and only good products can be extracted and used, which can contribute to an improvement in manufacturing yield.
[0008]
In addition, by sandwiching each semiconductor chip between the insulating frame and the disk-type heat buffer plate from above and below, each semiconductor chip is positioned and fixed in the vertical direction, and the insulating frame and the chip frame are Since each semiconductor chip is positioned and fixed in the horizontal direction, it is possible to prevent the chip from being displaced due to vibrations during transportation and the like, and it is possible to improve the reliability by preventing defects due to erroneous pressure contact.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a cross-sectional view of a pressure-contact type semiconductor device according to the first embodiment of the present invention. FIG. 2 is an exploded view showing a main part in a state where the pressure-contact type semiconductor device of FIG. 1 is taken out from the envelope and disassembled. In the first embodiment, a plurality of pressure-contact type IGBT chips and a plurality of FRD (free wheel diode) chips connected in parallel with the IGBT chips being reversed in the energization direction are press-contacted to form a multi-chip pressure-contact type semiconductor device. Is configured.
[0010]
1 and 2, 10 is, for example, a ceramic envelope, 11, 11, ... are IGBT chips, 12, 12, ... are FRD chips, 13, 13, ... are chips 11, 11, ..., 12 respectively. , 12,... Is a frame-shaped chip frame for fixing the four sides to prevent positional displacement in the horizontal direction. These chip frames 13, 13,... Are made of silicone resin, polyetherimide, or the like, and are fixed to the chips 11, 11,. In addition, 14, 14,... Are heat buffer plates (emitter-side heat buffer plates) made of a molybdenum plate or the like having a thickness of 1 to 2 mm. The heat buffer plates 14, 14,. In order to prevent the load from concentrating on the corners of, 12, 12,..., The four corners have a radius of curvature of 0.2 to 1 mm. Reference numeral 15 denotes a disk type heat buffer plate (collector side heat buffer plate), 16 denotes a resin frame, and 17 denotes a ring frame. In the central portion of the resin frame 16, openings 18, 18,... Are provided at positions corresponding to the chips 11, 11,..., 12, 12,. Are provided with nails 19, 19,. On the other hand, the ring frame 17 is provided with an opening 20 corresponding to the disk-type heat buffer plate 15 and engaging holes 21, 21,... At positions corresponding to the claws 19, 19,. , And the engagement holes 21, 21,... Are locked by the resin frame 16 and the ring frame 17, and the heat buffer plates 14, 14,. , The IGBT chips 11, 11,..., The FRD chips 12, 12,.
[0011]
Further, reference numeral 22 denotes a frame-shaped resin substrate in which an opening 22a is formed at a position corresponding to each of the chips 11, 11, ..., 12, 12, .... Each IGBT chip 11, 11 is disposed on the back side of the resin substrate 22. ,..., And control signals for controlling the IGBT chips 11, 11,... At the positions corresponding to the gate electrodes of the IGBT chips 11,. Gate wiring for supplying to the gate electrode is provided. The gate pressure contact electrodes 23, 23,... Are pressed against the gate electrodes of the IGBT chips 11, 11,. The gate wiring is fixed to the resin substrate 22 and is protected by a resin protective cover 24 having an opening 24a having a shape corresponding to the opening 22a. That is, engagement holes 25, 25,... Are provided in the outer peripheral portion of the resin substrate 22, and claws 26, 26,... Are provided at positions corresponding to the engagement holes 25, 25,. The gate holes are protected by locking the engaging holes 24, 24,... And the claws 26, 26,.
[0012]
In addition, 27 is an emitter press-contact electrode plate, 28 is a collector press-contact electrode plate, The position corresponding to each IGBT chip | tip 11, 11, ... and FRD chip | tip 12,12, ... on the back surface side of the said emitter press-contact electrode plate 27. Columnar protrusions are formed on the resin substrate 22, and the protrusions 22a, 24a, 24a, 18a,... Of the resin frame 16, the heat buffer plates 14, 14,. The main surfaces of the chips 11, 11,..., 12, 12,. The emitter press-contact electrode plate 27 and the collector press-contact electrode plate 28 are used in a state where they are pressed against each other by applying a high pressure.
[0013]
FIG. 3 is a plan view showing the arrangement of the chips in FIGS. As shown in the figure, the FRD chips 12, 12,... Are arranged in the center portion, and the IGBT chips 11, 11,... Are arranged in the peripheral portion so as to surround the FRD chips 12, 12,. The FRD chips 12, 12,... Are connected to the IGBT chips 11, 11,.
[0014]
FIG. 4 is a plan view of the resin substrate 22 in FIGS. 1 and 2 as viewed from the back side. The resin substrate 22 is provided with gate pressure electrodes 23, 23,... At positions corresponding to the gate electrodes of the IGBT chips 11, 11,. 29,... Are connected. The gate wirings 29, 29,... Are collected at one place and led out to the outside. Then, a control signal is input from the gate wirings 29, 29,... And supplied to the gate electrodes of the IGBT chips 11, 11,. The
[0015]
5A is a plan view of the resin frame 16 shown in FIGS. 1 and 2, FIG. 5B is a cross-sectional view taken along the line 5B-5B of the resin frame 16 shown in FIG. 5A, and FIG. FIG. 5C is a cross-sectional view showing an enlarged end portion of the resin frame 16 shown in FIG. As shown in FIG. 5A, a grid-like frame is formed at the boundary position between the IGBT chips 11, 11,... And the FRD chips 12, 12,. Are pressed and held by the resin frame 16 from above.
[0016]
According to the above configuration, a plurality of IGBT chips 11, 11,... Are pressed together, and when the rated current is increased, the number of chips 11, 11,. Can be formed, and a large number of small-sized IGBT chips 11, 11,... Can be formed and only good products can be extracted and used, which can contribute to an improvement in manufacturing yield. Further, since the gate electrode wirings 29, 29,... Are fixed to the resin substrate 22 and are wired, the gate electrode wirings 29, 29,. The reliability of… can be improved. In addition, since the IGBT chips 11, 11,... Are arranged in the peripheral portion, the gate pressure electrodes 23, 23,... Can be easily provided on the resin substrate 22, and the wiring length of the gate electrode wirings 29, 29,. Since it can be shortened, wiring is easy, and the possibility of disconnection or short-circuiting is further reduced. In this respect, the reliability can be improved. Since the wiring length of the gate electrode wirings 29, 29,... Can be shortened, the inductance component can be reduced. Further, the resin frame 16 and the ring frame 17 are provided with heat buffer plates 14, 14,..., Chip frames 13, 13,..., IGBT chips 11, 11,. .., 12, 12,... Are positioned and fixed in the vertical direction, so that no pressure is applied to the pressure contact electrode plates 27, 28. The position of the chip due to the state, for example, vibration during transportation, can be prevented, and a defect due to erroneous pressure contact can be prevented to improve reliability.
[0017]
In the first embodiment, the heat buffer plates 14, 14,... Are provided on the chips 11, 11,..., 12, 12,. And a thermal metal plate made of Cu or the like are interposed between the thermal buffer plates 14, 14,. Further, silver is provided between at least one of the emitter pressure contact electrode plate 27 and the thermal buffer plates 14, 14,... And between each of the chips 11, 11,. If the sheet is interposed, it is possible to absorb the variation in the pressure due to the variation in the thickness of each of the chips 11, 11, ..., 12, 12, ... and the thermal buffer plates 14, 14, .... ,..., 12, 12,.
[0018]
In the first embodiment, the resin frame 16 and the ring frame 17 are locked, and the resin substrate 22 and the protective cover 24 are locked. However, the ring frame 17 and the protective cover 24, and the resin frame 16 and the resin frame are further locked. At least one of the substrates 22 may be locked.
[0019]
FIG. 6 is a view for explaining a pressure contact type semiconductor device according to the second embodiment of the present invention. The IGBT chips 11, 11,... (The same applies to the FRD chips 12, 12,...) And the chip frames 13, 13. ,..., The heat buffer plates 14, 14,. Are provided on the outer periphery of the chip frame 13 and provided with protrusions 16a, 16a,... Having shapes corresponding to the contact portions of the resin frame 16 with the chip frame 13. By engaging with the resin frame 16, in addition to vertical positioning and fixing of the chips 11, 11,..., Horizontal positioning can be performed for each chip.
[0020]
According to such a configuration, since the positioning in the vertical direction and the horizontal direction can be performed and the chip can be fixed, the chip 11 or the like due to vibrations during transportation, for example, when no pressure is applied to the pressure contact electrode plates 27 and 28. .., 12, 12,... Does not occur, and defects due to erroneous pressure contact can be reliably prevented.
[0021]
FIG. 7 is for explaining a pressure contact type semiconductor device according to a third embodiment of the present invention. Resistors 30, 30,..., A thermistor 31, a current detection element 32, and the like are provided on a resin substrate 22. Yes. The resistors 30, 30,... Are gate resistors that prevent the IGBT chip from oscillating, and are interposed between the gate wirings 29, 29,. The thermistor 31 is for monitoring the temperature of the pressure-contact type semiconductor device to prevent an abnormally high temperature, and is connected to an external temperature detection circuit. The current detection element 32 is for monitoring the current flowing through the IGBT chip 11 to prevent the overcurrent from flowing, and is connected to an external overcurrent detection circuit.
[0022]
According to such a configuration, since various elements can be mounted on the resin substrate 22, intelligentization can be easily realized. It is also highly resistant to vibration.
[0023]
Note that a Zener diode of about 30 V may be connected between the gate and emitter of the IGBT, or a capacitor may be inserted between the gate and emitter. These Zener diodes and capacitors are mounted on the resin substrate 22. Moreover, an overcurrent detection circuit including not only the current detection element 32 but also other elements, a protection circuit for protecting the IGBT chips 11, 11,... Can be mounted.
[0024]
FIG. 8 is for explaining a pressure contact type semiconductor device according to the fourth embodiment of the present invention. In the first to third embodiments, each IGBT chip 11, 11,... Is a center gate. Although the configuration has been described by way of example, a configuration example of the resin substrate 22 in the case of application to a corner gate IGBT chip is shown. When a corner gate IGBT chip is used, the gate wirings 29, 29,... Can be shortened more than the center gate IGBT chip, the wiring is easy, and the possibility of disconnection or short-circuiting is reduced. Can be improved. In addition, the inductance of the gate wirings 29, 29,.
[0025]
The present invention is not limited to the first to fourth embodiments described above, and can be implemented with various modifications without departing from the scope of the invention. For example, in each of the above-described embodiments, the reverse conduction pressure-contact type IGBT is described as an example of the pressure-contact type semiconductor device. However, it is needless to say that the present invention can be similarly applied to a pressure-contact type semiconductor device using other elements.
[0026]
【The invention's effect】
As described above, according to the present invention, it is possible to obtain a pressure-contact type semiconductor device that can easily increase the capacity and contribute to an improvement in manufacturing yield.
[0027]
In addition, when a structure in which a plurality of semiconductor chips are press-contacted is adopted, a press-contact type semiconductor device that can prevent erroneous press-contact due to a positional deviation of the semiconductor chip due to vibration during transportation or the like can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a pressure-contact type semiconductor device according to a first embodiment of the present invention.
FIG. 2 is an exploded view showing a main part extracted when the pressure contact type semiconductor device of FIG. 1 is taken out from the envelope and disassembled.
3 is a plan view showing the arrangement of chips in FIGS. 1 and 2. FIG.
4 is a plan view when the resin substrate in FIGS. 1 and 2 is viewed from the back side. FIG.
FIGS. 5A and 5B are diagrams for explaining the resin frame in FIGS. 1 and 2, wherein FIG. 5A is a plan view, FIG. 5B is a cross-sectional view taken along line 5B-5B in FIG. The figure is a cross-sectional view showing an enlarged end of the figure.
FIG. 6 is a cross-sectional view showing an extracted portion in the vicinity of a junction of an IGBT chip, a chip frame, a thermal buffer plate, and a resin frame, for explaining a pressure-contact type semiconductor device according to a second embodiment of the present invention.
FIG. 7 is a plan view illustrating another configuration example of a resin substrate for explaining a press-contact type semiconductor device according to a third embodiment of the present invention.
FIG. 8 is a plan view illustrating still another configuration example of a resin substrate when applied to a corner gate IGBT chip, for explaining a pressure-contact type semiconductor device according to a fourth embodiment of the present invention.
[Explanation of symbols]
11, 11, ... IGBT chip (semiconductor chip, second semiconductor chip group) 12, 12, ... FRD chip (semiconductor chip, first semiconductor chip group) 13, 13, ... ... chip frame, 14 , 14,... Thermal buffer plate, 15 Disc type thermal buffer plate, 16 Resin frame (insulating frame), 17 Ring frame, 18, 18, ... Opening, 19, 19, ... Claw, 20 ... Opening, 21, 21, ... engagement hole, 22 ... resin substrate (insulating substrate), 23,23, ...... gate pressure contact electrode (pressure contact electrode), 24 ... protective cover, 25,25, ... engagement hole , 26, 26,... Claw, 27 ... emitter pressure contact electrode plate (first pressure contact electrode plate), 28 ... collector pressure contact electrode plate (second pressure contact electrode plate), 29, 29, ... gate wiring (control wiring) ), 30, 30,... Gate resistance, 31. Mista, 32 ... current detection element.

Claims (4)

A plurality of semiconductor chips arranged without using solder on the same plane;
An insulating frame disposed on a main surface side of the plurality of semiconductor chips and having an opening at a position corresponding to each semiconductor chip;
A disk-type heat buffer plate disposed on the back side of the semiconductor chip;
First and second press-contact electrode plates that collectively press-contact the main surface of each semiconductor chip in the opening of the insulating frame and the disk-type heat buffer plate;
Each semiconductor is disposed at a position corresponding to the opening of the insulating frame in a state where adjacent ones are in contact with each other, and is interposed between a main surface of the plurality of semiconductor chips and the first pressure contact electrode plate. A frame-shaped chip frame for fixing the four sides of the chip,
Positioning and fixing each semiconductor chip in the vertical direction by sandwiching each semiconductor chip from the vertical direction with the insulating frame and the disk-type heat buffer plate,
A press-contact type semiconductor device, wherein the semiconductor frame is positioned and fixed in the horizontal direction by the insulating frame and the chip frame.   The plurality of semiconductor chips include an FRD chip disposed in a central portion and an IGBT chip disposed so as to surround the FRD chip, and each of the FRD chips is parallel to each of the IGBT chips with the energization direction reversed. The press contact type semiconductor device according to claim 1, wherein the pressure contact type semiconductor device is connected.   3. The first pressure contact electrode plate according to claim 1, wherein the first pressure contact electrode plate has a columnar protrusion at a position corresponding to each semiconductor chip, and the main surface of the semiconductor chip is pressed into contact with the protrusion. The press-contact type semiconductor device described.   A ring frame that has an opening corresponding to the second pressure contact electrode plate and is held by the insulating frame so as to sandwich the plurality of semiconductor chips and the disk-type heat buffer plate; The pressure-contact type semiconductor device according to any one of claims 1 to 3.

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