JP3761450B2 - Carrier regeneration system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a carrier recovery method for recovering a carrier component from a received signal on the receiver side of an OFDM transmission apparatus.
[0002]
[Prior art]
In recent years, Orthogonal Frequency Division Multiplexing (OFDM) is a modulation system suitable for application to mobile digital audio broadcasting and terrestrial digital television broadcasting, which is characterized by being resistant to multipath fading and ghosting. ) Is attracting attention. This OFDM system is a kind of multi-carrier modulation system, and is a transmission system in which a plurality of orthogonal carriers are digitally modulated.
Here, as shown in FIG. 3, an OFDM signal to be transmitted is a signal having a symbol structure in which a guard interval (G) for reducing the influence of delayed waves is added to a signal having an effective symbol length (Tv). is there. In other words, the second half B ₁ portion of the signal having the effective symbol length (Tv) is copied before the first half A ₁ portion, and the symbol-structured signal inserted as the guard interval (G) is continuous. The guard interval is added for the purpose of reducing the influence of intersymbol interference on the receiving side caused by the delayed wave in the transmission path.
[0003]
When such an OFDM signal is received and the received data is reproduced, the receiver configuration is generally as shown in FIG. Since this configuration and operation are disclosed in detail in the following document, for example, they will be briefly described here.
"Digital transmission" p117-p119, published by Ohm Co., Ltd. 1998 In a receiver as shown in FIG. 2, a modulated OFDM signal is received, passed through a band limiting filter 1, and then passed through an A / D converter 2. Convert to digital signal. Here, a sine wave equal to the carrier frequency of the received signal being modulated is generated by the carrier wave generator 8, and this signal cos ωt is multiplied by the multiplier 3. On the other hand, the signal output from the carrier generator 8 is shifted by π / 2 by the phase shifter 7 and is multiplied by the multiplier 4 as the signal sin ωt. Then, the I component and the Q component of the demodulated baseband OFDM signal are obtained by passing through the low-pass filters 5 and 6 that remove the harmonic components, respectively. Note that I represents an in-phase component and Q represents a quadrature component, which is output as a so-called complex signal.
[0004]
Then, this output is converted into a parallel signal by the serial / parallel converter 9, and a signal obtained by performing an inverse FFT operation on the transmission side by an FFT (Fast Fourier Transform) calculator 10 is reproduced here.
Then, after the data is identified by the discriminator 11 with respect to the output of each frequency of the FFT computing unit 10, it is output as serial data by the parallel / serial converter 12. This output signal is a signal obtained by reproducing the signal transmitted from the transmission side.
The demodulated baseband signals I and Q are detected by the timing position detector 13 at the timing position where the FFT is performed, and the timing generator 14 generates a timing signal based on the detected timing position. Based on this timing signal, the clock generated from the clock generator 16 serving as a reference for the shift operation in the serial / parallel converter 9 is controlled by the switch 15. Here, in order to control the switch 15, when the timing position is detected, a timing signal is output from the timing generator 14 so that the FFT time window becomes an appropriate position.
The output of the FFT calculator 10 is output for each carrier frequency. Among them, only the Cp carrier (pilot carrier) component is selected by the Cp selection circuit 17.
[0005]
The Cp carrier is inserted every several carriers (for example, eight), and a signal modulated by BPSK (Binary Phase Shift Keying) is subjected to delay detection by the detector 18. From the output, the phase error detector 19 obtains the phase error, and this phase error signal is fed back to the carrier wave generator 8 via the loop filter 20. The carrier wave generator 8 changes the frequency of the generated carrier wave so as to reduce the error with respect to the phase error output from the loop filter 20. Demodulation is performed using multipliers 3 and 4 at this frequency. By doing so, the phase error output from the phase error detector 19 is reduced. By this feedback, the carrier wave generator 8 changes the frequency until the phase error of the output of the phase error detector 19 becomes zero. Eventually, the carrier frequency of the received signal matches the frequency output from the carrier generator 8, the output of the phase error detector 19 becomes 0, and the carrier is regenerated.
[0006]
[Problems to be solved by the invention]
In the conventional carrier regeneration method, this carrier regeneration is performed for all Cp carriers. For example, when the total number of carriers is 900, the number of Cp carriers is about 100, and the circuit scale for realizing this carrier regeneration becomes very large.
An object of the present invention is to realize a carrier regeneration system that eliminates these drawbacks and can perform carrier regeneration with a small circuit scale.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a receiver for receiving an OFDM signal including a guard interval signal, and a conjugate complex number obtained by orthogonally demodulating a baseband signal and a signal obtained by delaying the baseband signal by an effective symbol length. Multiply and integrate the conjugate complex signal, take the difference between the integrated signal and the signal delayed by the guard interval time, control the frequency of the demodulated carrier wave based on the difference signal, and reproduce the carrier Is.
The conjugate complex number multiplied signal is added and integrated every sample time, the difference between the integrated signal and the signal delayed by the guard interval time is taken, and the maximum position of the absolute value of the difference signal Is detected, the frequency of the demodulated carrier wave is controlled via a loop filter based on the signal value of the imaginary part of the difference signal at the maximum value position, and carrier recovery is performed.
Also, the conjugate complex number multiplied signal is added and integrated every sample time, the difference between the integrated signal and the signal delayed by the guard interval time is taken, and the signal of the imaginary part of the difference signal is received. It is output by a timing signal from an in-machine clock recovery circuit, controls the frequency of the demodulated carrier wave through a loop filter, and recovers the carrier.
Also, the conjugate complex number multiplied signal is added and integrated every sample time, the difference between the integrated signal and the signal delayed by the symbol time is taken, and the signal of the imaginary part of the difference signal is received in the receiver. Is output by a timing signal from the clock recovery circuit, and the carrier wave is recovered by controlling the frequency of the demodulated carrier wave through a loop filter.
[0008]
Further, in the receiver that receives the OFDM signal including the guard interval signal, the baseband signal obtained by orthogonal demodulation and the signal obtained by delaying the baseband signal by the effective symbol length are multiplied by the conjugate complex number, and the conjugate complex number multiplication is performed. The signal of the imaginary part of the signal is integrated, the difference between the integrated signal and the signal delayed by the guard interval time is taken, the frequency of the demodulated carrier wave is controlled based on the difference signal, and the carrier is reproduced. .
Further, the signal of the imaginary part of the signal multiplied by the conjugate complex number is added and integrated every sampling, and the difference between the integrated signal and the signal obtained by delaying the signal by the guard interval time is obtained, and the absolute value of the difference signal Is detected, the frequency of the demodulated carrier wave is controlled through a loop filter based on the value of the difference signal at the maximum value position, and carrier recovery is performed.
Further, the signal of the imaginary part of the signal obtained by multiplying the conjugate complex number is added and integrated every sampling, and the difference between the integrated signal and the signal delayed by the guard interval time is taken, and the difference signal is received in the receiver. Is output by a timing signal from the clock recovery circuit, and the carrier wave is recovered by controlling the frequency of the demodulated carrier wave through a loop filter.
Further, the signal of the imaginary part of the signal multiplied by the conjugate complex number is added and integrated every sampling, and the difference between the integrated signal and the signal obtained by delaying the signal by the symbol time is taken, and the difference signal is received in the receiver. It is output by a timing signal from a clock recovery circuit, controls the frequency of the demodulated carrier wave through a loop filter, and recovers the carrier.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows the configuration of an embodiment of the present invention, and this operation will be described below. The demodulated baseband signals I and Q output from the low-pass filters 5 and 6 are expressed as I + jQ as complex signals.
The baseband signal I + jQ is delayed by the delay unit 21 having a delay time (Tv) corresponding to the effective symbol time (Tv). Then, multiplication with a conjugate complex number between the signal before being delayed and the signal after being delayed is performed. Here, when a signal at a certain sampling time before being delayed by the delay unit 21 is expressed as R (= Ri + jRq), and a signal at a certain sampling time after being delayed is expressed as S (= Si + jSq), it is multiplied by a conjugate complex number. The result is
R × S ^* = R × | S | ² / S
It becomes. This is derived from (a + jb) × (a + jb) ^* = | a + jb | ² .
[0010]
When the last part of the effective symbol length, which is the same signal as the guard interval signal, is input to the input of the delay unit 21, the output of the delay unit 21 is the output of the guard interval signal.
R = S
However, when the carrier frequency of the received OFDM signal and the frequency output from the carrier generator 8 of the receiver do not match, the phase is shifted, and when the shift is Δθ,
R = S × e ^{j Δθ}
So,
R × S ^* = S × e ^{j Δθ} × | S | ² / S = | S | ² × e ^{j Δθ}
It becomes.
However, when the input signal of the delay device 21 is other than that,
R ≠ S
Therefore, R × S ^* does not take a constant value, but takes various values, resulting in a random signal.
[0011]
Now, assuming that the output signal of the conjugate complex multiplier 22 is a, the final part of the effective symbol length, which is the same signal as the guard interval, is input to the delay unit 21 as shown in FIG. Sometimes it becomes a certain value, otherwise it becomes a random signal. In FIG. 4, random signals are indicated by square bands.
The output of the complex multiplier 22 is integrated by an adder 23 using a delay unit 24 having a sampling time delay time (Ts). If the output signal of the delay device 24 is b, the waveform is as shown in FIG. If the output signal of the delay unit 25 of the delay time (T _G ) of the guard interval time is c, the waveform thereof is as shown in FIG.
When the adder 26 calculates the difference between the output signal of the delay unit 24 and the output signal of the delay unit 25 having the delay time (T _G ), the waveform becomes d. This is a waveform that has a maximum value at the final portion of each symbol. Here, after being converted into an absolute value by the absolute value converter 29, the position of the maximum value of this signal is detected by the maximum value position detector 30, and only at that time, the switch circuit 28 is closed and the imaginary number is closed. The signal of the part selection circuit 27 is input to the loop filter 20.
[0012]
The output signal of the adder 26 is a value obtained by integrating | S | ² × e ^{j Δθ} described above during the guard interval when the switch circuit 28 is closed.
e ^{j Δθ} = cos (Δθ) + j · sin (Δθ)
Therefore, Δθ is an error, and Δθ << 1, so the following equation is established. sin (Δθ) = Δθ
That is, the imaginary part is a phase error.
If the guard interval period is 64 samples, the output signal of the imaginary part selection circuit 27 that selects only the imaginary part of the output of the adder 26 is output by the adder 23 and the delay unit 24 of the delay time (T _G ) by 64 samples. Since the signal is integrated, the value of the signal output to the loop filter 20 when the switch circuit 28 is closed is
64 × | S | ² × Δθ
It is.
When the received signal level is constant, | S | ² may be regarded as fixed, and therefore the parameter in the loop filter 20 is set in consideration of the level of the magnitude and the phase error Δθ of 64 times. Just decide. The output signal of the loop filter 20 is input to the carrier wave generator 8 to perform carrier regeneration.
[0013]
The present invention can be realized by the configuration shown in FIG. 5 in addition to the configuration shown in FIG.
With respect to the output signal of the complex multiplier 22, the imaginary part selection circuit 27 extracts and outputs only the signal of the imaginary part. When the last part B of the effective symbol is input as the input signal of the delay unit 21 with the delay time (Tv), the guard interval signal is output as the output signal of the delay unit 21 and thus described above. Thus, the output of the complex multiplier 22 is
｜ S | ² × e ^{j Δθ}
It becomes. When the imaginary part of the signal is selected by the imaginary part selection circuit 27,
｜ S ｜ ² × sin (Δθ)
When Δθ << 1, sin (Δθ) = Δθ, so that the output of the imaginary part selection circuit 27 is
｜ S ｜ ² × Δθ
It is. The peak value of the output signal of the adder 34 is 64 × | S | ² × Δθ.
Since Δθ can take positive and negative values, the absolute value converter 35 is configured to output the maximum value only in the positive direction so that the position of the maximum value can be easily detected, and the position of the maximum value is set to the maximum value. The position is detected by the position detector 30, and the switch circuit 28 is closed only at that time.
Since the output of the adder 34 at the time of closing is 64 × | S | ² × Δθ as described above, this is input to the loop filter 20 and the carrier generator 8 is controlled by the output. Carrier regeneration. This realizes exactly the same function as that realized by the configuration shown in FIG.
[0014]
Also, the configuration as shown in FIG. 6 can be realized. The configuration in FIG. 6 is the same as the configuration in FIG. 1 except for the absolute value converter 29 and the maximum value position detector 30.
The clock recovery is to detect a symbol period from a received signal and generate a clock having a period corresponding to the symbol period. As shown in FIG. 7, the output signal of the clock recovery circuit 36 is a signal synchronized with the symbol period of the received OFDM signal. By closing the switch circuit 28 at the rising edge of this signal, the maximum value (64 × | S | ² × Δθ) of the output signal of the imaginary part selection circuit 27 is input to the loop filter 20, so that the carrier control is performed in the same manner. It becomes possible.
Further, the configuration as shown in FIG. 8 can be realized. The configuration of FIG. 8 is the same as the configuration of FIG. 5 except for the absolute value converter 35 and the maximum value position detector 30.
As in the case of the configuration of FIG. 5, by using the signal from the clock recovery circuit 36 and closing the switch circuit 28 at the time of rising, the maximum value of the output signal of the adder 34 (64 × | S | ² × Δθ ) Is input to the loop filter 20, so that the carrier can be controlled similarly.
[0015]
Also, the configuration as shown in FIG. 9 can be realized. The configuration of FIG. 9 is exactly the same as the configuration shown in FIG. 6 except for the delay unit 25 having a delay time (Tg). In FIG. 6, in contrast to the delay of the guard interval time (Tg), in FIG. 9, the delay unit 37 is the delay time (Tsym) of the symbol length.
The process up to the output of the delay unit 24 of the delay time (Ts) is exactly the same as in FIG. The output signal of the adder 26 differs from that in FIG. 6 due to the delay unit 37 of the delay time (Tsym).
The output signal of the adder 26 is shown in FIG. Since the difference from the signal one symbol before is taken, the direct current component becomes 64 × | S | ² × Δθ, and the switch circuit 28 is closed by the output signal from the clock recovery circuit 36 as in the configuration of FIG. , 64 × | S | ² × Δθ is input to the loop filter 20, so that carrier regeneration is possible.
Furthermore, the configuration as shown in FIG. 11 can also be realized. In this configuration, the delay unit 25 with the delay time (Tg) becomes the delay unit 37 with the delay time (Tsym), as in the relationship between FIG. 9 and FIG. Except that it is exactly the same. The operation is the same as the relationship between FIG. 9 and FIG. 6, and the direct current component of the output signal of the adder 34 is 64 × | S | ² × Δθ, which is similar to the configuration of FIG. By closing the switch circuit 28 with the output signal, 64 × | S | ² × Δθ is input to the loop filter 20, and similarly carrier regeneration is possible.
[0016]
【The invention's effect】
The system of the present invention can realize a carrier regeneration function with a simple configuration as shown in FIG. Further, the adder, the absolute value converter, and the maximum value position detector that perform subtraction from the delay device of the delay time (Tv) can be shared with the clock recovery circuit, and the circuit scale can be greatly reduced. With respect to other configurations, the carrier reproduction function can be realized with a relatively simple configuration.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a first embodiment of the present invention. FIG. 2 is a block diagram showing the overall configuration of an OFDM demodulator. FIG. 3 is an explanatory diagram of an OFDM signal. FIG. 5 is a block diagram showing a second embodiment of the present invention. FIG. 6 is a block diagram showing a third embodiment of the present invention. FIG. 8 is a block diagram showing a fourth embodiment of the present invention. FIG. 9 is a block diagram showing a fifth embodiment of the present invention. FIG. 11 is a waveform diagram for explaining the fifth embodiment. FIG. 11 is a block diagram showing the sixth embodiment of the present invention.
1: band limiting filter, 2: AD converter, 3, 4: multiplier, 5, 6: low-pass filter, 7: phase shifter, 8: carrier wave generator, 9: serial / parallel converter, 10: FFT calculator, 11: Discriminator, 12: Parallel / serial converter, 13: Timing position detector, 14: Timing generator, 15: Switch circuit, 16: Clock generator, 17: Cp selection circuit, 18: Detector, 19: Phase error detector, 20: loop filter, 21, 24, 25, 32, 33, 37: delay unit, 22: complex multiplier, 23, 26, 31, 34: adder, 27: imaginary part selection circuit, 28 : Switch circuit, 29, 35: absolute value converter, 30: maximum value position detector, 36: clock recovery circuit.

Claims (5)

In a receiver that receives an OFDM signal including a guard interval signal, a quadrature demodulated baseband signal and a signal obtained by delaying the baseband signal by an effective symbol length are multiplied by a conjugate complex number, and the conjugate complex number multiplied signal is obtained. A carrier regeneration system characterized by integrating , taking a difference between the integrated signal and a signal obtained by delaying the integrated signal by a guard interval time, and controlling the frequency of a demodulated carrier wave based on the difference signal. 2. The difference signal according to claim 1, wherein the signal obtained by multiplying the conjugate complex number is added and integrated every sample time, and a difference between the integrated signal and a signal obtained by delaying the integrated signal by a guard interval time is obtained. A carrier regeneration system characterized by detecting the maximum value position of the absolute value of the signal and controlling the frequency of the demodulated carrier wave through a loop filter based on the signal value of the imaginary part of the difference signal at the maximum value position. 2. The signal according to claim 1, wherein the conjugate complex number-multiplied signal is added and integrated every sample time, and a difference between the integrated signal and a signal obtained by delaying the integrated signal by a symbol time is obtained. A carrier recovery system characterized in that an imaginary part signal is output by a timing signal from a clock recovery circuit in a receiver and the frequency of a demodulated carrier wave is controlled through a loop filter. In a receiver that receives an OFDM signal including a guard interval signal, a baseband signal obtained by orthogonal demodulation and a signal obtained by delaying the baseband signal by an effective symbol length are multiplied by a conjugate complex number, and the signal obtained by multiplying the conjugate complex number is obtained. A carrier regeneration characterized by integrating a signal of an imaginary part, taking a difference between the integrated signal and a signal obtained by delaying the integrated signal by a guard interval time, and controlling a frequency of a demodulated carrier wave based on the difference signal method. 6. The signal of the imaginary part of the signal obtained by multiplying the conjugate complex number is added and integrated every sampling, and a difference between the integrated signal and a signal obtained by delaying the integrated signal by a guard interval time is obtained. A carrier regeneration system characterized by detecting the maximum value position of the absolute value of the difference signal and controlling the frequency of the demodulated carrier wave via a loop filter based on the value of the difference signal at the maximum value position.

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