JP3748011B2 - Si wafer for GaN semiconductor crystal growth, wafer for GaN light emitting device using the same, and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a GaN (gallium nitride) semiconductor crystal growth Si (silicon) wafer for producing a blue light-emitting element (for example, a light-emitting diode (LED) or a laser element), a GaN light-emitting element wafer using the same, and the like It relates to the manufacturing method.
[0002]
[Prior art]
Normally, a GaN semiconductor crystal as a blue light-emitting element is grown on a sapphire substrate by epitaxial growth. However, a lattice mismatch occurs due to a difference in lattice constant between the GaN semiconductor crystal and the sapphire substrate, or the sapphire as a substrate is cleaved. There is a problem due to lack of conductivity and conductivity.
[0003]
Conventionally, in order to solve such a problem, as shown in FIG. 7, a GaN light emitting device using Si as a substrate and forming a GaN semiconductor crystal layer 33 on a Si substrate 31 with a Ga (gallium) barrier layer 32 interposed therebetween. A known wafer and a method for manufacturing the same are known (see Japanese Patent Application Laid-Open No. 10-242055).
[0004]
[Problems to be solved by the invention]
However, in the conventional GaN light emitting device wafer and its manufacturing method, the formation of the Ga barrier layer on the Si substrate has a problem due to the large difference in lattice constant between the two, and zinc flash on the Ga barrier layer. It is difficult to form a GaN layer with an ore-type crystal structure, the crystal structure of the GaN layer becomes a wurtzite-type crystal system, and there is a problem that the luminance at the time of blue light emission as a light-emitting element does not increase so much.
[0005]
For this reason, it is conceivable to use a BP (boron phosphide) single crystal having a lattice mismatch of only about 0.6% with GaN having a wurtzite crystal structure as an intermediate layer between the Si substrate and the GaN layer.
The BP single crystal has a neutron absorption action, and is expected to be used as a neutron beam sensor for safety management of a nuclear reactor and evaluation of physical properties by neutron scattering.
BP has a zinc blende crystal structure, and the lattice mismatch with GaN is also slight as described above. On the other hand, although the lattice mismatch with Si is as large as 16%, the compatibility between B (boron) and Si is good and the epitaxial growth of BP on the Si substrate has been reported, but stable crystal growth can still be performed. It has not yet reached.
The reason is as follows.
(1) During the BP epitaxial growth process, O (oxygen) contained in the Si substrate diffuses outward and oxidizes B, so that polycrystallization occurs and inhibits single crystal growth.
(2) Defects such as COP (Crystal Originated Paricle: pits formed by very light etching) on the surface of the Si substrate 34 (see FIGS. 8 and 9), that is, the device fabrication surface If there is 35, the difference in crystal orientation causes a difference in the growth rate of BP, the surface irregularities are amplified, and the surface uniformity (flatness) is lacking.
(3) When the surface of the Si substrate 36 (see FIG. 10) is a single-step layer, antiphased domains having different faces on the AA plane are generated and crystallized during the BP crystal growth.
On the other hand, in order to eliminate the above factors, in the BP epitaxial growth process, it is considered that the Si substrate is annealed at a temperature of 1000 to 1200 ° C. in a hydrogen gas atmosphere as a pretreatment. Since it is kept at a high temperature, there are problems such as new surface roughness.
Accordingly, an object of the present invention is to provide a Si wafer for GaN semiconductor crystal growth that can satisfactorily form a GaN layer having a zinc blende crystal structure, a wafer for a GaN light emitting device using the same, and a method for manufacturing the same. To do.
[0006]
[Means for Solving the Problems]
To solve the above problems, in order to solve the above problems, GaN semiconductor crystal growth Si wafer of the present invention, the oxygen precipitates at a low acidity concentrations over a period of at least 3μm from the surface to the thickness direction of the Si substrate by the CZ method There is no object, the surface structure is a double step layer over the entire surface, and a BP single crystal layer is formed on the surface of the Si substrate .
The oxygen concentration ranging from the surface of the Si substrate to at least 5 μm in the thickness direction is 1.0 × 10 ¹⁷ atoms / cm ³ or less, and the remaining oxygen concentration is 5.0 × 10 ^{17 to} 1.0 × 10 ¹⁸ atoms. / Cm ³ is preferable.
Further, it is preferable that pits such as COP do not exist on the surface of the Si substrate.
Also, wafers for GaN light-emitting element, in the GaN semiconductor crystal growth Si wafer, wherein the GaN layer of zinc blende type crystal structure on the BP single crystal layer is formed.
[0007]
On the other hand, in the method for producing a Si wafer for GaN semiconductor crystal growth according to the present invention, a Si substrate made of a Si single crystal by CZ method is annealed at a temperature of 800 to 1300 ° C. in a hydrogen gas atmosphere, and then 1050 to 1150 ° C. The epitaxial growth of Si is performed at the temperature of BP, and the epitaxial growth of BP is performed on the surface of the Si substrate .
The Si substrate preferably has no pits such as COP on the surface.
The Si single crystal is preferably a B heavy-doped P ₊ silicon single crystal having a resistance value of 5/1000 to 15/1000 Ωcm.
A method for manufacturing a wafer for a GaN light emitting device is characterized in that, in the second method for manufacturing a wafer for GaN semiconductor crystal growth, GaN having a zinc blende crystal structure is epitaxially grown on a BP single crystal layer. .
[0008]
When oxygen concentration is high and oxygen precipitates exist in the thickness direction from the surface of the Si substrate to at least 3 μm, oxygen in the Si substrate diffuses outwardly and oxidizes B in the epitaxial growth process of the BP layer. Polycrystallization occurs and inhibits BP single crystal growth.
The region having a low oxygen concentration and no oxygen precipitate is preferably formed from the surface to the thickness direction in a thickness of 15 μm.
The oxygen concentration ranging from the surface to the thickness direction of at least 5 μm is desirably 8 × 10 ¹⁶ atoms / cm ³ or less.
[0009]
If the annealing temperature of the Si substrate in a hydrogen gas atmosphere is less than 800 ° C., the surface change is reduced, while if it exceeds 1300 ° C., the surface becomes rough.
A preferable annealing temperature is 900 to 1250 ° C.
If the resistance value of the silicon single crystal is less than 5/1000 Ωcm, impurities react with oxygen during the epitaxial process, while if it exceeds 15/1000 Ωcm, the resistance becomes too high after device formation.
A preferable resistance value of the silicon single crystal is 6/1000 to 14/1000 Ωcm.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to specific examples.
First, the dopant B is doped by 1.0 × 10 ¹⁸ atoms / cm ³ or more by the CZ (Czochralski) method, the 6-inch B heavy-doped P ₊ Si single crystal (100) is pulled, sliced, and COP A Si substrate having no pits such as was obtained.
Next, when the Si substrate was annealed at a temperature of 800 to 1300 ° C. in a hydrogen (H ₂ ) gas atmosphere, as shown in FIG. 1, the thickness was 3 μm from the surface in the thickness direction (vertical direction in FIG. 1). In the meantime, oxygen and precipitates thereof were not seen at all.
In FIG. 1, the black spots are oxygen precipitates.
The oxygen concentration from the surface of the Si substrate to 5 μm in the thickness direction is 1.0 × 10 ¹⁷ atoms / cm ³ or less, and the remaining (bulk) oxygen concentration is 5.0 × 10 ¹⁷ to 1. It was 0 × 10 ¹⁸ atoms / cm ³ , and the electric resistance value of the Si substrate was 5/1000 to 15/1000 Ωcm.
[0011]
Next, Si was epitaxially grown at a temperature of 1050 to 1150 ° C. on the surface of the annealed Si substrate to form a Si single crystal layer.
In the epitaxial device, a graphite susceptor coated with SiC coated with quartz is placed in the center of a quartz tube having an inner diameter of 50 mm and a length of 350 mm, and a Si substrate is placed on the graphite susceptor and high frequency is applied from the outside. In this structure, the susceptor generates heat.
In addition, the epitaxial growth was performed by using SiCl ₄ (silicon tetrachloride) gas as a source gas and H ₂ gas as a carrier gas, and introduced into a certain amount of furnace through a mass flow controller.
The obtained Si substrate had a double step layer over the entire surface structure.
[0012]
Next, BP epitaxial growth was performed on the Si single crystal layer of the Si substrate at a temperature of 900 to 1150 ° C. to form a BP single crystal layer as an intermediate layer (buffer layer) for GaN growth.
Epitaxial device using the same as that used in the epitaxial growth of Si, epitaxial growth of the BP, a mixed gas of BCl and PCl ₃ (phosphorus trichloride) as a source gas ₃ (boron trichloride), H ₂ as a carrier gas A certain amount of gas was introduced into the furnace through a mass flow controller.
The growth temperature sequence is shown in FIG.
The obtained Si wafer for GaN semiconductor crystal growth has a terrace-shaped crystal growth as shown in FIG. 3 and a Si substrate having a double step layer surface structure as shown in FIGS. The BP single crystal layer 2 was laminated on the layer 1 in the order of BP and BP in a thickness of 4.56 μm, and the surface became extremely uniform.
[0013]
For comparison, a normal mirror wafer (Si substrate) not subjected to annealing treatment and Si epitaxial growth was used, and BP single-crystal layer was formed on the surface of this Si substrate in the same manner as described above. However, as shown in FIG. 6, the crystal structure of the surface was such that a polygonal BP of a quadrangular pyramid was grown, and the surface uniformity (flatness) was lacking.
[0014]
Subsequently, GaN was epitaxially grown on the surface of the Si wafer for GaN semiconductor crystal growth at a temperature of 700 to 1100 ° C. to form a GaN semiconductor crystal layer having a zinc blende crystal structure.
The epitaxial apparatus is the same as that used for the epitaxial growth of Si. The epitaxial growth of GaN is performed by using MMH (monomethylhydrazine) or TMG (trimethylgallium) gas as a source gas and H ₂ or N ₂ (nitrogen) as a carrier gas. A certain amount of gas was introduced into the furnace through a mass flow controller.
The obtained wafer for a GaN light emitting device had a very uniform surface of the GaN semiconductor single crystal layer, a thickness of 4 μm, and a zinc blende type with a complete crystal structure.
[0015]
When the GaN light emitting device was cut out from the GaN light emitting device wafer and allowed to emit light, the luminance during blue light emission was extremely high.
[0016]
【The invention's effect】
As described above, according to the Si wafer and a manufacturing method thereof for GaN semiconductor crystal growth of the present invention, the device forming region side no oxygen precipitates at a low oxygen concentration, and the surface structure becomes double step player Therefore, the BP single crystal layer, which is an intermediate layer of the GaN semiconductor single crystal layer, can be formed extremely stably with excellent surface uniformity.
Also, since the lattice mismatch of BP to GaN is only about 0.6%, the crystal structure of GaN can be a perfect zinc blende type.
In addition, according to the wafer for GaN light emitting device and the manufacturing method thereof, the crystal structure of the GaN semiconductor single crystal is a perfect zinc blende type, so that when the light emitting device is used, the luminance during blue light emission is extremely high. be able to.
[Brief description of the drawings]
FIG. 1 is an electron micrograph of the crystal structure of a Si wafer after an annealing process showing an example of an embodiment of a method for producing a Si wafer for GaN semiconductor crystal growth according to the present invention.
FIG. 2 is an explanatory diagram of a growth temperature sequence in a BP epitaxial growth step showing an example of an embodiment of a method for manufacturing a Si wafer for GaN semiconductor crystal growth according to the present invention.
FIG. 3 is an electron micrograph of the surface after BP epitaxial growth as a GaN growth intermediate layer showing an example of an embodiment of a Si wafer for GaN semiconductor crystal growth according to the present invention.
FIG. 4 is a schematic partial sectional view showing an example of an embodiment of a Si wafer for GaN semiconductor crystal growth according to the present invention.
FIG. 5 is an electron micrograph of a cross section after BP epitaxial growth showing an example of an embodiment of a Si wafer for GaN semiconductor crystal growth according to the present invention.
FIG. 6 is an electron micrograph showing the crystal structure of BP epitaxially grown on a conventional GaN semiconductor crystal growth Si wafer.
FIG. 7 is a cross-sectional view of a conventional GaN light emitting device wafer.
FIG. 8 is a partial cross-sectional view of a conventional Si wafer for GaN semiconductor crystal growth.
9 is a plan view of the Si wafer of FIG. 6. FIG.
FIG. 10 is a schematic partial sectional view of a conventional GaN semiconductor crystal growth Si wafer on which BP is epitaxially grown.
[Explanation of symbols]
1 Si substrate 2 BP single crystal layer

Claims (8)

There is no oxygen precipitate at a low oxygen concentration over at least 3 μm in the thickness direction from the surface of the Si substrate by the CZ method, and the surface structure is a double step layer over the entire surface. A GaN semiconductor crystal growth Si wafer, wherein a BP single crystal layer is formed on the GaN semiconductor crystal. The oxygen concentration ranging from the surface of the Si substrate to at least 5 μm in the thickness direction is 1.0 × 10 ¹⁷ atoms / cm ³ or less, and the remaining oxygen concentration is 5.0 × 10 ^{17 to} 1.0 × 10 ¹⁸ atoms. The Si wafer for GaN semiconductor crystal growth according to claim 1, wherein the Si wafer is / cm ³ .   3. The Si wafer for GaN semiconductor crystal growth according to claim 1, wherein pits such as COP are not present on the surface of the Si substrate. 4. The wafer for a GaN light emitting device according to claim 1, wherein a GaN layer having a zinc blende type crystal structure is formed on the BP single crystal layer. An Si substrate made of Si single crystal by the CZ method is annealed at a temperature of 800 to 1300 ° C. in a hydrogen gas atmosphere, and then Si is epitaxially grown at a temperature of 1050 to 1150 ° C. , and BP is formed on the surface of the Si substrate. A method for producing a Si wafer for GaN semiconductor crystal growth, comprising performing epitaxial growth . 6. The method for producing a Si wafer for GaN semiconductor crystal growth according to claim 5, wherein the Si substrate has no pits such as COP on the surface. The method for producing a Si wafer for GaN semiconductor crystal growth according to claim 5 or 6, wherein the Si single crystal is a B heavy-doped P ₊ silicon single crystal having a resistance value of 5/1000 to 15/1000 Ωcm. 8. The method of manufacturing a wafer for a GaN light emitting device according to claim 5, wherein the epitaxial growth of GaN having a zinc blende crystal structure is performed on the BP single crystal layer.

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