JP3741664B2 - Game machine, computer program and recording medium - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a gaming machine for drawing lottery or loss when a game ball launched on a game board passes a predetermined area, a computer program for causing the computer to function by a computer, and the computer program The recorded recording medium.
[0002]
[Prior art]
A conventional gaming machine will be described with reference to FIGS. 12 to 14 by taking a pachinko machine as an example.
FIG. 12 is a front explanatory view showing a main configuration of a conventional pachinko machine. FIG. 13 (A) is an explanatory view showing the positional relationship between the first type starting port and the first type starting port switch provided in the pachinko machine shown in FIG. 12, and FIG. 13 (B) is shown in FIG. It is explanatory drawing which shows a part of electrical structure of the pachinko machine shown with a block. FIG. 14 is an explanatory diagram illustrating an example of a circuit in which an illegal act has been performed.
[0003]
In FIG. 12, when a game ball launched by operating the operation handle 501 provided in the pachinko machine 500 wins the first type starting port 502 or the ordinary electric accessory 503 with both wings open, the winning ball is The first type start port switch 510 (FIG. 13B) is used for detection. At this detection timing, the main CPU 531 acquires one count value of the big hit lottery counter, and draws whether the big hit or the loss based on whether or not the acquired count value is a big hit value.
Also, at the above detection timing, a plurality of symbols (for example, 0 to 9) are scrolled in the vertical direction at the three horizontal positions on the screen of the symbol display 504, and the symbol corresponding to the lottery result after a predetermined time has elapsed. Confirmed display. For example, when the lottery result is a big hit, three identical numbers (for example, “777” as shown in FIG. 12) are confirmed and displayed, the door-type opening / closing member 505 is opened, and the big prize opening 506 is displayed. Open.
[0004]
When a game ball wins a prize winning opening 506, a predetermined number (for example, 15) of winning balls are paid out to the upper tray 507 for each winning ball. In addition, either the number of winning balls won in the grand prize opening 506 reaches a predetermined number (for example, 10), or a predetermined time (for example, 30 seconds) elapses after the grand prize opening 506 is opened. When these conditions are satisfied, the opening / closing member 505 is closed and the special winning opening 506 is closed. Furthermore, when the game ball that has won the big prize opening 506 passes through the specific area 508 provided inside the big prize opening 506, the right to continuously open the big prize opening 506 is generated. In this way, it is possible to perform a game of a plurality of rounds (for example, 15 rounds) on condition that the game ball passes through the specific area 508 from the opening to closing of the grand prize winning opening 506 as one round. it can.
[0005]
As shown in FIG. 13B, the pachinko machine 500 is provided with a power failure detection circuit 516 that detects a power failure, and the power failure detection circuit 516 is connected to the main board 530 and the payout control board 540. ing. As described above, the main CPU 531 mounted on the main board 530 acquires the count value of the big hit lottery counter, performs a lottery of big hit or lose, performs round control, and the like. The ROM 533 stores a computer program to be executed by the main CPU 531, and the RAM 532 stores a gaming state when the power is shut off, a computer program read from the ROM 533, a control command that the main CPU 531 transmits to each board, and the like.
The sub CPU 541 mounted on the payout control board 540 controls a prize ball payout motor (not shown) in accordance with a prize ball payout command transmitted from the main board 530. The ROM 543 stores computer programs executed by the sub CPU 541. The RAM 542 stores the number of award balls that have not been paid when the power is shut off, the computer program read from the ROM 543, and the like.
[0006]
Here, when the power source 520 is cut off, a power failure signal is output from the power failure detection circuit 516 to the main board 530 and the payout control board 540, and is mounted on the main CPU 531 and the payout control board 540 mounted on the main board 530. The sub CPU 541 executes NMI (non-maskable interrupt) processing, respectively, and prohibits access to each backup area of the RAMs 532 and 542 in which backup data at the time of power-off is stored. In addition, each backup area is supplied with power from the backup capacitor C2 and holds storage of each backup data.
When the power source 520 returns, the main CPU 531 reproduces the game immediately before the power is shut off based on the backup data stored in the backup area of the RAM 532. Further, the sub CPU 541 resumes payout of prize balls based on the number of unpaid prize balls stored and held in the backup area of the RAM 542.
[0007]
However, if the power supply is cut off while the test shot is being performed at the time of shipment of the pachinko machine or when the pachinko machine is installed, the data related to the big hits and winnings generated during the test shot will be backed up to the RAM, so if you open the store in that state Inconveniences such as starting a game based on the backed up data occurred.
In view of this, there has been proposed a method for eliminating the above inconvenience by providing a RAM clear switch 527 for outputting a RAM clear signal for erasing backup data to each RAM.
[0008]
[Problems to be solved by the invention]
By the way, it has been found by subsequent research that when the RAM clear switch 527 is turned ON, the initial value of the jackpot lottery counter may be misused to be reset to “0”. As shown in FIG. 14, an illegal substrate 550 called a hanging substrate is connected to a line connecting the RAM clear switch 527 and the main substrate 530. The hanging board 550 is provided with a circuit for transmitting a RAM clear signal to the main board 530 when a command transmitted from the transmitter 560 is received.
Here, if the count cycle of the big hit lottery counter is 2 ms, the time required to start counting from “0” and count the big hit value “7” is 2 ms × 7 = 14 ms. Further, as shown in FIG. 13A, the time required for the game ball P to be detected by the first type start port switch 510 after passing the first type start port 502, that is, the first type start port 502. It is assumed that the time required to flow down the distance L1 from the first type start port switch 27a to 0.4 s is 0.4 s.
[0009]
Then, when the command is transmitted from the transmitter 560 to the hanging board 550 0.386 s after the game ball P passes the first type starting port 502, a RAM clear signal is sent from the hanging board 550 to the main board 530, The initial value of the big win lottery counter is reset to “0” and starts counting from “0”. When the game ball P is detected by the first type start port switch 510 after 14 ms (= 0.4 s−0.386 s), the big win lottery counter counts “7” at that time.
Accordingly, when the command is transmitted from the transmitter 560 to the hanging board 550 aiming at a timing 0.386 s after the game ball P passes the first type starting port 502, the main CPU 531 receives a big hit value “7”. The count value is acquired from the jackpot lottery counter that counts the vicinity of the jackpot, and the probability that the jackpot will occur becomes very high.
[0010]
Accordingly, the present invention has been made to solve the above-described problem, and a gaming machine that cannot illegally generate a big hit by giving an instruction to erase the stored gaming state when the power is turned off. It aims at realizing.
[0011]
[Means, actions and effects for solving the problems]
  In order to achieve the above object, the invention according to claim 1 provides:Counting is performed by adding +1 from the initial value at a predetermined cycle. If the count value exceeds the upper limit, it returns to 0.The counter and the game ball fired on the game boardCan passPredetermined areaAnd a game ball that passes through the predetermined area and is provided at a position that is a predetermined distance away from the predetermined area in the flow-down direction of the game ball that has passed through the predetermined area.Detection means for detecting the game state, a game state storage means for storing the game state when the power supplied to the gaming machine is cut off, and the detection meansJournalPassed a certain areaGame ballA lottery that obtains the count value of the counter when an error is detected and draws a lottery or a loss based on the obtained count valueprocessingAnd the counterofdefault value0And deleting the gaming state stored in the gaming state storage meansprocessingAndMain CPU to execute,A RAM clear switch that transmits a RAM clear signal to the main CPU for causing the main CPU to execute the erasing process when turned onA gaming machine capable of resuming a game based on a gaming state stored in the gaming state storage means when the supply of power is resumed,The main CPU receives the RAM clear signalWhen the number of times counted by the number counting means exceeds the predetermined number,The main CPUEraseExecute the processThe technical means that the function stop means for stopping the function is provided is used.
[0012]
  Main CPUDepends on the detection meansAboveA game ball that has passed the specified areaIsWhen it is issued, the count value of the counter is acquired, and a lottery is selected based on the acquired count value.Execute the lottery processWhen the unter starts countingFirst ofExpected value0And the game state stored in the game state storage means is deleted.Execute the erase process. And the number counting means isThe main CPU receives the RAM clear signalWhen the number of times counted by the number counting means exceeds a predetermined number, the function stopping meansThe main CPUEraseExecute the processStop function.
  That meansThe main CPU receives the RAM clear signalWhen the counter starts counting when the number ofFirst ofExpected valueIs 0In order to prevent the game ball from passing through the predetermined areaSend RAM clear signal to main CPUThe counter0The timing at which counting is started and the count value of the big hit cannot be made coincident with the timing at which the game ball that has passed the predetermined area is detected by the detecting means.
  Therefore,Limit the number of times the RAM clear signal is acceptedCan generate a jackpot illegallyCan be deterred.
[0013]
  In the invention according to claim 2, in the gaming machine according to claim 1, the number counting means is:The main CPU receives the RAM clear signal between the first time and the second time.The technical means of counting the number of times is used.
[0014]
  That meansThe main CPU receives the RAM clear signalThe number of timesBetween the first time and the second timeWhen the counter starts counting when the specified number of times is exceededFirst ofExpected valueIs 0In order to prevent the game ball from passing through the predetermined areaSend RAM clear signal to main CPUThe counter0The timing at which counting is started and the count value of the big hit cannot be made coincident with the timing at which the game ball that has passed the predetermined area is detected by the detecting means.
  Therefore,Send RAM clear signal to main CPUAs a result, there is no risk that the jackpot will be illegally generated.
  In particular,Between the first time and the second timeThe time limit ofSend RAM clear signal to main CPUThe person who is going to aim at the timing when the game ball passes a predetermined area compared to the case where there is no time limit.Send RAM clear signal to main CPUIt becomes difficult.
  Therefore,Limit the number of times and time to accept the RAM clear signalCan generate a jackpot illegallyCan be deterred.
[0015]
  In invention of Claim 3,Counting is performed by adding +1 from the initial value at a predetermined cycle. If the count value exceeds the upper limit, it returns to 0.The counter and the game ball fired on the game boardCan passPredetermined areaAnd a game ball that passes through the predetermined area and is provided at a position that is a predetermined distance away from the predetermined area in the flow-down direction of the game ball that has passed through the predetermined area.Detection means for detecting the game state, a game state storage means for storing the game state when the power supplied to the gaming machine is cut off, and the detection meansJournalPassed a certain areaGame ballA lottery that obtains the count value of the counter when an error is detected and draws whether it is a big hit or a loss based on the obtained count valueprocessingAnd the counterofdefault value0And deleting the gaming state stored in the gaming state storage meansprocessingAndMain CPU to execute,A RAM clear switch that transmits a RAM clear signal to the main CPU for causing the main CPU to execute the erasing process when turned onA gaming machine capable of resuming a game based on a gaming state stored in the gaming state storage means when the supply of power is resumed,The main CPU receives the RAM clear signal at a time other than between the first time and the second time.IfThe main CPUEraseExecute the processThe technical means that the function stop means for stopping the function is provided is used.
[0016]
  Main CPUDepends on the detection meansAboveA game ball that has passed the specified areaIsWhen it is issued, the count value of the counter is acquired, and a lottery is selected based on the acquired count value.Execute the lottery processWhen the unter starts countingFirst ofExpected value0And the game state stored in the game state storage means is deleted.Execute the erase process. And the function stop means isThe main CPU receives the RAM clear signal between the first time and the second time.IfThe main CPUEraseExecute the processStop function.
  That meansThe main CPU receives the RAM clear signal at a time other than between the first time and the second time.If the counter starts countingFirst ofExpected valueIs 0In order to prevent the game ball from passing through the predetermined areaSend RAM clear signal to main CPUThe counter0The timing at which counting is started and the count value of the jackpot is counted cannot coincide with the timing at which the game ball that has passed the predetermined area is detected by the detecting means.
  Therefore,Limit the time to receive RAM clear signalCan generate a jackpot illegallyCan be deterred.
[0031]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of a gaming machine according to the present invention will be described with reference to the drawings. In the following embodiments, a first type pachinko machine will be described as an example of a gaming machine according to the present invention.
[Overall main configuration]
First, the main configuration of the pachinko machine of this embodiment will be described with reference to FIG. FIG. 1 is a perspective explanatory view showing the appearance of the pachinko machine.
The pachinko machine 1 is provided with a front frame 2 that can be opened and closed, and a glass frame 4 is attached to the front frame 2 so as to be opened and closed. On the right side of the front frame 2, a key hole 3 is provided for inserting a key for opening and closing the glass frame 4. A game board 5 is provided inside the glass frame 4, and a firing handle 15 for operating a launching device (not shown) for launching a game ball to the game board 5 is provided below the right side of the front frame 2. It is pivotally mounted.
[0032]
Below the glass frame 4, a prize ball / rental supply port 6a for supplying prize balls or rental balls is formed. The prize ball / rental supply port 6a has a prize ball / rental supply port 6a on the supply side. An upper tray 6 is provided for collecting prize balls and balls supplied from the ball rental supply port 6a. Below the upper tray 6, there is formed a discharge port 7 a that discharges prize balls that have flowed beyond the capacity of the upper tray 6 and game balls discharged from the upper tray 6 by operating the upper tray ball release lever 6 b. Has been. On the discharge side of the discharge port 7a, a lower tray 7 is provided for storing game balls discharged from the discharge port 7a. A frame lamp 9 is provided above the game board 5, and an ashtray 7 b is provided on the left side of the lower tray 7.
[0033]
[Main configuration of game board 5]
Next, the main configuration of the game board 5 will be described with reference to FIG.
A center case 30 is attached to the approximate center of the game board 5, and the center case 30 is provided with a symbol display 32 a. The symbol display 32a displays a special symbol in a variable manner or displays a normal symbol in a variable manner in the display area 321 at the upper left of the screen.
Further, the center case 30 is composed of four LEDs for displaying the number stored as the number of times that the symbol display 32a can start the variation display of the special symbol (hereinafter referred to as the special symbol start memory number). The special symbol start memory display LED 31 and four LEDs for displaying the number stored as the number of times that the symbol display 32a can start the normal symbol variation display (hereinafter referred to as the normal symbol start memory number). The normal symbol start memory display LED 33 is provided.
[0034]
Further, on the right side of the center case 30, a normal symbol operating right gate 25 having a function of starting a variation of the normal symbol in the symbol display 32a by passing of the game ball is provided. Similarly, a normal symbol operation left gate 26 having a function of starting a variation of the normal symbol in the symbol display 32a by the passing of the game ball is provided. Below the center case 30, there is provided a first type starting port 27 having a function of variably displaying a special symbol on the symbol display 32a when a game ball is won, and below the first type starting port 27. Is provided with a normal electric accessory 47 that opens both wings when the result of the normal symbol lottery is a win. The ordinary electric accessory 47 with both wings open has a function of variably displaying a special symbol on the symbol display 32 a as with the first type starting port 27. Below the ordinary electric accessory 47, there is provided a variable winning device 40 that operates when the special symbols fixedly displayed in the three display areas of the symbol display 32a are jackpot symbols.
[0035]
An open / close member 43 that opens when the big hit occurs and opens the big prize opening 41 is attached to the variable prize winning device 40 so as to be opened and closed. Further, inside the variable winning device 40, a specific area having a function of continuously opening and closing the opening / closing member 43 by the passing of the game ball, and a specific area switch (FIG. 3) for detecting the game ball that has passed this specific area. And a specific area solenoid (indicated by reference numeral 41c in FIG. 3) for driving a member that changes the specific area.
Corner ornaments 11 decorated with LEDs are provided at both upper corners of the game board 5, and side ornaments 20 decorated with LEDs are provided on both sides of the game board 5. The right side decoration 20 is provided with a right sleeve winning opening 12 and a lower right winning opening 45, and the left side decoration 20 is provided with a left sleeve winning opening 13 and a lower left winning opening 44. ing.
Further, the game board 5 is provided with windmills 24, 24, rails 16 for guiding the launched game balls to the game area, and an out port 14 for collecting the game balls that have not won the prize as out balls. . A lot of nails 17 are driven into the game board 5, and the game balls fired on the game board 5 fall while fluctuating between the nails 17 and pass through the normal symbol operation gates 25 and 26. Or winning at the first type starting port 27 and each winning port, or being collected from the out port 14.
[0036]
[Electric configuration of pachinko machine]
Next, the main electrical configuration of the pachinko machine will be described with reference to FIG.
The pachinko machine is provided with a main board 100, and a microprocessor 110 is mounted on the main board 100. The microprocessor 110 has main control of the game such as lottery for winning or losing, detecting that the RAM clear switch 10 is turned ON, counting the number of winnings to the winning winning port 41, and controlling the round in the winning game. A main CPU 112 to be executed, a ROM 114 in which a computer program for the main CPU 112 to execute various controls and the like, a detection result that a game ball has passed the first type starting port 27, and a prize are being played. And a RAM 116 for temporarily storing various data generated in the computer, computer programs read from the ROM 114, and the like.
The following is electrically connected to the main board 100. A first type start port switch 27a for detecting that a game ball has won the first type start port 27 or the opened ordinary electric accessory 47, a RAM clear switch 10, a symbol control device 32, a lamp for controlling LEDs and lamps. The control device 300, the power supply board 80, the payout control board 200 for controlling the payout of prize balls, the voice control device 79 for controlling sound effects during the game, and the game board information relating to the number of prize balls paid out and the occurrence of jackpots, etc. A game frame information terminal board 52, a board surface relay board 51, and a game frame relay board 53 for transmitting to a hall computer provided in a hall management room or the like.
[0037]
The payout control board 200 is equipped with a microprocessor 210 that operates by inputting a control command sent from the main board 100. The microprocessor 210 controls the sub CPU 212 that controls the payout of prize balls and balls. And a ROM 214 in which various control programs for the sub CPU 212 to execute control such as paying out a prize ball are recorded, and a control program read from the ROM 214 when the sub CPU 212 executes the various control programs and during the game. A RAM 216 that temporarily stores various data such as the number of winning prizes and the number of winning balls is mounted. The payout control board 200 is electrically connected to the RAM clear switch 10, the power supply board 80, the launch motor drive board 15c for driving the launch motor 15e, the game frame information terminal board 52, and the payout relay board 55. Yes. A launch switch 15d for outputting a drive signal from the launch motor drive substrate 15c to the launch motor 15e is connected to the launch motor drive substrate 15c.
[0038]
The game frame relay board 53 is electrically provided with a lower dish full detection switch 72 for detecting that the lower tray 7 is filled with game balls, a prize ball dead detection switch 73 for detecting a prize ball dead, and a sensor relay board 54. It is connected to the. The sensor relay board 54 is electrically connected to the prize ball payout sensors 62 a and 62 b and the payout relay board 55 provided in the prize ball unit 62. The payout relay board 55 is electrically connected to a payout outage detection switch 61 for detecting outage of a payout ball, a prize ball payout motor 62c, and a payout unit 63.
The board relay board 51 has passed through a normal electric accessory solenoid 47a that drives the normal electric accessory 47, a right gate switch 25a that detects a game ball that has passed through the normal symbol operating right gate 25, and a normal symbol operating left gate 26. A left gate switch 26a for detecting a game ball, a big prize opening switch 41a for detecting a game ball won in the big prize opening 41, a right sleeve prize opening switch 12a for detecting a game ball won in the right sleeve prize opening 12, and a left sleeve A left sleeve winning opening switch 13a for detecting a gaming ball won in the winning opening 13, a lower right winning opening switch 45a for detecting a gaming ball winning in the lower right winning opening 45, and a gaming ball won in the lower left winning opening 44 are detected. The lower left winning port switch 44a and the large winning port relay board 50 are shown.
[0039]
A special region switch 41 b, a specific region solenoid 41 c that drives a member that changes the specific region, and a special winning port solenoid 43 a that drives the opening / closing member 43 are electrically connected to the special winning port relay board 50. The power supply board 80 is electrically connected to the CR connection board 56, and the CR connection board 56 includes a frequency display board for displaying the remaining frequency of the prepaid card, a device for reading the prepaid card, and the like. The portion 71 is electrically connected. The power supply board 80 is supplied with power from a main power supply 70 of AC 24 V (50 Hz / 60 Hz), and supplies necessary power to each board and apparatus.
The power supply board 80 is provided with a RAM clear switch 10 and a power switch 18. That is, in the pachinko machine 1 according to this embodiment, the RAM clear process is performed by turning on the power while the RAM clear switch 10 is turned on. Therefore, the RAM clear switch 10 and the power switch 18 are It is provided at a location close to each other so that it can be easily operated. In this embodiment, the RAM clear switch 10 is a push-on type switch.
[0040]
[Configuration around the power supply board 80]
Next, the configuration around the power supply substrate 80 will be described with reference to FIG.
The power supply board 80 is provided with a power switch 18 connected to the AC 24V main power supply 70. The AC 24V supplied via the power switch 18 is converted to DC 32V by the 32V generation circuit 82 via the overload protection circuit 81 and supplied to each substrate and device as a DC 32V power source. Also, DC32V is converted to DC24V by the 24V generation circuit 83 and supplied to each substrate and apparatus as DC24V. Furthermore, DC32V is converted into DC12V by the 12V generation circuit 84 and supplied to each substrate and apparatus as a DC12V power source. Further, DC32V is converted to DC5V by the 5V generation circuit 85 and supplied to each substrate and apparatus as a DC5V power source.
[0041]
When the power failure detection circuit 86 detects the power interruption, the main CPU 112 and the sub CPU 212 execute NMI processing, respectively, and access to the RAM 116 and RAM 216 is prohibited. Further, backup power is supplied from the backup capacitor C1 to each backup area of the RAM 116 and RAM 216, and the storage of backup data is maintained. As a result, the gaming state (for example, the fact that a big hit has occurred, the number of rounds executed, the number of winnings, etc.) immediately before power-off is backed up in the RAM 116, and the number of unpaid winning balls is backed up in the RAM 216. When the power is restored, the game is resumed from the game immediately before the power is cut off based on the game state backed up in the RAM 116 and RAM 216.
In addition, data such as jackpots and winnings that occurred during the test shot before opening the store is backed up to the RAM when the power is turned off, so when the power is turned on and the store opens, the game is played based on the data backed up in the RAM. The inconvenience of being resumed occurs. Therefore, it is necessary to erase the backup data before opening the store. In FIG. 4, when the power switch 18 is turned on while the RAM clear switch 10 is being pressed, the backup data stored in the RAMs 116 and 216 is erased.
[0042]
[Main game flow]
Next, the main flow of the game will be described with reference to FIGS.
FIG. 5 is an explanatory diagram of a jackpot lottery counter. FIG. 6 is a flowchart showing the flow of RAM clear processing executed by the main CPU 112. FIG. 7 is a flowchart showing the flow of the first type start port process executed by the main CPU 112. FIG. 8 is a flowchart showing a flow of special symbol control executed by the main CPU 112. In the following description, it is assumed that the symbol display 32a displays the special symbols in three different positions in the horizontal direction of the screen, and the symbols that are displayed in a variable manner or displayed in order from the left are the left symbol, the middle symbol, and the right symbol. Let's say.
[0043]
(Big win lottery counter)
A big hit lottery counter Ct1 shown in FIG. 5 is a counter for determining whether or not a big hit is made, and counts a plurality of numerical values, that is, a total of 953 numerical values from “0” to “952” in this embodiment. The big win lottery counter Ct1 adds +1 at a predetermined period from the initial value at which counting starts, in this embodiment, at a period of 2 ms, and clears to 0 when the addition result exceeds the acquisition range. The initial value is updated by +1 every 2 ms.
In this embodiment, among the 953 numerical values, at the normal probability, a total of three of “7”, “517”, and “947” are jackpot values (a table in which the jackpot value is set). In the case of high probability (probability change), “7”, “67”, “157”, “227”, “307”, “407”, “517”, “557”, “617” , “677”, “737”, “797”, “857”, “907”, and “947” are set in the big hit value table as big hit values.
[0044]
(RAM clear processing)
The main CPU 112 executes a security check that checks whether there is an abnormality in the computer program recorded in the ROM 114 (step (hereinafter abbreviated as A) 10 in FIG. 6), and initializes the work area of the RAM 116. (A12). Subsequently, the main CPU 112 determines whether or not the RAM clear switch 10 (FIGS. 3 and 4) is pressed and turned on (S14). If it is determined that the switch is ON (A14: Yes), “1” is added to the number N of RAM clear instructions (hereinafter referred to as the RAM clear instruction count) N (A16). Subsequently, the main CPU 112 determines whether or not the RAM clear count N is “4” or more (A18). If it is not “4” or more, that is, less than “4” (A18: No), the RAM A clear process is executed (A20). That is, the backup data stored in the RAM 116 is deleted, and the value when the big hit lottery counter Ct1 starts counting is returned to the initial value “0”. As described above, the RAM clear process is also executed when a signal is transmitted from the transmitter 560 to the hanging board 550 and the signal is transmitted from the hanging board 550 to the main board 100 by an illegal act.
[0045]
Then, the main CPU 112 starts control of the game such as detection of winning, lottery for winning or losing, updating of the initial value of the jackpot lottery counter Ct1 (A24). If the RAM clear instruction count N is equal to or greater than “4” (A18: Yes), the game control is started without executing the RAM clear process (A24).
That is, it is possible to execute the RAM clear process when the RAM clear instruction count N is less than “4” (3 or less), and not to execute the RAM clear process when it is “4” or more.
Normally, it is sufficient in a game store that the RAM clear process can be performed about three times. For example, in order to erase the data backed up in the RAM when the power is turned off by performing a test shot before opening the store or after closing the store, the RAM clear instruction is performed once, twice in total.
[0046]
Therefore, it can be considered that four or more RAM clear instructions are issued for the purpose of illegally generating a big hit.
That is, when the RAM clear instruction count N is “4” or more, the RAM clear process is not executed, so that the big hit lottery counter Ct1 is aimed at the timing at which the game ball passes the first type starting port 27. The initial value at the start of the counting is returned to “0”, and when the game ball that has passed through the first type starting port 27 is detected by the first type starting port switch 27a, the main CPU 112 sets the count value of the big hit lottery counter Ct1. The timing of acquisition and the timing at which the jackpot lottery counter Ct1 counts the jackpot value “7” can be matched to eliminate the possibility of generating a jackpot illegally.
If the RAM clear switch 10 is not turned on (A14: No), the main CPU 112 determines whether the check data stored in the RAM 116 is correct data, for example, A5A5H. (A22). If it is A5A5H (A22: Yes), the game control is started (A24). If it is not A5A5H (A22: No), it is determined that abnormal data is stored in the RAM 116, and the RAM A clear process is executed (A20).
The RAM clear process is executed according to a computer program recorded in the ROM 114.
[0047]
(Type 1 start port processing)
When the first type start port switch 27a (FIG. 3) is turned ON, the main CPU 112 detects the voltage change of the input port connected to the first type start port switch 27a, so that the first type start port switch 27a is turned on. It is determined that it is turned on (A30 in FIG. 7: Yes), and it is determined whether or not the special symbol starting storage number U1 is less than “4” (A32). If it is less than “4” (A32: Yes) Then, “1” is added to the special symbol starting storage number U1 (A34). Subsequently, the main CPU 112 acquires one count value counted by the big hit lottery counter Ct1 (FIG. 5) (A36), and temporarily stores the acquired count value in the RAM 116 (A38).
Here, even if the RAM clear instruction is issued when the game ball passes through the first type start port 27 due to the above-described fraud, the number of RAM clear instructions N is “4” or more. The jackpot lottery counter Ct1 does not start counting from “0”, so there is no possibility that the jackpot value is acquired and stored in the RAM 116.
The first type start port process is executed by a computer program recorded in the ROM 114.
[0048]
(Special design control)
The main CPU 112 determines whether or not a control command for controlling the symbol control device 32 is output to the symbol control device 32, that is, whether or not the special symbol is fluctuating (A50 in FIG. 8). If it is determined that it is not in the middle (A50: No), it is determined whether or not the special symbol start memory number U1 is “1” or more (A52). If the main CPU 112 determines that the special symbol start memory number U1 is equal to or greater than “1” (A52: Yes), it subtracts “1” from the special symbol start memory number U1 (A54), and the above-described first type In A38 (FIG. 7) of the start port process, the count value temporarily stored in the RAM 116 is read (A56).
Subsequently, the main CPU 112 determines whether or not a probability variation flag indicating that the gaming state is certain has been set (probability variation flag = 1 or 0) (A58). If the main CPU 112 determines that the probability variation flag is set (A58: Yes), the main CPU 112 refers to the jackpot value table at a high probability (A60), and the jackpot value that is the same as the count value read in A56 is set. Based on whether it is set or not, it is determined whether or not it is a big hit (A64). For example, when the count value read in A56 is “67”, it is determined that the game is a big hit (A64: Yes).
[0049]
If the probability variation flag is not set (A58: No), the jackpot value table at the normal probability is referred to (A62), and whether or not the same jackpot value as the count value read in A56 is set. Based on this, it is determined whether or not a big hit (A64). For example, if the count value read in A56 is “7”, it is determined that the game is a big hit (A64: Yes).
Subsequently, when the main CPU 112 determines that it is a big hit (A64: Yes), it sets a big hit flag indicating that a big hit has occurred (A66), and determines the big hit symbol with reference to the big hit symbol table for determining the big hit symbol (A68), it is determined whether or not the selected jackpot symbol is a probability variation symbol (A70). Here, the probability variation symbol means a specific symbol (for example, an odd number of symbol jackpot symbol) among the jackpot symbols. If the symbol bonus symbol is a jackpot symbol, the game after the jackpot game ends, It changes with certainty.
[0050]
Here, if it is a probability variation symbol (A70: Yes), a probability variation flag is set (A72). When the main CPU 112 determines that it is not a big hit, that is, a loss (A64: No), the lost symbols to be determined and displayed as the left symbol, the middle symbol, and the right symbol with reference to the lost symbol table for determining the lost symbol, respectively. Determine (A74).
The jackpot symbol table is configured by associating a plurality of random numbers (for example, 0 to 9) and a plurality of special symbols (for example, 000 to 999), and corresponds to the random numbers selected by the main CPU 112 at random. The special symbol attached is determined as the jackpot symbol. The lose symbol table is configured by associating a plurality of random numbers (for example, 0 to 9) and a plurality of special symbols (for example, 0 to 9), and corresponds to the random numbers selected by the main CPU 112 at random. The attached special symbol is determined to be a lost symbol. If the determined lost symbol is the same as the jackpot symbol, the lost symbol is determined again. In addition, the determination of the lost symbol is performed for each of the left symbol, the middle symbol, and the right symbol, and a total of three lost symbols are determined.
Subsequently, the main CPU 112 determines the variation pattern of the special symbol with reference to the variation pattern table for determining the variation pattern of the special symbol (A76). The variation pattern includes a variation time of the special symbol, a type of reach when the reach is performed, a normal stop pattern when the reach is not performed, and the like. Subsequently, the main CPU 112 transmits a variation start command indicating the variation pattern determined in A76, the jackpot symbol determined in A68 or the loss symbol determined in A74 to the symbol control device 32 (A78). Subsequently, the main CPU 112 starts measuring the variation time of the special symbol indicated by the variation pattern determined in A76 (A80).
[0051]
Further, the main CPU 112 transmits a variation pattern designation command to the symbol control device 32 and simultaneously transmits the variation pattern designation command to the voice control device 79 and the lamp control device 300 (FIG. 3). As a result, the voice control device 79 outputs sound effects in a pattern corresponding to the received variation pattern designation command, and the lamp control device 300 lights various LEDs in a pattern corresponding to the received variation pattern designation command. Let
When the main CPU 112 determines that the time when the measurement was started at A80 has timed up (A82: Yes), the main CPU 112 transmits an all symbol stop command to stop all symbols to the symbol control device 32 (A84), and the measurement. The time is reset (A86). As a result, the symbol display 32a confirms and displays the big hit symbol or the lost symbol. Further, the sound control device 79 stops outputting the sound effect, and the lamp control device 300 stops the lighting of the LED.
The special symbol control is executed according to a computer program recorded in the ROM 114.
[0052]
[Effect of the first embodiment]
As described above, if the pachinko machine 1 according to the first embodiment is used, the RAM clear process can be prevented from being executed when the RAM clear instruction count N is “4” or more. It is possible to prevent the big hit lottery counter Ct1 from starting counting from “0” when an instruction is given.
Therefore, when the RAM clear instruction count N is “4” or more, the initial value of the count start of the big hit lottery counter Ct1 is returned to “0” aiming at the timing when the game ball passes the first type starting port 27. The timing at which the main CPU 112 acquires the count value of the big hit lottery counter Ct1 when the game ball that has passed through the first type start port 27 is detected by the first type start port switch 27a, and the big hit lottery counter Ct1 The timing of counting the value “7” can be matched to eliminate the possibility of illegally generating a big hit.
[0053]
Second Embodiment
Next, a second embodiment of the present invention will be described with reference to FIG.
FIG. 9 is a flowchart showing the flow of the RAM clear process 2 executed by the main CPU 112. The pachinko machine of this embodiment is characterized in that a RAM clear instruction given outside the set time can be invalidated. Since the pachinko machine of this embodiment has the same configuration and function as the pachinko machine 1 of the first embodiment except for a part of the RAM clear process 2, the description of the same part is omitted. Moreover, the same code | symbol shall be used about the same structure and function.
[0054]
The main CPU 112 executes a security check (step (hereinafter abbreviated as B) 10) and initializes the work area of the RAM 116 (B12). Subsequently, the main CPU 112 determines whether or not the RAM clear switch 10 (FIGS. 3 and 4) is pressed and turned on (B14). If it is determined that it is ON (B14: Yes), it is determined whether or not the current time is within the range of times T1 to T2 (B16). For example, normally, at a game store, RAM clear processing is often executed before opening, so the time T1 is set to 9:00 am and the time T2 is set to 9:30 am. Then, it is determined whether or not the current time is within the range of 9 am to 9:30 am (B16).
Here, if the current time is within the range of time T1 to T2 (B16: Yes), RAM clear processing is executed (B18). That is, the backup data stored in the RAM 116 is deleted, and the value when the big hit lottery counter Ct1 starts counting is returned to the initial value “0”. As described above, the RAM clear process is also executed when a signal is transmitted from the transmitter 560 to the hanging board 550 and the signal is transmitted from the hanging board 550 to the main board 100 by an illegal act.
[0055]
Then, the main CPU 112 starts game control (B22). If the current time is not within the range of the times T1 to T2 (B16: No), the game control is started without executing the RAM clear process (B22).
That is, the RAM clear process is executed when the time when the RAM clear instruction is issued is within the range of the times T1 to T2, and the RAM clear process is not executed when the time is out of the range. Can do.
Normally, at a game store, the RAM clear process is performed at a certain time zone before the store is opened, and therefore, the RAM clear instruction performed outside the time zone can be regarded as being performed for the purpose of illegally generating a big hit. .
Therefore, when the time at which the RAM clear instruction is issued is not within the set time range, the timing at which the game ball passes the first type start port 27 is prevented by not executing the RAM clear process. The initial value of the count start of the big hit lottery counter Ct1 is reset to “0”, and the main CPU 112 draws the big hit when the game ball that has passed the first type start port 27 is detected by the first type start port switch 27a. The timing at which the count value of the counter Ct1 is acquired coincides with the timing at which the big hit lottery counter Ct1 counts the big hit value “7”, thereby eliminating the possibility of generating a big hit.
[0056]
When the RAM clear switch 10 is not turned on (B14: No), the main CPU 112 determines whether the check data stored in the RAM 116 is correct data, for example, A5A5H. (B20). If it is A5A5H (B20: Yes), the game control is started (B22).
Further, the main CPU 112 executes the same processing as the first type start port processing (FIG. 7) and special symbol control (FIG. 8) described in the first embodiment.
The RAM clear process 2 is executed according to a computer program recorded in the ROM 114.
[0057]
[Effects of Second Embodiment]
As described above, if the pachinko machine 1 according to the second embodiment is used, if the time when the RAM clear switch 10 is turned on is within the range of the times T1 to T2, the RAM clear process is executed, and the range If it is outside, the RAM clear process can be prevented from being executed.
Therefore, by instructing the RAM clear, there is no possibility that the initial value of the count start of the big hit lottery counter Ct1 is returned to “0” and the big hit is generated illegally.
[0058]
<Third Embodiment>
Next, a third embodiment of the present invention will be described with reference to FIG.
FIG. 10 is a flowchart showing the flow of the RAM clear process 3 executed by the main CPU 112. The pachinko machine of this embodiment is characterized in that a RAM clear instruction other than a predetermined number of times performed within a set time can be invalidated. Since the pachinko machine of this embodiment has the same configuration and function as the pachinko machine 1 of the first embodiment except for a part of the RAM clear process 3, the description of the same part is omitted. Moreover, the same code | symbol shall be used about the same structure and function.
[0059]
The main CPU 112 executes a security check (step (hereinafter abbreviated as C) 10), and initializes the work area of the RAM 116 (C12). Subsequently, the main CPU 112 determines whether or not the RAM clear switch 10 (FIGS. 3 and 4) is pressed and turned on (C14). If it is determined that it is ON (C14: Yes), it is determined whether or not the current time is within the range of time T1 to T2 (C16). For example, since a game store usually performs a RAM clear process before the store is opened, the time T1 is set to 9:00 am and the time T2 is set to 9:30 am. Then, it is determined whether or not the current time is within the range of 9 am to 9:30 am (C16).
If the current time is within the range of times T1 to T2 (C16: Yes), “1” is added to the RAM clear instruction count N (C18), and the RAM clear instruction count N is “4” or more. It is determined whether or not there is (C20). Here, when it is not “4” or more, that is, when it is less than “4” (3 or less) (C20: No), RAM clear processing is executed (C22). That is, the backup data stored in the RAM 116 is deleted, and the value when the big hit lottery counter Ct1 starts counting is returned to the initial value “0”. As described above, the RAM clear process is also executed when a signal is transmitted from the transmitter 560 to the hanging board 550 and the signal is transmitted from the hanging board 550 to the main board 100 due to an illegal act.
[0060]
Then, the main CPU 112 starts game control (C26). Further, when the current time is not within the range of time T1 to T2 (C16: No), or when the current time is within the range of time T1 to T2, but the RAM clear instruction count N is “4” or more. (C20: Yes), the game control is started without executing the RAM clear process (C26).
That is, when the RAM clear instruction is performed within the range of time T1 to T2 and the number of RAM clear instructions N is not “4” or more, the RAM clear process is executed and the time T1 to T1 is executed. If it is outside the range of T2, or if it is within the range but the RAM clear instruction count N is equal to or greater than “4”, the RAM clear instruction is issued for the purpose of illegally generating a big hit. Therefore, the RAM clear process can be prevented from being executed.
Accordingly, the initial value of the count start of the big hit lottery counter Ct1 is returned to “0” aiming at the timing at which the game ball passes the first type start port 27, and the game ball that has passed the first type start port 27 is the first The timing at which the main CPU 112 obtains the count value of the big hit lottery counter Ct1 when detected by the seed start port switch 27a coincides with the timing at which the big hit lottery counter Ct1 counts the big hit value “7”. It is possible to eliminate the possibility of generating a big hit.
[0061]
When the RAM clear switch 10 is not turned on (C14: No), the main CPU 112 determines whether the check data stored in the RAM 116 is correct data, for example, A5A5H. (C24). If it is A5A5H (C24: Yes), control of the game is started (C26).
Further, the main CPU 112 executes the same processing as the first type start port processing (FIG. 7) and special symbol control (FIG. 8) described in the first embodiment.
The RAM clear process 3 is executed according to a computer program recorded in the ROM 114.
[0062]
[Effect of the third embodiment]
As described above, when the pachinko machine 1 according to the third embodiment is used, the time when the RAM clear switch 10 is turned on is within the range of the times T1 to T2, and the RAM clear instruction count N is “4”. When the RAM clear switch 10 is turned on, the time when the RAM clear switch 10 is turned on is out of the above range, or within the above range but the RAM clear instruction count N is “4”. In the above case, the RAM clear process can be prevented from being executed.
Therefore, by instructing the RAM clear, there is no possibility that the initial value of the count start of the big hit lottery counter Ct1 is returned to “0” and the big hit is generated illegally.
[0063]
<Fourth embodiment>
Next, a fourth embodiment of the present invention will be described with reference to FIG.
FIG. 11 is a flowchart showing the flow of the RAM clear process 4 executed by the main CPU 112. The pachinko machine of this embodiment is characterized in that a RAM clear instruction other than a RAM clear instruction performed according to a predetermined pattern can be invalidated. Since the pachinko machine of this embodiment has the same configuration and function as the pachinko machine 1 of the first embodiment except for a part of the RAM clear process 4, the description of the same part is omitted. Moreover, the same code | symbol shall be used about the same structure and function.
[0064]
The main CPU 112 executes a security check (step (hereinafter abbreviated as D) 10), and initializes the work area of the RAM 116 (D12). Subsequently, the main CPU 112 determines whether or not the RAM clear switch 10 (FIGS. 3 and 4) is pressed and turned on (D14). If it is determined that the timer is ON (D14: Yes), it is determined whether or not a timer start flag indicating that the timer to be started in D20 is started is set (D16). At this stage, since the timer is not yet started, a negative determination is made (D16: No), a timer start flag is set (D18), and a timer that times up in 5 seconds is started (D20).
Subsequently, the main CPU 112 adds “1” to the RAM clear instruction count N (D22), and determines whether the timer started in D20 has passed 5 seconds (D24), and has not passed 5 seconds. In this case (D24: No), it is determined whether or not the RAM clear instruction count N is “3” (D26). Here, since the first RAM clear instruction has just been issued, a negative determination is made (D26: No), and the process returns to D14.
[0065]
Subsequently, when the main CPU 112 determines that the RAM clear switch 10 has been turned ON (D14: Yes), the timer start flag has already been set in the previous D18, so an affirmative determination is made in D16 (D16: Yes), and D22 Then, “1” is added to the RAM clear instruction count N. As a result, the RAM clear instruction count N becomes “2”. Subsequently, when the main CPU 112 determines that the timer has not passed 5 seconds (D24: No), the main CPU 112 determines whether or not the RAM clear instruction count N has become “3” (D26). 2 ”(D26: No). If the RAM clear switch 10 is turned on (D14: Yes),“ 1 ”is added to the RAM clear instruction count N (D16: Yes, D22). As a result, the RAM clear instruction count N becomes “3”.
Subsequently, when the main CPU 112 determines that the timer has not passed 5 seconds (D24: No), it determines that the RAM clear instruction count N is “3” (D26: Yes), and executes the RAM clear process. (D28). That is, the backup data stored in the RAM 116 is deleted, and the value when the big hit lottery counter Ct1 starts counting is returned to the initial value “0”. As described above, the RAM clear process is also executed when a signal is transmitted from the transmitter 560 to the hanging board 550 and the signal is transmitted from the hanging board 550 to the main board 100 by an illegal act.
[0066]
Then, the main CPU 112 starts control of the game (D30), and resets the timer start flag and the timer (D34).
On the other hand, if the RAM clear instruction count N has not reached “3” by the time the timer passes 5 seconds (D24: Yes), the main CPU 112 starts the game control without executing the RAM clear process ( D30), the timer start flag and the timer are reset (D34).
In other words, if the RAM clear switch 10 is turned on twice within 5 seconds after the RAM clear switch 10 is first turned on, the RAM clear process is executed. If the RAM clear switch 10 is not turned on twice, the RAM clear process is executed. You can avoid it. When the first RAM clear switch 10 is turned on once, the RAM clear switch 10 may be turned on twice within 5 seconds, and the second and third times may not be continuous. Further, the RAM clear switch 10 may be continuously turned on three times.
[0067]
When the RAM clear is performed, if only the game store person remembers to press the RAM clear switch 10 in the above pattern, the instruction of the RAM clear performed in a pattern other than the above pattern is the game store person's instruction. It is possible to prevent the RAM clear process from being executed by assuming that it is an instruction for clearing the RAM by a person other than the above, that is, an instruction issued for the purpose of illegally generating a big hit.
Accordingly, the initial value of the count start of the big hit lottery counter Ct1 is returned to “0” aiming at the timing at which the game ball passes the first type start port 27, and the game ball that has passed the first type start port 27 is the first The timing at which the main CPU 112 obtains the count value of the big hit lottery counter Ct1 when detected by the seed start port switch 27a coincides with the timing at which the big hit lottery counter Ct1 counts the big hit value “7”. It is possible to eliminate the possibility of generating a big hit.
When the RAM clear switch 10 is not turned on (D14: No), the main CPU 112 determines whether the check data stored in the RAM 116 is correct data, for example, A5A5H. (D32). If it is A5A5H (D32: Yes), control of the game is started (D30).
Further, the main CPU 112 executes the same processing as the first type start port processing (FIG. 7) and special symbol control (FIG. 8) described in the first embodiment.
The RAM clear process 4 is executed according to a computer program recorded in the ROM 114.
[0068]
[Effect of Fourth Embodiment]
As described above, if the pachinko machine 1 according to the fourth embodiment is used, the RAM clear process is executed when the RAM clear switch 10 is pressed twice within 5 seconds after the RAM clear switch 10 is first pressed. If it is not pressed twice, the RAM clear process can be prevented from being executed.
Therefore, by instructing the RAM clear, there is no possibility that the initial value of the count start of the big hit lottery counter Ct1 is returned to “0” and the big hit is generated illegally.
[0069]
<Other embodiments>
(1) A18 (FIG. 6) of the RAM clear process of the first embodiment, or “4” of the RAM clear count N as a determination criterion in C20 (FIG. 10) of the RAM clear process 3 of the third embodiment is It may be set to 2 or 3, or may be set to 4 or more.
(2) B16 (FIG. 9) of the RAM clear process 2 of the second embodiment or C16 (FIG. 10) of the RAM clear process 3 of the third embodiment is the time T1 to T2 serving as a determination criterion at 9:00 am It can also be set to a range other than ~ 9: 30 am. For example, when the closing time is 10:30 pm, it can be set from 10:30 pm to 11:00 pm, or from 10:30 pm to 9:30 am on the next day.
[0070]
(3) The timer that is started in D20 of the RAM clear process 4 (FIG. 11) of the fourth embodiment can be set to a timer that times up in a time other than 5 seconds. You can also change the time. Further, “3” of the RAM clear instruction count N which is a determination criterion in D26 may be set to 2 or may be set to 4 or more. Furthermore, a setting may be used in which the interval at which the RAM clear switch 10 is turned on is changed. For example, the RAM clear process can be set to be executed when the RAM clear switch 10 is ON → OFF → OFF in a pattern of 2 seconds or longer → ON.
(4) This invention can also be applied to the second and third type pachinko machines. Further, the present invention can also be applied to a pachinko machine configured by combining any two or more of the first to third type pachinko machines. Furthermore, the present invention can be applied to a gaming machine having a function of drawing a lottery or a loss, such as a slot machine, a sparrow ball, an arrangement ball, and other gaming machines installed in a game hall.
[0071]
[Correspondence between each claim and embodiment]
  The big win lottery counter Ct1 corresponds to the counter according to claim 1, and the first type starting port 27 or the ordinary electric accessory 47 with both wings open corresponds to a predetermined region. The first type start port switch 27a corresponds to the detection means, and the RAM 116 and RAM 216 correspond to the game state storage means.RespondThe
  And A14 and A16 (FIG. 6) of 1st Embodiment which main CPU112 performs function as a frequency | count counting means of Claim 1.TheA18 functions as a function stop means.TheFurthermore, A20 is erasedprocessingA64 (Fig. 8) draws lotsprocessingFunction as.
[0072]
  Further, C14 to C18 (FIG. 10) of the third embodiment executed by the main CPU 112 function as the number counting means according to claim 2.
  Furthermore, B14 and B16 of the second embodiment executed by the main CPU 112 function as function stop means according to claim 3.The
[Brief description of the drawings]
FIG. 1 is an explanatory perspective view showing an appearance of a pachinko machine according to an embodiment of the present invention.
FIG. 2 is a front explanatory view showing a main configuration of a game board 5 provided in the pachinko machine 1 shown in FIG. 1;
FIG. 3 is an explanatory diagram showing in block form the electrical configuration of the pachinko machine 1;
4 is an explanatory diagram showing a configuration around a power supply substrate 80. FIG.
FIG. 5 is an explanatory diagram of a jackpot lottery counter.
FIG. 6 is a flowchart showing a flow of RAM clear processing executed by the main CPU 112;
FIG. 7 is a flowchart showing a flow of a first type start port process executed by the main CPU 112;
FIG. 8 is a flowchart showing a flow of special symbol control executed by the main CPU 112;
FIG. 9 is a flowchart showing a flow of RAM clear processing 2 executed by the main CPU 112 in the second embodiment.
FIG. 10 is a flowchart showing a flow of RAM clear processing 3 executed by the main CPU 112 in the third embodiment.
FIG. 11 is a flowchart showing a flow of RAM clear processing 4 executed by the main CPU 112 in the fourth embodiment.
FIG. 12 is a front explanatory view showing a main configuration of a conventional pachinko machine.
FIG. 13A is an explanatory diagram showing an arrangement relationship between the first type start port and the first type start port switch provided in the pachinko machine shown in FIG. 12, and FIG. FIG. 13 is an explanatory diagram showing a part of the electrical configuration of the pachinko machine shown in FIG. 12 in blocks.
FIG. 14 is an explanatory diagram illustrating an example of a circuit in which an illegal act has been performed.
[Explanation of symbols]
    1 Pachinko machine (game machine)
  10 RAM clear switchH
  27 Type 1 start opening (predetermined area)
  27a First type start port switch (detection means)
  32a symbol display
  112 Main CPU
  114 ROM
  116 RAM (game state storage means)
  216 RAM (game state storage means)
  Ct1 jackpot lottery counter (counter)

Claims (3)

A counter that adds +1 in a predetermined cycle from the initial value, and when the count value exceeds the upper limit value, a counter that returns to 0 ;
A predetermined area through which game balls launched on the game board can pass ;
Is provided at a predetermined distance away portion from said predetermined area a flow-down direction of the game ball passing through the predetermined area, and detecting means for detecting a game ball which has passed through the predetermined region,
Gaming state storage means for storing a gaming state when the power supplied to the gaming machine is cut off;
Wherein with game balls passing through the area before Kisho constant by the detection means obtains the count value of the counter when it is detected, the lottery process of lottery or jackpot or loss based on the count value thereof acquired, A main CPU for resetting the initial value of the counter to 0 and executing an erasing process for erasing the gaming state stored in the gaming state storage means;
A RAM clear switch that, when turned on, transmits a RAM clear signal to the main CPU for causing the main CPU to execute the erasure process ;
A gaming machine capable of resuming a game based on a gaming state stored in the gaming state storage means when the supply of power is resumed;
Count counting means for counting the number of times the main CPU has received the RAM clear signal ;
A gaming machine comprising a function stop means for stopping the function of the main CPU for executing the erasure process when the number of times counted by the number counting means exceeds a predetermined number. The gaming machine according to claim 1, wherein the number counting means counts the number of times the main CPU receives the RAM clear signal between a first time and a second time . A counter that adds +1 in a predetermined cycle from the initial value, and when the count value exceeds the upper limit value, a counter that returns to 0 ;
A predetermined area through which game balls launched on the game board can pass ;
Is provided at a predetermined distance away portion from said predetermined area a flow-down direction of the game ball passing through the predetermined area, and detecting means for detecting a game ball which has passed through the predetermined region,
Gaming state storage means for storing a gaming state when the power supplied to the gaming machine is cut off;
Wherein with game balls passing through the area before Kisho constant by the detection means obtains the count value of the counter when it is detected, the lottery process of lottery or jackpot or loss based on the count value thereof acquired, A main CPU for resetting the initial value of the counter to 0 and executing an erasing process for erasing the gaming state stored in the gaming state storage means;
A RAM clear switch that, when turned on, transmits a RAM clear signal to the main CPU for causing the main CPU to execute the erasure process ;
A gaming machine capable of resuming a game based on a gaming state stored in the gaming state storage means when the supply of power is resumed;
When the main CPU receives the RAM clear signal at a time other than between the first time and the second time , the main CPU includes a function stop unit that stops the function of the main CPU to execute the erasure process. A gaming machine characterized by that.

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