JP3741553B2 - Semiconductor device connection structure and connection method, and semiconductor device package using the same - Google Patents

Semiconductor device connection structure and connection method, and semiconductor device package using the same Download PDF

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JP3741553B2
JP3741553B2 JP33117398A JP33117398A JP3741553B2 JP 3741553 B2 JP3741553 B2 JP 3741553B2 JP 33117398 A JP33117398 A JP 33117398A JP 33117398 A JP33117398 A JP 33117398A JP 3741553 B2 JP3741553 B2 JP 3741553B2
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semiconductor device
circuit board
electrode
resin member
liquid crystal
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JP2000156386A (en
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和雄 玉置
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Sharp Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置の接続構造および接続方法ならびにそれを用いた半導体装置パッケージに関するものであり、半導体装置等の電子部品を回路基板上に実装する接続構造およびそれを用いた半導体装置パッケージならびにその製造方法に関するものである。
【０００２】
【従来の技術】
従来、半導体装置を回路基板上にベアチップの状態で直接実装するフリップチップ接続は、半導体装置の電極に形成された突起電極と対応する回路基板の電極とを位置合せし、加圧、加熱により電気的な接続を行ない、その後、半導体装置と回路基板との隙間に熱硬化性の液体樹脂等を注入し、樹脂硬化を行なうことで封止し、半導体装置と回路基板との電気的、機械的接続をより強固にしていた。
【０００３】
図６は、特公平４−５１０５７号公報に示される従来の半導体装置の接続方法の一例を示す断面図である。
【０００４】
図６を参照して、フリップチップ接続を工程順に説明すると、まず、図６（ａ）に示すように、半導体装置１の電極２上に、ワイヤバンピング法あるいはめっき法によって突起電極５を形成する。必要に応じて、該突起電極５の高さを整えるためにレベリングを行なうこともできる。
【０００５】
次に、図６（ｂ）に示すように、半導体装置１の電極２上の突起電極５と、回路基板３上の接続パッド４との位置合せを行ない、半導体装置１の電極２上の突起電極５と回路基板３上の接続パッド４とを当接せしめ、加圧、加熱することによって電気的な接続を行なう。
【０００６】
最後に、図６（ｃ）に示すように、半導体装置１と回路基板３との隙間にディスペンサ５０等を用いて液状の熱硬化性の封止樹脂５６を注入した後、加熱硬化させて封止を完了する。
【０００７】
このように、従来の半導体装置の接続方法においては、半導体装置を回路基板に電気的に接続した後に、液状熱硬化性の封止樹脂をディスペンサ等を用いて半導体装置の周辺部に滴下し、回路基板との隙間に充填し、オーブン等で熱硬化していた。
【０００８】
一方、テープキャリアタイプの半導体装置の製造に関しては、特開平５−１１４６１８号公報に開示されている技術があった。図７は、このような従来の半導体装置の接続方法の他の例を示す断面図である。
【０００９】
図７を参照して、この方法は、複数のフィンガーリード６０を有するキャリアテープ７０の所定の位置に、半導体装置１を配設する工程と、半導体装置１の電極５とフィンガーリード６０との接続部全体の上に半導体装置１の能動面と同じ大きさかまたはわずかに大きめの高分子液晶からなるフィルム６６を載せ、加熱溶融させて封止する工程とを有するものである。
【００１０】
【発明が解決しようとする課題】
しかしながら、上述した図６に示す特公平４−５１０５７号公報に開示された方法においては、以下のような問題があった。すなわち、ディスペンサ５０による樹脂の吐出量にはばらつきがあり、かつ樹脂の滴下領域が必要である。また、ＬＳＩの高密度化、多ピン化が進み、必然的に微細ピッチ化が進むと、当然チップと基板との間隙は狭くなる。たとえば、半導体装置１と接続パッド４の表面との間隙が２５〜３０μｍ、半導体装置１と基板３との間隙が５０μｍ程度のものが検討されている。したがって、このような狭い間隙に封止樹脂５６を充填するためには、当然封止樹脂５６の粘度を低くしなければならない。しかしながら、樹脂の粘度が低いと、半導体装置１の周辺部に大きなフィレット（樹脂の流れ出し）５６ａが形成されてしまう。
【００１１】
また、たとえば熱硬化性樹脂として一般的なエポキシ樹脂やポリイミド樹脂を使用した場合、耐加水分解性や耐吸水性に問題があり、信頼性低下の原因となっていた。
【００１２】
また、上述した図７に示す特開平５−１１４６１８号公報に開示された方法においては、次のような問題点があった。すなわち、テープキャリアタイプの半導体装置１を高分子液晶からなるフィルム６６によって封止する前に、半導体装置１の電極５と、キャリアテープ７０の上面に形成された銅箔等からなるフィンガーリード６０とを熱圧着等の方法により接続しなければならない。したがって、電極５の融点が高分子液晶からなるフィルム６６の融点よりも低いかあるいは同程度の場合には、封止工程における加熱動作によって電極の接続が切断、剥離してしまうので、半田等の融点の比較的低い材料を電極に用いることができなかった。
【００１３】
また、封止工程においては加熱のみしか行なっていないため、複数のフィンガーリード６０間の空隙にまで溶融状態の高分子液晶６６が行き渡らず、したがって、接着強度が不十分となるという問題があった。さらに、フィンガーリード６０間の空隙間の空気および水分が原因となって、半導体装置１の性能劣化を引き起こすという問題もあった。
【００１４】
本発明の目的は、上述した問題点を解決し、高い信頼性を有する半導体装置の接続構造および接続方法ならびにそれを用いた半導体装置パッケージを提供することにある。
【００１５】
【課題を解決するための手段】
請求項１の発明による半導体装置の接続構造は、半導体装置の電極と、回路基板の電極に対応する接続パッドとを、導電性の突起電極を介して接続することにより、半導体装置を回路基板上に実装するフリップチップ接続構造において、半導体装置と回路基板との間隙に、熱可塑性を有する高分子液晶材料を含有した樹脂部材を備え、半導体装置の表面にポリイミドからなる樹脂部材が貼付され、ポリイミドからなる樹脂部材の表層部がプラズマ放電処理されていることを特徴としている。
【００１７】
請求項２の発明による半導体装置パッケージは、請求項１の発明の半導体装置の接続構造を備え、回路基板は、接続パッドと電気的に接続された複数の外部入出力端子を含むことを特徴としている。
【００１８】
請求項３の発明による半導体装置パッケージは、請求項２の発明の構成において、回路基板の半導体装置搭載面が、熱硬化性樹脂で覆われたことを特徴としている。
【００１９】
請求項４の発明による半導体装置の接続方法は、半導体装置の素子面の複数の電極と、回路基板の複数の電極に対応する複数の接続パッドとを、導電性の突起電極を介して接続することにより、半導体装置を回路基板上に実装するフリップチップ接続方法であって、複数の接続パッドより内側の領域、もしくは半導体装置の素子面の複数の電極より内側の領域に、シート状の熱可塑性を有する高分子液晶材料を含有した樹脂部材を設置する工程と、回路基板上の複数の接続パッド、または半導体装置の素子面の複数の電極に、導電性の突起電極を形成する工程と、半導体装置と回路基板との対向する電極同士を位置合せし、当接する工程と、加圧と加熱とを併用して、高分子液晶材料を含有した樹脂部材により、半導体装置と回路基板との電気的、機械的接続ならびに封止を同時に行なう工程とを含むことを特徴としている。
【００２０】
請求項５の発明による半導体装置の接続方法は、請求項４の発明の構成において、シート状の高分子液晶材料を含有した樹脂部材の厚さは、フリップチップ実装後の半導体装置の電極形成面と回路基板の表面とのギャップよりも厚くなるように形成されていることを特徴としている。
【００２１】
【発明の実施の形態】
（参考例１）
図１は、本発明に関連する参考例１に係る半導体装置の接続構造の一例を示す断面図である。
【００２２】
図１を参照して、半導体装置１の電極２の最表層には、Ａｌが形成されている。また、該電極２には、Ａｕワイヤを用いたワイヤバンピング法によって、Ａｕからなる突起電極５が形成されている。一般に、電極２を除く半導体装置１の最表面には、絶縁保護膜として、ＳｉＮ等が形成されている。
【００２３】
一方、回路基板３としては、ＰＰＯ（ポリフェニリンオキサイド）基板が使用され、該基板３の接続パッド４の最表層には、Ａｕが形成されている。
【００２４】
したがって、突起電極５と接続パッド４とは、Ａｕ−Ａｕ固相拡散接合により、電気的な接続が行なわれている。
【００２５】
また、半導体装置１と回路基板３との間隙には、高分子液晶材料からなる樹脂部材６が充填されている。該高分子液晶材料からなる樹脂部材６は、フィルム状のＶＥＣＴＲＡ（登録商標）（Hoechst Celanese Corporation製）である。
【００２６】
なお、本参考例１では、回路基板３をＰＰＯ基板としたが、これに限られるわけではなく、他の有機系基板が用いられてもよい。具体的には、たとえば、ガラスエポキシ基板、ポリイミド基板等を用いることができる。また、回路基板３は、硬質であってもよいし、逆にフレキシブル状であってもよい。
【００２７】
また、突起電極５の形成方法は、ワイヤバンピング法に限らず、めっき法等を用いてもよい。さらに、突起電極５の材質もＡｕに限らず、その他の金属または合金でもよい。たとえば、Ｐｂ４０Ｓｎ６０、Ｐｂ７０Ｓｎ３０、Ｓｎ９６．５Ａｇ３．５の半田等を用いることができる。
【００２８】
（実施の形態１）
図２は、本発明の実施の形態１に係る半導体装置の接続構造の一例を示す断面図である。
【００２９】
図２を参照して、半導体装置１の電極２の最表層にはＡｌが形成され、少なくとも電極２を除く半導体装置１の最表層にポリイミド樹脂層７が形成されている。さらに、該ポリイミド樹脂層７は、封止材としての高分子液晶材料からなる樹脂部材６に対する密着性を向上する目的で、その表面にはプラズマ処理がなされている。
【００３０】
一方、回路基板３としては、ポリイミドベース銅張積層板が使用され、該基板３の接続パッド４の最表層には、Ａｕが形成されている。また、該接続パッド４には、Ａｕ合金ワイヤを用いたワイヤバンピング法によって、Ａｕ合金からなる突起電極５が形成されている。
【００３１】
したがって、回路基板３の突起電極５と半導体装置１の電極２とは、Ａｕ−Ａｌ固相拡散接合により、電気的な接続が行なわれている。
【００３２】
また、半導体装置１と回路基板３との間隙には、高分子液晶材料からなる樹脂部材６が充填されている。高分子液晶材料からなる樹脂部材６は、前述した参考例１で用いたものと同じである。
【００３３】
なお、本実施の形態では、回路基板３として、ポリイミドベース銅張積層板を用いたが、これに限られるわけではなく、他の有機系基板や無機系基板が用いられてもよい。
【００３４】
また、突起電極形成方法は、ワイヤバンピング法に限らず、めっき法等を用いてもよい。さらに、突起電極５の材質も、Ａｕ合金に限らず、その他の金属または合金でもよい。また、突起電極５の形成は、半導体装置１の電極２側へ形成してもよい。さらに、電極２と接続パッド４のメタル構造も、図２に示すものに限定されるものではない。
【００３５】
（実施の形態２）
図３は、本発明の実施の形態２に係る半導体装置パッケージの一例を示す断面図である。
【００３６】
図３を参照して、半導体装置１の電極２の最表層にはＡｌが形成され、電極２を除く半導体装置の最表層には、ポリイミド樹脂層７が形成されている。なお、図３の場合においても、図２の場合と同様に、ポリイミド樹脂層７の表面がプラズマ処理され得ることは言うまでもない。
【００３７】
一方、回路基板１３としては、ポリイミドベース銅張積層板が使用され、該基板１３の接続パッド４の最表層には、Ａｕが形成されている。また、該接続パッド４には、Ａｕ合金ワイヤを用いたワイヤバンピング法によって、Ａｕ合金からなる突起電極５が形成されている。
【００３８】
したがって、実施の形態１と同様に、突起電極５と電極２とは、Ａｕ−Ａｌ固相拡散接合により、電気的な接続が行なわれている。
【００３９】
また、半導体装置１と回路基板１３との間隙には、高分子液晶材料からなる樹脂部材６が充填されている。高分子液晶材料からなる樹脂部材６は、前述した参考例１や実施の形態１で用いたものと同様である。
【００４０】
また、回路基板１３は、マトリクス状に配置された接続用の開口部１０を有し、該開口部１０を介して接続パッド４に接続された半田ボール８を外部入出力端子とし、半導体装置１をパッケージ化している。
【００４１】
また、外部の衝撃から保護するため、半導体装置１搭載面は、熱硬化性のエポキシ樹脂等のモールド樹脂９で金型成形されている。この他、半導体装置１搭載面を、熱硬化性の液状樹脂をポッティングして硬化してもよい。
【００４２】
なお、前述した実施の形態１、２と同様、回路基板の基材、突起電極形成方法、突起電極の材質、電極および接続パッドのメタル構造、ならびにモールド樹脂の種類等は、ここに示すものに限定されるものではない。
【００４３】
（実施の形態３）
図４は、本発明の実施の形態３に係る半導体装置の接続方法の一例を示す断面図である。
【００４４】
▲１▼ ステップ１
まず、図４（ａ）に示すように、電極２の部分を除く素子面の最表層に厚さが４μｍのポリイミド樹脂層７が形成された半導体装置１の表面に、矢印２０に示すようにＡｒガス中でプラズマ放電処理を行なう。装置としては、九州松下電器（株）製のＰＣ２０Ｆ−Ｇを使用し、純度９９．９９％以上のＡｒを流量５０ｃｃ／分で流しながら、出力７５０Ｗ、周波数１３．５６ＭＨｚ、放電時間３０秒の条件で放電処理を行なう。なお、電極２の最表面には、Ａｌ−１％Ｓｉが形成されている。
【００４５】
このように、半導体装置１に形成されたポリイミド樹脂層７にプラズマ放電処理を施すほか、たとえば、プラズマ放電処理を施したポリイミド樹脂層７を半導体装置１の表面に、接着、貼付する方法をとることもできる。
【００４６】
なお、ポリイミド樹脂層７の厚みは、ここに示すものに限定されるものではない。また、耐熱性、耐候性、電気的特性向上等の目的のために、他の樹脂とブレンドしたポリイミド樹脂あるいは添加剤を含有したポリイミド樹脂等を使用してもよい。同様に、プラズマ放電処理に用いるガスの種類や放電条件も、前述したものに限定されるわけではない。
【００４７】
▲２▼ ステップ２
次に、図４（ｂ）に示すように、回路基板３の複数の接続パッド４より内側の領域に、厚さが３０〜５０μｍ程度のフィルム状の熱可塑性を有する高分子液晶材料からなる樹脂部材６を設置する。該高分子液晶材料からなる樹脂部材６は、フィルム状のＶＥＣＴＲＡ（登録商標）（Hoechst Celanese Corporation製）である。高分子液晶材料からなる樹脂部材６の設置方法は、熱による仮圧着でもよいし、単に回路基板３上に載せるだけでもよい。なお、この実施の形態において、回路基板３は、ポリイミドベース銅張積層板であり、接続パッド４の最表層にはＡｕが形成されている。
【００４８】
高分子液晶材料からなる樹脂部材６の厚さは、フリップチップ実装後の半導体装置１の電極形成面と基板３の表面とのギャップｈ1 （図１参照）よりも厚くなるように設定される。この理由を以下に説明する。
【００４９】
半導体装置１上に形成された突起電極５と、基板３の電極４との接続信頼性は、Ａｕ−Ａｕ拡散による接合強度に加え、高分子液晶材料からなる樹脂部材６の密着力による機械的強度に保護されている。そのため、高分子液晶材料からなる樹脂部材６による密着力を高めるほど、両電極間の接続信頼性は向上する。したがって、高分子液晶材料からなる樹脂部材６の厚さがギャップｈ1 よりも厚くなるように設定しておけば、半導体装置１の接続時の荷重印加によって、高分子液晶材料からなる樹脂部材６が半導体装置１の電極形成面全体に押し広げられることになる。そのため、高分子液晶材料からなる樹脂部材６の接着面積が大きくなる結果、接着強度を大きくすることができるからである。
【００５０】
本実施の形態では半導体装置１の外形が７×５ｍｍであり、その電極２が外周部より１００〜２００μｍ内側に形成されている。ｈ1 ＝３０μｍに対し、厚さが４０μｍの高分子液晶材料からなる６．５×４ｍｍの樹脂部材６を使用する。
【００５１】
▲３▼ ステップ３
次に、図４（ｃ）に示すように、回路基板３の接続パッド４に、φ８０μｍのＡｕ合金からなる突起電極５を形成する。該突起電極５は、φ２０μｍのＡｕ合金ワイヤ（田中電子工業（株）製のＧＢＣ−Ｔｙｐｅ）を用いたワイヤバンピング法によって形成する。該突起電極５は、Ａｕとほぼ変わらない融点を有するＡｕ合金からなっている。前述した高分子液晶材料からなる樹脂部材６の融点は２８０℃であるので、突起電極の融点の方が高い。
【００５２】
なお、突起電極形成方法は、ワイヤバンピング法に限らず、めっき法等を用いることもできる。
【００５３】
▲４▼ ステップ４
次に、図４（ｄ）に示すように、半導体装置１と回路基板３との対向する電極２と突起電極５とを位置合せし、当接する。
【００５４】
▲５▼ ステップ５
次に、図４（ｅ）に示すように、加熱および加圧ツール３０で、突起電極のＡｕ合金と、電極２の最表面のＡｌ−１％ＳｉをＡｕ−Ａｌ固相拡散接合する。
【００５５】
詳細に説明すると、加熱および加圧ツール３０を一定温度、たとえば４４０℃となるように制御し、２ｋｇｆ／ｃｍ2 の圧力を加える。これにより、Ａｕ−Ａｌ固相拡散接合が行なわれると同時に、封止材としての高分子液晶材料からなる樹脂部材６が軟化し、その後の冷却によって高分子液晶材料からなる樹脂部材６が固化することにより、封止が完了する。
【００５６】
この際、ステージ４０を設定温度３２０℃に加熱しておくことにより、封止樹脂としての高分子液晶材料からなる樹脂部材６および電極５に対して所定温度まで素早く熱を伝達することができる。その結果、短時間で高分子液晶材料からなる樹脂部材６を溶融させるとともに、Ａｕ−Ａｌ固相拡散接合を促進させることができる。また、加圧動作により、溶融した高分子液晶材料からなる樹脂部材６が広がるため、電極２と突起電極５との接合部を含む半導体装置１と回路基板３との間隙を封止することが可能となる。
【００５７】
従来のテープキャリアタイプの半導体装置の場合には、電極接続工程と封止工程とが別々に行なわれるので、半田材として利用可能なのは、高分子液晶材料からなる樹脂部材６の融点よりも十分高いものだけであった。したがって、たとえば、高分子液晶材料からなる樹脂部材６の融点が２８０℃のとき、電極の材質として融点が２６０℃の半田（Ｐｂ７０Ｓｎ３０）を用いることはできなかった。
【００５８】
しかしながら、本発明においては、ステップ５に示したように、電極接続工程と封止工程とを同時に行なうことを特徴としているので、たとえば、ステップ５でのステージ加熱温度を半田の融点以下に設定しておけば、高分子液晶材料からなる樹脂部材６の融点が２８０℃のとき、電極の材質として融点が２６０℃の半田（Ｐｂ７０Ｓｎ３０）を用いることは可能である。これにより、電極材料の選択に制限が生じない。
【００５９】
（参考例２）
図５は、本発明に関連する参考例２に係る半導体装置パッケージの一例を示す断面図であり、積層型（スタックド）の半導体装置への適用例を示している。
【００６０】
図５を参照して、この半導体装置パッケージにおいては、回路基板１３上に、第１のチップ１と第２のチップ８１とが搭載されている。この第１のチップ１と第２のチップ８１とは、その裏面同士が接着剤８５により接着されている。
【００６１】
第１のチップ１の周辺部には、複数の第１の電極２が形成されている。第２のチップ８１の周辺部には、複数の第２の電極８２が形成されている。
【００６２】
第１のチップ１に形成された電極２と、回路基板１３の表面上の第１の接続パッド４とは、金属部材５を介してフリップチップ方式により接続されている。第２のチップ８１上に形成された電極８２と、回路基板１３の表面上の第１の接続パッド４より外周に形成された第２の接続パッド８７とは、金属ワイヤ８８を介してワイヤボンディング方式により接続されている。第１および第２のチップ１、８１は、さらにその全体が覆われるように、第２の樹脂９によりモールドされている。
【００６３】
また、回路基板１３の裏面には、第３の接続パッド８０がマトリクス状に形成され、第３の接続パッド８０上には、半田ボール８が形成されている。さらに、第１の接続パッド４に囲まれる領域の基板１３には、少なくとも１つの貫通孔８４が形成されている。この貫通孔８４は、第１の樹脂６が吸湿後のリフローにより膨張することを防止する働きがある。
【００６４】
また、この半導体装置パッケージにおいて、第１のチップ１の電極２の最表層にはＡｌが形成されている。一方、回路基板１３としては、ポリイミドベース銅張積層板が使用され、該基板１３の第１の接続パッド４の最表層には、Ａｕが形成されている。また、第１の接続パッド４には、Ａｕ合金ワイヤを用いたワイヤバンピング法によって、Ａｕ合金からなる突起電極５が形成されている。
【００６５】
したがって、実施の形態１と同様に、突起電極５と電極２とは、Ａｕ−Ａｌ固相拡散接合により、電気的な接続が行なわれている。
【００６６】
また、第１のチップ１と回路基板１３との間隙には、高分子液晶材料からなる第１の樹脂部材６が充填されている。高分子液晶材料からなる第１の樹脂部材６は、前述した参考例１や実施の形態１で用いたものと同様である。さらに、前述した参考例１や実施の形態１と同様、回路基板の基材、突起電極形成方法、突起電極の材質、電極および接続パッドのメタル構造、ならびにモールド樹脂の種類等は、ここに示すものに限定されるものではない。
【００６７】
【実施例】
（信頼性試験結果）
上述した実施の形態３の方法に従い、実施例の半導体装置パッケージを作製した。
【００６８】
一方、比較のため、フリップチップ接続を行なった半導体装置に対し、封止材としてのエポキシ樹脂をディスペンサにより充填して、比較例の半導体装置パッケージを作製した。
【００６９】
このようにして得られた実施例と比較例の半導体装置パッケージについて、ＰＣＴ（Pressure Cooker Test）における電極の導通状態を試験した。実験条件としては、温度を１２１℃、圧力を２ａｔｍ、湿度を飽和とした。
【００７０】
得られた結果を表１に示す。
【００７１】
【表１】

Figure 0003741553
【００７２】
表１より明らかなように、比較例の半導体装置パッケージでは、３００時間経過後において全サンプル数６個中２個が不良となった。これに対し、実施例の半導体装置パッケージは、８００時間経過後も、導通状態に変化は見られなかった。
【００７３】
【発明の効果】
請求項１の発明によれば、半導体装置と高分子液晶材料またはそのブレンド樹脂部材との密着力を向上させることができる。
【００７５】
請求項２および３の発明によれば、より高い信頼性に対する要求に応じることができる。
【００７６】
請求項４の発明によれば、封止樹脂をシート状としているので、従来のようにポッティング領域を確保する必要がない。また、狭い間隙に封止樹脂を充填する必要がないので、樹脂の粘度を低くしたことが原因で従来発生していた半導体装置周辺部の大きなフィレット（樹脂の流れ出し）の形成を防止することができる。これらはいずれも、半導体装置の設置面積を減少させるという効果を有する。
【００７７】
また、この発明によれば、ディスペンサによる樹脂の吐出と比較して、樹脂量はシートのサイズおよび厚さにより容易に管理できる。そのため、樹脂量のばらつきを少なくすることができる。
【００７８】
さらに、この発明によれば、封止、接続工程において、加熱とともに加圧動作を行なうので、溶融した高分子液晶材料からなる樹脂部材が半導体装置あるいは回路基板上に形成された電極間の隙間に入りやすくなる。その結果、高分子液晶材料からなる樹脂部材の封止材としての機能（接着力）を一層高めることができる。
【００７９】
請求項５の発明によれば、高分子液晶材料からなる樹脂部材が半導体装置の電極形成面全体に押し広げられることにより、安定した接続を得られる。
【図面の簡単な説明】
【図１】 本発明に関連する参考例１の半導体装置の接続構造を示す断面図である。
【図２】 本発明の実施の形態１の半導体装置の接続構造を示す断面図である。
【図３】 本発明の実施の形態２の半導体装置パッケージを示す断面図である。
【図４】 本発明の実施の形態３の半導体装置の接続方法を示す断面図である。
【図５】 本発明に関連する参考例２の半導体装置パッケージを示す断面図である。
【図６】 従来の半導体装置の接続方法の一例を示す断面図である。
【図７】 従来の半導体装置の接続方法の他の例を示す断面図である。
【符号の説明】
１ 半導体装置
２ 半導体装置の電極
３、１３ 回路基板
４ 接続パッド
５ 突起電極
６ 高分子液晶材料からなる樹脂部材
７ ポリイミド樹脂層
８ 半田ボール
９ モールド樹脂
１０ 開口部
なお、各図中、同一符号は同一または相当部分を示す。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a connection structure and a connection method for a semiconductor device, and a semiconductor device package using the connection method, and a connection structure for mounting an electronic component such as a semiconductor device on a circuit board, a semiconductor device package using the connection structure, and the semiconductor device package It relates to a manufacturing method.
[0002]
[Prior art]
Conventionally, flip chip connection, in which a semiconductor device is directly mounted on a circuit board in a bare chip state, aligns the protruding electrode formed on the electrode of the semiconductor device with the corresponding circuit board electrode, and applies electricity by pressing and heating. After that, a thermosetting liquid resin or the like is injected into the gap between the semiconductor device and the circuit board, and the resin is cured to seal, so that the electrical and mechanical connection between the semiconductor device and the circuit board is achieved. The connection was made stronger.
[0003]
FIG. 6 is a cross-sectional view showing an example of a conventional method for connecting a semiconductor device disclosed in Japanese Patent Publication No. 4-51057.
[0004]
The flip-chip connection will be described in the order of steps with reference to FIG. 6. First, as shown in FIG. 6A, the protruding electrode 5 is formed on the electrode 2 of the semiconductor device 1 by the wire bumping method or the plating method. . If necessary, leveling can be performed to adjust the height of the protruding electrode 5.
[0005]
Next, as shown in FIG. 6B, the protrusion electrode 5 on the electrode 2 of the semiconductor device 1 is aligned with the connection pad 4 on the circuit board 3, so that the protrusion on the electrode 2 of the semiconductor device 1. The electrodes 5 and the connection pads 4 on the circuit board 3 are brought into contact with each other, and are electrically connected by pressurization and heating.
[0006]
Finally, as shown in FIG. 6C, a liquid thermosetting sealing resin 56 is injected into the gap between the semiconductor device 1 and the circuit board 3 by using a dispenser 50 or the like, and then heated and cured to be sealed. Complete the stop.
[0007]
Thus, in the conventional method for connecting a semiconductor device, after electrically connecting the semiconductor device to the circuit board, a liquid thermosetting sealing resin is dropped on the periphery of the semiconductor device using a dispenser or the like, The gap between the circuit board and the circuit board was filled and thermally cured in an oven or the like.
[0008]
On the other hand, regarding the manufacture of a tape carrier type semiconductor device, there has been a technique disclosed in Japanese Patent Laid-Open No. 5-114618. FIG. 7 is a cross-sectional view showing another example of such a conventional method for connecting a semiconductor device.
[0009]
Referring to FIG. 7, this method includes a step of disposing semiconductor device 1 at a predetermined position of carrier tape 70 having a plurality of finger leads 60, and connection between electrode 5 of semiconductor device 1 and finger leads 60. A film 66 made of a polymer liquid crystal having the same size as or slightly larger than the active surface of the semiconductor device 1 is placed on the entire portion, and the film 66 is heated and melted for sealing.
[0010]
[Problems to be solved by the invention]
However, the method disclosed in Japanese Patent Publication No. 4-51057 shown in FIG. 6 has the following problems. That is, the amount of resin discharged by the dispenser 50 varies, and a resin dripping region is required. In addition, as the LSI density increases and the number of pins increases, and the fine pitch inevitably increases, the gap between the chip and the substrate naturally becomes narrower. For example, a case in which the gap between the semiconductor device 1 and the surface of the connection pad 4 is about 25 to 30 μm and the gap between the semiconductor device 1 and the substrate 3 is about 50 μm has been studied. Therefore, in order to fill the sealing resin 56 in such a narrow gap, naturally the viscosity of the sealing resin 56 must be lowered. However, when the viscosity of the resin is low, a large fillet (resin flow-out) 56 a is formed around the periphery of the semiconductor device 1.
[0011]
For example, when a general epoxy resin or polyimide resin is used as the thermosetting resin, there is a problem in hydrolysis resistance and water absorption resistance, which causes a decrease in reliability.
[0012]
Further, the method disclosed in Japanese Patent Laid-Open No. 5-114618 shown in FIG. 7 has the following problems. That is, before sealing the tape carrier type semiconductor device 1 with the film 66 made of polymer liquid crystal, the electrode 5 of the semiconductor device 1 and the finger leads 60 made of copper foil or the like formed on the upper surface of the carrier tape 70 Must be connected by a method such as thermocompression bonding. Therefore, when the melting point of the electrode 5 is lower than or equal to the melting point of the film 66 made of polymer liquid crystal, the connection of the electrode is cut and peeled off by the heating operation in the sealing process. A material having a relatively low melting point could not be used for the electrode.
[0013]
Further, since only heating is performed in the sealing step, the polymer liquid crystal 66 in a molten state does not reach the gaps between the plurality of finger leads 60, and thus there is a problem that the adhesive strength becomes insufficient. . Further, there is a problem that the performance of the semiconductor device 1 is deteriorated due to air and moisture between the gaps between the finger leads 60.
[0014]
An object of the present invention is to solve the above-described problems and provide a highly reliable connection structure and connection method for a semiconductor device and a semiconductor device package using the connection structure.
[0015]
[Means for Solving the Problems]
Connection structure of a semiconductor device according to a first aspect of the present invention, the electrode of the semiconductor device, and a connection pad corresponding to the electrode of the circuit board, by connecting through the conductive protrusion electrodes, a semiconductor device circuit board In the flip-chip connection structure to be mounted on the semiconductor device, a resin member containing a polymer liquid crystal material having thermoplasticity is provided in a gap between the semiconductor device and the circuit board, and a resin member made of polyimide is pasted on the surface of the semiconductor device. A surface layer portion of the resin member made of is subjected to plasma discharge treatment.
[0017]
The semiconductor device package according to the invention of claim 2 is provided with a connection structure of a semiconductor device of the invention of claim 1, the circuit board, as comprising a connection pad electrically connected to a plurality of external input and output terminals was Yes.
[0018]
A semiconductor device package according to a third aspect of the invention is characterized in that, in the configuration of the second aspect of the invention, the semiconductor device mounting surface of the circuit board is covered with a thermosetting resin.
[0019]
According to a fourth aspect of the present invention, there is provided a method for connecting a semiconductor device, wherein a plurality of electrodes on an element surface of a semiconductor device and a plurality of connection pads corresponding to a plurality of electrodes on a circuit board are connected via conductive protruding electrodes. A flip-chip connection method for mounting a semiconductor device on a circuit board, wherein a sheet-like thermoplastic resin is formed in a region inside a plurality of connection pads or a region inside a plurality of electrodes on an element surface of the semiconductor device. A step of installing a resin member containing a polymer liquid crystal material comprising: a step of forming conductive protruding electrodes on a plurality of connection pads on a circuit board or a plurality of electrodes on an element surface of a semiconductor device; and a semiconductor By aligning and abutting the opposing electrodes of the device and the circuit board, and applying pressure and heating together, a resin member containing a polymer liquid crystal material is used to electrically connect the semiconductor device and the circuit board. Specifically, it is characterized by comprising the step of performing mechanical connection and sealing at the same time.
[0020]
According to a fifth aspect of the present invention, there is provided a semiconductor device connecting method according to the fourth aspect of the invention, wherein the thickness of the resin member containing the sheet-like polymer liquid crystal material is determined by the flip-chip mounted semiconductor device electrode formation surface. And the surface of the circuit board is formed so as to be thicker.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
( Reference Example 1 )
FIG. 1 is a cross-sectional view showing an example of a connection structure of a semiconductor device according to Reference Example 1 related to the present invention.
[0022]
Referring to FIG. 1, Al is formed on the outermost surface layer of electrode 2 of semiconductor device 1. Further, the electrode 2 is formed with a protruding electrode 5 made of Au by a wire bumping method using an Au wire. Generally, SiN or the like is formed on the outermost surface of the semiconductor device 1 excluding the electrode 2 as an insulating protective film.
[0023]
On the other hand, a PPO (polyphenyline oxide) substrate is used as the circuit substrate 3, and Au is formed on the outermost layer of the connection pad 4 of the substrate 3.
[0024]
Therefore, the protruding electrode 5 and the connection pad 4 are electrically connected by Au—Au solid phase diffusion bonding.
[0025]
A gap between the semiconductor device 1 and the circuit board 3 is filled with a resin member 6 made of a polymer liquid crystal material. The resin member 6 made of the polymer liquid crystal material is a film-like VECTRA (registered trademark) (manufactured by Hoechst Celanese Corporation).
[0026]
In the first reference example , the circuit board 3 is a PPO substrate. However, the present invention is not limited to this, and another organic substrate may be used. Specifically, for example, a glass epoxy substrate, a polyimide substrate, or the like can be used. Further, the circuit board 3 may be hard, or conversely, may be flexible.
[0027]
Further, the method for forming the protruding electrode 5 is not limited to the wire bumping method, and a plating method or the like may be used. Furthermore, the material of the protruding electrode 5 is not limited to Au, but may be other metals or alloys. For example, Pb40Sn60, Pb70Sn30, Sn96.5Ag3.5 solder or the like can be used.
[0028]
(Embodiment 1 )
FIG. 2 is a cross-sectional view showing an example of the connection structure of the semiconductor device according to the first embodiment of the present invention.
[0029]
Referring to FIG. 2, Al is formed on the outermost layer of electrode 2 of semiconductor device 1, and polyimide resin layer 7 is formed on the outermost layer of semiconductor device 1 except at least electrode 2. Further, the polyimide resin layer 7 is subjected to plasma treatment on the surface for the purpose of improving the adhesion to the resin member 6 made of a polymer liquid crystal material as a sealing material.
[0030]
On the other hand, a polyimide-based copper-clad laminate is used as the circuit board 3, and Au is formed on the outermost layer of the connection pads 4 of the board 3. The connection pad 4 is formed with a protruding electrode 5 made of an Au alloy by a wire bumping method using an Au alloy wire.
[0031]
Therefore, the protruding electrode 5 of the circuit board 3 and the electrode 2 of the semiconductor device 1 are electrically connected by Au—Al solid phase diffusion bonding.
[0032]
A gap between the semiconductor device 1 and the circuit board 3 is filled with a resin member 6 made of a polymer liquid crystal material. The resin member 6 made of a polymer liquid crystal material is the same as that used in Reference Example 1 described above.
[0033]
In the present embodiment, a polyimide-based copper clad laminate is used as the circuit board 3. However, the present invention is not limited to this, and other organic substrates or inorganic substrates may be used.
[0034]
The protruding electrode forming method is not limited to the wire bumping method, and a plating method or the like may be used. Furthermore, the material of the protruding electrode 5 is not limited to the Au alloy, but may be other metals or alloys. The protruding electrode 5 may be formed on the electrode 2 side of the semiconductor device 1. Furthermore, the metal structure of the electrode 2 and the connection pad 4 is not limited to that shown in FIG.
[0035]
(Embodiment 2 )
FIG. 3 is a sectional view showing an example of a semiconductor device package according to Embodiment 2 of the present invention.
[0036]
Referring to FIG. 3, Al is formed on the outermost layer of electrode 2 of semiconductor device 1, and polyimide resin layer 7 is formed on the outermost layer of the semiconductor device excluding electrode 2. In the case of FIG. 3 as well, it goes without saying that the surface of the polyimide resin layer 7 can be plasma-treated, as in the case of FIG.
[0037]
On the other hand, a polyimide-based copper-clad laminate is used as the circuit board 13, and Au is formed on the outermost layer of the connection pads 4 of the board 13. The connection pad 4 is formed with a protruding electrode 5 made of an Au alloy by a wire bumping method using an Au alloy wire.
[0038]
Therefore, as in the first embodiment, the protruding electrode 5 and the electrode 2 are electrically connected by Au—Al solid phase diffusion bonding.
[0039]
A gap between the semiconductor device 1 and the circuit board 13 is filled with a resin member 6 made of a polymer liquid crystal material. Resin member 6 made of a polymer liquid crystal material is the same as that used in Reference Example 1 and Embodiment 1 described above.
[0040]
The circuit board 13 has connection openings 10 arranged in a matrix, and the solder balls 8 connected to the connection pads 4 through the openings 10 serve as external input / output terminals. Is packaged.
[0041]
In order to protect from external impacts, the mounting surface of the semiconductor device 1 is molded with a mold resin 9 such as a thermosetting epoxy resin. In addition, the mounting surface of the semiconductor device 1 may be cured by potting a thermosetting liquid resin.
[0042]
As in the first and second embodiments, the circuit board base material, the protruding electrode forming method, the protruding electrode material, the metal structure of the electrode and the connection pad, and the type of the mold resin are as shown here. It is not limited.
[0043]
(Embodiment 3 )
FIG. 4 is a cross-sectional view showing an example of a semiconductor device connection method according to the third embodiment of the present invention.
[0044]
▲ 1 ▼ Step 1
First, as shown in FIG. 4A, an arrow 20 is formed on the surface of the semiconductor device 1 in which a polyimide resin layer 7 having a thickness of 4 μm is formed on the outermost layer of the element surface excluding the electrode 2 portion. Plasma discharge treatment is performed in Ar gas. PC20F-G made by Kyushu Matsushita Electric Co., Ltd. is used as the device, and Ar with a purity of 99.99% or more is flowed at a flow rate of 50 cc / min, while the output is 750 W, the frequency is 13.56 MHz, and the discharge time is 30 seconds. Discharge treatment is performed at. Note that Al-1% Si is formed on the outermost surface of the electrode 2.
[0045]
In this way, the polyimide resin layer 7 formed on the semiconductor device 1 is subjected to the plasma discharge treatment, and for example, the polyimide resin layer 7 that has been subjected to the plasma discharge treatment is adhered to and adhered to the surface of the semiconductor device 1. You can also.
[0046]
In addition, the thickness of the polyimide resin layer 7 is not limited to what is shown here. In addition, for the purpose of improving heat resistance, weather resistance, electrical characteristics, etc., a polyimide resin blended with another resin or a polyimide resin containing an additive may be used. Similarly, the type of gas used for the plasma discharge treatment and the discharge conditions are not limited to those described above.
[0047]
▲ 2 ▼ Step 2
Next, as shown in FIG. 4B, a resin made of a polymer liquid crystal material having a film-like thermoplasticity with a thickness of about 30 to 50 μm in a region inside the plurality of connection pads 4 of the circuit board 3. The member 6 is installed. The resin member 6 made of the polymer liquid crystal material is a film-like VECTRA (registered trademark) (manufactured by Hoechst Celanese Corporation). The resin member 6 made of a polymer liquid crystal material may be installed by heat temporary bonding or simply placed on the circuit board 3. In this embodiment, the circuit board 3 is a polyimide-based copper-clad laminate, and Au is formed on the outermost layer of the connection pad 4.
[0048]
The thickness of the resin member 6 made of a polymer liquid crystal material is set to be thicker than the gap h 1 (see FIG. 1) between the electrode forming surface of the semiconductor device 1 after flip chip mounting and the surface of the substrate 3. . The reason for this will be described below.
[0049]
The connection reliability between the protruding electrode 5 formed on the semiconductor device 1 and the electrode 4 of the substrate 3 is mechanically based on the adhesion strength of the resin member 6 made of a polymer liquid crystal material in addition to the bonding strength by Au-Au diffusion. Protected by strength. Therefore, the connection reliability between both electrodes improves, so that the contact | adhesion power by the resin member 6 which consists of a polymer liquid crystal material is improved. Therefore, if the thickness of the resin member 6 made of the polymer liquid crystal material is set to be thicker than the gap h 1 , the resin member 6 made of the polymer liquid crystal material is applied by applying a load when the semiconductor device 1 is connected. Is spread over the entire electrode forming surface of the semiconductor device 1. Therefore, the adhesion area of the resin member 6 made of the polymer liquid crystal material is increased, and as a result, the adhesive strength can be increased.
[0050]
In the present embodiment, the outer shape of the semiconductor device 1 is 7 × 5 mm, and the electrode 2 is formed 100 to 200 μm inside from the outer periphery. For h 1 = 30 μm, a resin member 6 of 6.5 × 4 mm made of a polymer liquid crystal material having a thickness of 40 μm is used.
[0051]
(3) Step 3
Next, as shown in FIG. 4C, a protruding electrode 5 made of an Au alloy having a diameter of 80 μm is formed on the connection pad 4 of the circuit board 3. The protruding electrode 5 is formed by a wire bumping method using a 20 μm Au alloy wire (GBC-Type manufactured by Tanaka Denshi Kogyo Co., Ltd.). The protruding electrode 5 is made of an Au alloy having a melting point that is almost the same as that of Au. Since the melting point of the resin member 6 made of the above-described polymer liquid crystal material is 280 ° C., the protruding electrode has a higher melting point.
[0052]
The protruding electrode forming method is not limited to the wire bumping method, and a plating method or the like can also be used.
[0053]
▲ 4 ▼ Step 4
Next, as shown in FIG. 4D, the opposed electrode 2 and the protruding electrode 5 of the semiconductor device 1 and the circuit board 3 are aligned and brought into contact with each other.
[0054]
▲ 5 ▼ Step 5
Next, as shown in FIG. 4 (e), Au—Al solid phase diffusion bonding of the Au alloy of the protruding electrode and Al-1% Si on the outermost surface of the electrode 2 is performed with a heating and pressing tool 30.
[0055]
More specifically, the heating and pressing tool 30 is controlled to a constant temperature, for example, 440 ° C., and a pressure of 2 kgf / cm 2 is applied. As a result, Au—Al solid phase diffusion bonding is performed, and at the same time, the resin member 6 made of a polymer liquid crystal material as a sealing material is softened, and the resin member 6 made of a polymer liquid crystal material is solidified by subsequent cooling. This completes the sealing.
[0056]
At this time, by heating the stage 40 to a set temperature of 320 ° C., heat can be quickly transmitted to the resin member 6 and the electrode 5 made of a polymer liquid crystal material as a sealing resin up to a predetermined temperature. As a result, the resin member 6 made of a polymer liquid crystal material can be melted in a short time, and Au—Al solid phase diffusion bonding can be promoted. Further, since the resin member 6 made of a molten polymer liquid crystal material is spread by the pressurizing operation, the gap between the semiconductor device 1 including the joint portion between the electrode 2 and the protruding electrode 5 and the circuit board 3 can be sealed. It becomes possible.
[0057]
In the case of a conventional tape carrier type semiconductor device, since the electrode connecting step and the sealing step are performed separately, the solder member can be used sufficiently higher than the melting point of the resin member 6 made of a polymer liquid crystal material. It was just a thing. Therefore, for example, when the melting point of the resin member 6 made of a polymer liquid crystal material is 280 ° C., solder (Pb70Sn30) having a melting point of 260 ° C. cannot be used as the electrode material.
[0058]
However, the present invention is characterized in that the electrode connection process and the sealing process are performed simultaneously as shown in step 5, and therefore, for example, the stage heating temperature in step 5 is set to be equal to or lower than the melting point of the solder. In this case, when the melting point of the resin member 6 made of the polymer liquid crystal material is 280 ° C., it is possible to use solder (Pb70Sn30) having a melting point of 260 ° C. as the electrode material. Thereby, the selection of the electrode material is not limited.
[0059]
( Reference Example 2 )
FIG. 5 is a cross-sectional view showing an example of a semiconductor device package according to Reference Example 2 related to the present invention , and shows an application example to a stacked type (stacked) semiconductor device.
[0060]
Referring to FIG. 5, in this semiconductor device package, first chip 1 and second chip 81 are mounted on circuit board 13. The back surfaces of the first chip 1 and the second chip 81 are bonded to each other with an adhesive 85.
[0061]
A plurality of first electrodes 2 are formed on the periphery of the first chip 1. A plurality of second electrodes 82 are formed on the periphery of the second chip 81.
[0062]
The electrodes 2 formed on the first chip 1 and the first connection pads 4 on the surface of the circuit board 13 are connected via a metal member 5 by a flip chip method. The electrode 82 formed on the second chip 81 and the second connection pad 87 formed on the outer periphery from the first connection pad 4 on the surface of the circuit board 13 are bonded via a metal wire 88. It is connected by the method. The first and second chips 1 and 81 are molded with the second resin 9 so that the whole is further covered.
[0063]
Further, third connection pads 80 are formed in a matrix on the back surface of the circuit board 13, and solder balls 8 are formed on the third connection pads 80. Furthermore, at least one through hole 84 is formed in the substrate 13 in the region surrounded by the first connection pads 4. The through hole 84 functions to prevent the first resin 6 from expanding due to reflow after moisture absorption.
[0064]
In this semiconductor device package, Al is formed on the outermost layer of the electrode 2 of the first chip 1. On the other hand, a polyimide-based copper-clad laminate is used as the circuit board 13, and Au is formed on the outermost layer of the first connection pads 4 of the board 13. The first connection pad 4 is formed with a protruding electrode 5 made of an Au alloy by a wire bumping method using an Au alloy wire.
[0065]
Therefore, as in the first embodiment, the protruding electrode 5 and the electrode 2 are electrically connected by Au—Al solid phase diffusion bonding.
[0066]
A gap between the first chip 1 and the circuit board 13 is filled with a first resin member 6 made of a polymer liquid crystal material. The first resin member 6 made of a polymer liquid crystal material is the same as that used in Reference Example 1 and Embodiment 1 described above. Further, similar to Embodiment 1 of Reference Example 1 and embodiment described above, the substrate of the circuit board, protruding electrode forming method, a material of the bump electrode, the metal structure of the electrode and the connection pads, as well as the kind of the mold resin is shown here It is not limited to things.
[0067]
【Example】
(Reliability test results)
According to the method of the third embodiment described above, the semiconductor device package of the example was manufactured.
[0068]
On the other hand, for comparison, a semiconductor device package of a comparative example was manufactured by filling a flip-chip connected semiconductor device with an epoxy resin as a sealing material using a dispenser.
[0069]
Thus, about the semiconductor device package of the Example and comparative example which were obtained, the conductive state of the electrode in PCT (Pressure Cooker Test) was tested. As experimental conditions, the temperature was 121 ° C., the pressure was 2 atm, and the humidity was saturated.
[0070]
The obtained results are shown in Table 1.
[0071]
[Table 1]
Figure 0003741553
[0072]
As can be seen from Table 1, in the semiconductor device package of the comparative example, 2 out of 6 samples were defective after 300 hours. In contrast, in the semiconductor device package of the example, no change was observed in the conductive state even after 800 hours had elapsed.
[0073]
【The invention's effect】
According to the first aspect of the present invention, it is possible to improve the adhesion between the semiconductor device and the polymer liquid crystal material or the blend resin member thereof .
[0075]
According to invention of Claim 2 and 3 , it can respond to the request | requirement with higher reliability.
[0076]
According to invention of Claim 4 , since sealing resin is made into the sheet form, it is not necessary to ensure a potting area | region conventionally. In addition, since it is not necessary to fill the narrow gap with sealing resin, it is possible to prevent the formation of large fillets (resin flow-out) around the semiconductor device, which has conventionally occurred due to the low viscosity of the resin. it can. All of these have the effect of reducing the installation area of the semiconductor device.
[0077]
Further, according to the present invention, the amount of resin can be easily managed by the size and thickness of the sheet as compared with the discharge of the resin by the dispenser. Therefore, variation in the amount of resin can be reduced.
[0078]
Furthermore, according to the present invention, in the sealing and connecting process, a pressing operation is performed together with heating, so that a resin member made of a molten polymer liquid crystal material is placed in a gap between electrodes formed on a semiconductor device or a circuit board. Easy to enter. As a result, the function (adhesive force) as a sealing material of the resin member made of the polymer liquid crystal material can be further enhanced.
[0079]
According to the invention of claim 5 , a stable connection can be obtained by spreading the resin member made of the polymer liquid crystal material over the entire electrode forming surface of the semiconductor device.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a connection structure of a semiconductor device of Reference Example 1 related to the present invention.
FIG. 2 is a cross-sectional view showing a connection structure of a semiconductor device according to the first embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a semiconductor device package according to a second embodiment of the present invention.
FIG. 4 is a cross-sectional view showing a method for connecting a semiconductor device according to a third embodiment of the present invention.
FIG. 5 is a cross-sectional view showing a semiconductor device package of Reference Example 2 related to the present invention.
FIG. 6 is a cross-sectional view illustrating an example of a conventional method for connecting a semiconductor device.
FIG. 7 is a cross-sectional view showing another example of a conventional method for connecting a semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor device electrode 3, 13 Circuit board 4 Connection pad 5 Projection electrode 6 Resin member made of polymer liquid crystal material 7 Polyimide resin layer 8 Solder ball 9 Mold resin 10 Opening portion Indicates the same or equivalent part.

Claims (5)

半導体装置の電極と、回路基板の前記電極に対応する接続パッドとを、導電性の突起電極を介して接続することにより、前記半導体装置を前記回路基板上に実装するフリップチップ接続構造において、
前記半導体装置と前記回路基板との間隙に、熱可塑性を有する高分子液晶材料を含有した樹脂部材を備え、
前記半導体装置の表面に、ポリイミドからなる樹脂部材が貼付され、
前記ポリイミドからなる樹脂部材の表層部が、プラズマ放電処理されていることを特徴とする、請求項１記載の半導体装置の接続構造。And the electrode of the semiconductor device, and a connection pad corresponding to the electrode of the circuit board, by connecting through the conductive protrusion electrodes, the flip chip connection structure for mounting the semiconductor device on the circuit board,
In the gap between the semiconductor device and the circuit board, a resin member containing a polymer liquid crystal material having thermoplasticity ,
A resin member made of polyimide is attached to the surface of the semiconductor device,
2. The connection structure of a semiconductor device according to claim 1, wherein a surface layer portion of the resin member made of polyimide is subjected to plasma discharge treatment . 請求項１に記載の半導体装置の接続構造を備え、
前記回路基板は、前記接続パッドと電気的に接続された複数の外部入出力端子を含むことを特徴とする、半導体装置パッケージ。The semiconductor device connection structure according to claim 1 ,
The semiconductor device package, wherein the circuit board includes a plurality of external input / output terminals electrically connected to the connection pads. 前記回路基板の前記半導体装置搭載面が熱硬化性樹脂で覆われたことを特徴とする、請求項２記載の半導体装置パッケージ。The semiconductor device package according to claim 2 , wherein the semiconductor device mounting surface of the circuit board is covered with a thermosetting resin. 半導体装置の素子面の複数の電極と、回路基板の前記複数の電極に対応する複数の接続パッドとを、導電性の突起電極を介して接続することにより、前記半導体装置を前記回路基板上に実装するフリップチップ接続方法であって、
前記複数の接続パッドより内側の領域、もしくは前記半導体装置の素子面の複数の電極より内側の領域に、シート状の熱可塑性を有する高分子液晶材料を含有した樹脂部材を設置する工程と、
前記回路基板上の複数の接続パッド、または前記半導体装置の素子面の複数の電極に、導電性の突起電極を形成する工程と、
前記半導体装置と前記回路基板との対向する電極同士を位置合せし、当接する工程と、
加圧と加熱とを併用して、前記高分子液晶材料を含有した樹脂部材により、前記半導体装置と前記回路基板との電気的、機械的接続ならびに封止を同時に行なう工程とを含むことを特徴とする、半導体装置の接続方法。By connecting a plurality of electrodes on the element surface of the semiconductor device and a plurality of connection pads corresponding to the plurality of electrodes of the circuit board via conductive protruding electrodes, the semiconductor device is placed on the circuit board. Flip chip connection method for mounting,
Installing a resin member containing a sheet-like thermoplastic polymer liquid crystal material in a region inside the plurality of connection pads, or in a region inside a plurality of electrodes on the element surface of the semiconductor device;
Forming conductive bump electrodes on a plurality of connection pads on the circuit board or a plurality of electrodes on an element surface of the semiconductor device;
Aligning and contacting the opposing electrodes of the semiconductor device and the circuit board; and
A step of simultaneously performing electrical and mechanical connection and sealing between the semiconductor device and the circuit board by a resin member containing the polymer liquid crystal material in combination with pressurization and heating. A method for connecting a semiconductor device. 前記シート状の高分子液晶材料を含有した樹脂部材の厚さは、フリップチップ実装後の前記半導体装置の電極形成面と前記回路基板の表面とのギャップよりも厚くなるように形成されていることを特徴とする、請求項４記載の半導体装置の接続方法。The thickness of the resin member containing the sheet-like polymer liquid crystal material is formed to be thicker than the gap between the electrode forming surface of the semiconductor device after flip chip mounting and the surface of the circuit board. The method for connecting semiconductor devices according to claim 4 , wherein:
JP33117398A 1998-11-20 1998-11-20 Semiconductor device connection structure and connection method, and semiconductor device package using the same Expired - Fee Related JP3741553B2 (en)

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KR100764164B1 (en) 2006-04-04 2007-10-09 엘지전자 주식회사 Printed circuit board, package using the printed circuit board and making method of the same
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