JP3707231B2 - Anisotropic conductive film and manufacturing method thereof - Google Patents

Anisotropic conductive film and manufacturing method thereof Download PDF

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JP3707231B2
JP3707231B2 JP4581398A JP4581398A JP3707231B2 JP 3707231 B2 JP3707231 B2 JP 3707231B2 JP 4581398 A JP4581398 A JP 4581398A JP 4581398 A JP4581398 A JP 4581398A JP 3707231 B2 JP3707231 B2 JP 3707231B2
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anisotropic conductive
conductive film
thickness
film
chip
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JPH11251364A (en
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雅男 斎藤
幸男 山田
元秀 武市
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Dexerials Corp
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Sony Chemicals Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads

Description

【０００１】
【発明の属する技術分野】
本発明は、異方性導電膜に関する。より詳しくは、マルチチップモジュール基板（以下、ＭＣＭ基板と略する）に複数のＩＣチップ等を異方性導電膜を用いて実装する場合のように、接続部位ごとに当該異方性導電膜に要求される最適膜厚が異なる場合に、各接続部位に最適膜厚の異方性導電膜を低コストで提供できるようにする異方性導電膜に関する。
【０００２】
【従来の技術】
液晶パネルのガラス基板上のＩＴＯ端子と、フレキシブル基板やＴＣＰ(Tape carrier package)の端子とを接続する場合や、半導体チップをマザーボード上にフリップチップ接合する場合のように、２つの回路素子を接着すると共にその間の端子を電気的に接続するための材料の一つとして、異方性導電接着膜が広く用いられている。
【０００３】
この異方性導電膜は、一般に、絶縁性接着剤からなるシート中に導電粒子を分散させたものからなり、接続すべき素子の端子間に異方性導電膜を挟み込み、熱圧着することにより、素子同士の接着と端子間の電気的接続とが同時に行われるようにしたものである。例えば、ＩＣチップを基板に実装する場合、図４（ａ）に示すように、ＩＣチップ１のバンプ２と基板３の配線端子４との間に異方性導電膜１０ａを挟み、次いで矢印のように熱圧着することにより、同図（ｂ）に示すように、ＩＣチップ１と基板３に密着した異方性導電膜１０ｂによってＩＣチップ１自体を基板３に接着すると共にＩＣチップ１のバンプ２を基板３の配線端子４に電気的に接続する。
【０００４】
この場合、ＩＣチップ１と基板３との間に挟む異方性導電膜１０ａの膜厚は、基本的には、ＩＣチップ１を基板３に載置したときの両者の間隙程度もしくは間隙よりもわずかに厚い程度とすることが好ましい。異方性導電膜１０ａの膜厚が、ＩＣチップ１と基板３との間隙よりも薄すぎると、熱圧着後にＩＣチップ１と基板３との間隙が異方性導電膜１０ｂで充填されず、接続信頼性が低下する。反対に、異方性導電膜１０ａの膜厚が、ＩＣチップ１と基板３との間隙よりも厚すぎると、熱圧着後にＩＣチップ１と基板３との間からはみ出す異方性導電膜１０ｂの量が増え、本来の接続部位以外の部分に流れ出して不良品が生じたり、熱圧着ヘッドに異方性導電膜が付着し、生産性が低下するなどの問題が引き起こされる。
【０００５】
【発明が解決しようとする課題】
ところで、異方性導電膜１０ａを用いてＭＣＭ基板に複数のＩＣチップ等を実装する場合、より具体的には、例えば、ＦＰＤ(Flat Panel Display)の製造に際し、ガラス基板上の配線端子にＴＡＢを接続したり、複数のＩＣチップを基板に実装する場合、個々の接続部位ごとに接続する素子間の間隙等が異なるので、使用する異方性導電膜１０ａの最適膜厚は異なる。例えば、図５（同図（ａ）斜視図、同図（ｂ）ｘ−ｘ断面図）に示すように、異方性導電膜１０ｂによってＩＣチップ１のバンプ２を平坦な基板３上の配線端子４に接続することによりＩＣチップ１を基板３に実装する場合、図６（同図（ａ）斜視図、同図（ｂ）ｘ−ｘ断面図）に示すように、異方性導電膜１０ｂによってＩＣチップ１のバンプ２を基板３上の配線端子４に接続することによりＩＣチップ１を基板３に実装する際に、そのＩＣチップ１の実装部位の基板３に凹部３ｘが形成されている場合、図７（同図（ａ）斜視図、同図（ｂ）ｘ−ｘ断面図）に示すように、異方性導電膜１０ｂによってＩＣチップ１のバンプ２を基板３上の配線端子４に接続することによりＩＣチップ１を基板３に実装する際に、そのＩＣチップ１の下に配線５と配線５を覆うレジスト６が存在する場合、図８（同図（ａ）斜視図、同図（ｂ）ｘ−ｘ断面図）に示すように、異方性導電膜１０ｂによってＩＣチップ１のバンプ２を基板３上の配線端子４に接続することによりＩＣチップ１を基板３に実装する際に、ＩＣチップ１のバンプ２がＩＣチップ１の周囲だけでなく中央部にも形成されている場合、図９（同図（ａ）斜視図、同図（ｂ）ｘ−ｘ断面図）に示すように、異方性導電膜１０ｂによって複数のＩＣチップ１ｐ、１ｑのバンプ２ｐ、２ｑをそれぞれ基板３上の配線端子４ｐ、４ｑに接続することによりＩＣチップ１ｐ、１ｑを基板３に実装する際に、それらＩＣチップ１ｐ、１ｑのバンプ２ｐ、２ｑの高さが異なる場合等においては、それぞれ使用する異方性導電膜の最適膜厚は互いに異なるものとなる。
【０００６】
しかしながら、上述のように、接続部位に応じて異方性導電膜の最適膜厚が異なる場合でも、それら最適膜厚に対応して膜厚の異なる複数種の異方性導電膜のリールを用意すると、設備的にもコスト的にも不利益が大きくなる。そのため、従来は、一種のＭＣＭの製造に対しては、通常、特定の膜厚の異方性導電膜のリールが一種のみ使用されている。したがって、接続不良の発生を解消することが困難となっている。
【０００７】
これに対しては、できる限り単一の膜厚の異方性導電膜の使用により複数の接続部位で各素子を良好に実装できるよう、配線に制限を設けることがなされている。しかし、配線に制限を設けても、接続部位ごとの異方性導電膜の最適膜厚を同一にすることは困難であり、接続不良の発生を完全には解消することができない。
【０００８】
本発明は以上のような従来技術の問題点を解決しようとするものであり、ＭＣＭ基板に複数のＩＣチップ等を異方性導電膜を用いて実装する場合のように、接続部位ごとに当該異方性導電膜に要求される最適膜厚が異なる場合に、各接続部位に最適膜厚の異方性導電膜を低コストで提供できるようにすることを目的としている。
【０００９】
【課題を解決するための手段】
本発明は、上述の目的を達成するため、絶縁性接着剤からなるシート中に導電粒子が分散されてなる異方性導電膜において、該異方性導電膜が厚みの異なる複数の領域からなり、それらの領域のいずれもが異方性導電接続部位となりうることを特徴とする異方性導電膜を提供する。
【００１０】
特に、この異方性導電膜が剥離フィルム上に積層されている態様を提供し、そのより好ましい態様として、異方性導電膜の厚さに対応して剥離フィルムに、色分けや打ち抜き符号等の厚み表示が施されている態様を提供する。
【００１１】
また、この異方性導電膜の製造方法として、均一な厚みの剥離フィルム上に印刷層を該印刷層が厚みの異なる複数の領域をもつように形成し、その上に絶縁性接着剤と導電粒子からなる異方性導電接着剤を、剥離フィルムと印刷層を含む全厚が均一になるように塗布する方法を提供する。
【００１２】
この異方性導電膜によれば、一つの異方性導電膜中に膜厚の異なる複数の領域が形成されているので、ＭＣＭ基板へ複数種のＩＣチップを実装する場合のように、実装するＩＣごとに使用する異方性導電膜の最適膜厚が異なる場合でも、各ＩＣチップに良好な実装を可能とする異方性導電膜を単一の異方性導電膜のリールから低コストに提供することができる。
【００１３】
【発明の実施の形態様】
以下、本発明を図面を参照しつつ、詳細に説明する。なお、各図中、同一符号は、同一又は同等の構成要素を表している。
【００１４】
図１は、本発明の異方性導電膜の一つの態様の断面図である。この異方性導電膜２０は、剥離フィルム３０上に印刷層４０を介して積層されている。図２は、図１の異方性導電膜２０のリール５０の斜視図である。
【００１５】
この異方性導電膜２０は、絶縁性接着剤からなるシート中に導電粒子が分散されたものからなり、膜厚の異なる領域２１、２２、２３を長手方向に繰り返し有している。各領域２１、２２、２３の膜厚は、当該異方性導電膜２０を用いて実装する素子間の間隙等に応じて適宜定めることができるが、例えば、膜厚の最も厚い領域２１を３６〜４１μｍ、中間の厚さの領域２２を３１〜３６μｍ、最も薄い領域２３を２５〜３１μｍ程度とすることができる。
【００１６】
このように異方性導電膜２０に膜厚の異なる領域２１、２２、２３を設けることにより、ＭＣＭ基板へ複数種のＩＣチップを実装する場合において、当該ＩＣチップの実装形態が、例えば、図７のＩＣチップ１、図８のＩＣチップ１、または図９のＩＣチップ１ｑの実装のようにＩＣチップと基板との間隙が比較的狭い場合には領域２３を使用し、図５のようにＩＣチップと基板とが一般的な間隙を有している場合には、領域２２を使用し、図６のＩＣチップ１又は図９のＩＣチップ１ｐのようにＩＣチップと基板との間隙が比較的広い場合には、領域２１を使用することが可能となる。したがって、この異方性導電膜２０の単一のリール５０を用いることにより、各ＩＣチップに対して、良好な実装をすることが可能となる。
【００１７】
異方性導電膜２０のいずれの領域２１、２２、２３においても、それらを構成する絶縁性接着剤及び導電粒子自体は、公知の異方性導電膜と同様とすることができる。したがって、例えば、絶縁性接着剤としては、エポキシ系熱硬化型樹脂を主成分とする接着剤等を使用することができ、また導電粒子としては、半田粒子、ニッケル粒子等の金属粒子や、樹脂粒子に金属メッキした粒子等を使用することができる。
【００１８】
一方、異方性導電膜２０の下方に位置する印刷層４０は、後述するこの異方性導電膜２０の製造方法にしたがう場合に特徴的に形成されるものであり、異方性導電膜２０の領域２１、２２、２３が順次膜厚が小さくなっているのに対応して、順次層厚が大きくなっている領域４１、４２、４３からなっている。即ち、これら印刷層４０と異方性導電膜２０とを合わせた厚さは、各領域において等しくなっている。
【００１９】
このように印刷層４０の各領域４１、４２、４３は、異方性導電膜２０の各領域２１、２２、２３に対応した層厚となっているので、これら印刷層の各領域４１、４２、４３は、図１及び図２に示すように、異方性導電膜２０の各領域２１、２２、２３に対応させて色分けすることが好ましい。これにより、当該ＩＣチップの実装に最適な異方性導電膜２０の領域を容易に識別することが可能となる。
【００２０】
なお、異方性導電膜２０の膜厚の異なる各領域２１、２２、２３を容易に識別できるようにする厚み表示としては、印刷層４０の各領域４１、４２、４３を色分けする他、各領域４１、４２、４３が色の濃淡で区別できるようにしてもよく、文字や図柄などを施すことにより区別できるようにしてもよい。
【００２１】
本発明において、剥離フィルム３０は、公知の剥離フィルム付き異方性導電膜に使用されている当該剥離フィルムと同様にポリエステルフィルム等から形成することができる。また、剥離フィルム３０には、異方性導電膜２０の各領域２１、２２、２３の膜厚が容易に認識できるように厚み表示として、任意の打ち抜き符号、凹凸符号等を施してもよい。例えば、図３に示すリール５１のように、剥離フィルム３０に円形、四角形等の打ち抜き符号３１を設けることができる。この他、バーコードを設けてもよい。
【００２２】
図１及び図２に示した異方性導電膜２０の製造方法としては、まず、均一な厚みの剥離フィルム３０上に印刷層４０をグラビア印刷等により形成する。この場合、印刷層４０が厚みの異なる複数の領域４１、４２、４３をもち、かつ各領域４１、４２、４３ごとに異なる色となるようにする。次いで、その上に絶縁性接着剤と導電粒子からなる異方性導電接着剤を、剥離フィルム３０と印刷層４０を含む全厚が均一になるように塗布することにより異方性導電膜２０を形成する。
【００２３】
以上、図示した態様に基づいて、本発明を詳細に説明したが、本発明は、これに限られず種々の態様をとることができる。例えば、異方性導電膜における、厚さの異なる領域の形状や配置には特に制限はない。したがって、図１及び図２には異方性導電膜２０の膜厚の異なる領域２１、２２、２３をリール５０の長手方向に繰り返し設けた例を示したが、巾方向に膜厚の異なる領域が順次現れるように形成してもよい。
【００２４】
【実施例】
以下、本発明を実施例に基づいて具体的に説明する。
【００２５】
図１の層構成を有する異方性導電膜２０のリール５０を次のように作製した。まず、厚さ５０μｍの白色ＰＥＴフィルムを剥離フィルム３０とし、この上に黄色染料、青色染料、赤色染料でそれぞれ着色したポリエステル樹脂からなる塗料をグラビア印刷で巾１ｃｍずつ繰り返し印刷することにより印刷層４０を形成した。この場合、黄色染料からなる塗料、青色染料からなる塗料及び赤色染料からなる塗料は、それぞれ乾燥塗膜の厚さが１０μｍ（領域４１）、１５μｍ（領域４２）、２０μｍ（領域４３）となるようにした。
【００２６】
次に、印刷層４０上にシリコーン系剥離剤を２μｍ厚でコーティングすることにより剥離処理した。
【００２７】
一方、異方性導電接着剤として、エポキシ樹脂からなる絶縁性接着剤中に導電粒子として金メッキプラスチック粒子を分散させたものを調製し、これを上述の剥離処理した印刷層４０上に塗布することにより異方性導電膜２０を形成し、リール５０とした。この場合、剥離フィルム３０と印刷層４０と異方性導電膜２０の全体の厚さを１００μｍとすることにより、異方性導電膜２０中に膜厚の異なる領域２１、２２、２３を形成した。
【００２８】
得られた異方性導電膜２０のリール５０を、色感知センサー付きの異方性導電膜仮貼機で用いることにより、異方性導電膜２０中の所定の膜厚の領域２１、２２、２３を所定の形状にハーフカットし、それぞれ図５のような平坦な基板３上の実装部位に貼り付けた。その結果、印刷層の黄色領域４１に対応する異方性導電膜２１の貼着後の厚さは３８μｍであり、青色領域４２に対応する異方性導電膜２２の貼着後の厚さは３３μｍであり、赤色領域４３に対応する異方性導電膜２３の貼着後の厚さは２８μｍであった。
【００２９】
【発明の効果】
本発明によれば、異方性導電膜を用いて素子間の接続を行う場合において、接続部位ごとに異方性導電膜に要求される最適膜厚が異なるときに、各接続部位に最適膜厚の異方性導電膜を単一のリールで低コストに提供することができる。
【図面の簡単な説明】
【図１】本発明の異方性導電膜の断面図である。
【図２】本発明の異方性導電膜のリールの斜視図である。
【図３】本発明の異方性導電膜のリールの斜視図である。
【図４】異方性導電膜の一般的な使用方法の説明図である。
【図５】異方性導電膜でＩＣチップを基板に実装する場合の態様例である。
【図６】異方性導電膜でＩＣチップを基板に実装する場合の態様例である。
【図７】異方性導電膜でＩＣチップを基板に実装する場合の態様例である。
【図８】異方性導電膜でＩＣチップを基板に実装する場合の態様例である。
【図９】異方性導電膜でＩＣチップを基板に実装する場合の態様例である。
【符号の説明】
１…ＩＣチップ、 ２…バンプ、 ３…基板、 ４…配線端子、 ２０…異方性導電膜、 ２１…異方性導電膜中の領域、 ２２…異方性導電膜中の領域、 ２３…異方性導電膜中の領域、３０…剥離フィルム、 ４０…印刷層、 ４１…印刷層中の領域、 ４２…印刷層中の領域、 ４３…印刷層中の領域、 ５０…リール[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an anisotropic conductive film. More specifically, as in the case where a plurality of IC chips or the like are mounted on a multi-chip module substrate (hereinafter abbreviated as an MCM substrate) using an anisotropic conductive film, the connection to each anisotropic conductive film is performed for each connection site. The present invention relates to an anisotropic conductive film that can provide an anisotropic conductive film having an optimal film thickness at each connection site at a low cost when the required optimal film thickness is different.
[0002]
[Prior art]
Bonding two circuit elements, such as connecting an ITO terminal on a glass substrate of a liquid crystal panel to a flexible substrate or TCP (Tape carrier package) terminal, or flip-chip bonding a semiconductor chip on a motherboard At the same time, an anisotropic conductive adhesive film is widely used as one of the materials for electrically connecting the terminals therebetween.
[0003]
This anisotropic conductive film is generally made by dispersing conductive particles in a sheet made of an insulating adhesive. By sandwiching the anisotropic conductive film between terminals of elements to be connected, thermocompression bonding is performed. The bonding between the elements and the electrical connection between the terminals are performed simultaneously. For example, when an IC chip is mounted on a substrate, an anisotropic conductive film 10a is sandwiched between the bump 2 of the IC chip 1 and the wiring terminal 4 of the substrate 3 as shown in FIG. By thermocompression bonding, the IC chip 1 itself is adhered to the substrate 3 by the anisotropic conductive film 10b in close contact with the IC chip 1 and the substrate 3, as shown in FIG. 2 is electrically connected to the wiring terminal 4 of the substrate 3.
[0004]
In this case, the film thickness of the anisotropic conductive film 10a sandwiched between the IC chip 1 and the substrate 3 is basically about the gap between the IC chip 1 and the gap when the IC chip 1 is placed on the substrate 3. A slightly thicker thickness is preferred. If the thickness of the anisotropic conductive film 10a is too thin than the gap between the IC chip 1 and the substrate 3, the gap between the IC chip 1 and the substrate 3 is not filled with the anisotropic conductive film 10b after thermocompression bonding. Connection reliability decreases. On the contrary, if the thickness of the anisotropic conductive film 10a is too thicker than the gap between the IC chip 1 and the substrate 3, the anisotropic conductive film 10b protruding from between the IC chip 1 and the substrate 3 after thermocompression bonding. The amount increases, causing a problem that the product flows out to a portion other than the original connection site to produce a defective product, or the anisotropic conductive film adheres to the thermocompression bonding head, resulting in a decrease in productivity.
[0005]
[Problems to be solved by the invention]
By the way, when a plurality of IC chips or the like are mounted on the MCM substrate using the anisotropic conductive film 10a, more specifically, for example, when manufacturing an FPD (Flat Panel Display), a TAB is connected to a wiring terminal on the glass substrate. When a plurality of IC chips are mounted on a substrate, the optimum film thickness of the anisotropic conductive film 10a to be used is different because the gap between the elements to be connected is different for each connection part. For example, as shown in FIG. 5 (the perspective view of FIG. 5A and the cross-sectional view of FIG. 5B), the bump 2 of the IC chip 1 is wired on the flat substrate 3 by the anisotropic conductive film 10b. When the IC chip 1 is mounted on the substrate 3 by being connected to the terminal 4, as shown in FIG. 6 (the perspective view of FIG. 6 (a), the cross-sectional view of FIG. 6 (b)), the anisotropic conductive film When the IC chip 1 is mounted on the substrate 3 by connecting the bumps 2 of the IC chip 1 to the wiring terminals 4 on the substrate 3 by 10b, the recesses 3x are formed in the substrate 3 of the mounting portion of the IC chip 1. 7 (a perspective view, (b) xx cross-sectional view), the bump 2 of the IC chip 1 is connected to the wiring terminal on the substrate 3 by the anisotropic conductive film 10b, as shown in FIG. 4 when the IC chip 1 is mounted on the substrate 3 by connecting to the IC chip 1 When the line 5 and the resist 6 covering the wiring 5 are present, as shown in FIG. 8 (the perspective view of FIG. 8A and the cross-sectional view of FIG. 8B), the IC chip is formed by the anisotropic conductive film 10b. When the IC chip 1 is mounted on the substrate 3 by connecting the 1 bump 2 to the wiring terminal 4 on the substrate 3, the bump 2 of the IC chip 1 is formed not only around the IC chip 1 but also in the central portion. As shown in FIG. 9 (the perspective view of FIG. 9 (a), the cross-sectional view of FIG. 9 (b)), the bumps 2p, 2q of the plurality of IC chips 1p, 1q are formed by the anisotropic conductive film 10b. When the IC chips 1p and 1q are mounted on the substrate 3 by connecting them to the wiring terminals 4p and 4q on the substrate 3, respectively, when the bumps 2p and 2q of the IC chips 1p and 1q are different in height, etc. The optimum film thickness of each anisotropic conductive film used is It is different in the stomach.
[0006]
However, as described above, even when the optimum film thickness of the anisotropic conductive film differs depending on the connection site, a plurality of types of anisotropic conductive film reels having different film thicknesses corresponding to the optimum film thickness are prepared. As a result, the disadvantages in terms of equipment and cost increase. For this reason, conventionally, only one kind of reel of an anisotropic conductive film having a specific film thickness is used for the production of a kind of MCM. Therefore, it is difficult to eliminate the occurrence of connection failure.
[0007]
On the other hand, wiring is limited so that each element can be satisfactorily mounted at a plurality of connection sites by using an anisotropic conductive film having a single film thickness as much as possible. However, even if the wiring is limited, it is difficult to make the optimum film thickness of the anisotropic conductive film for each connection portion, and the occurrence of connection failure cannot be completely eliminated.
[0008]
The present invention seeks to solve the above-described problems of the prior art, and is applied to each connection site as in the case of mounting a plurality of IC chips or the like on an MCM substrate using an anisotropic conductive film. An object of the present invention is to provide an anisotropic conductive film having an optimum film thickness at each connection site at a low cost when the optimum film thickness required for the anisotropic conductive film is different.
[0009]
[Means for Solving the Problems]
The present invention, in order to achieve the object described above, in the anisotropic conductive film conductive particles dispersed in the sheet in made of an insulating adhesive, the anisotropic conductive film is composed of a plurality of regions having different thicknesses An anisotropic conductive film is provided in which any of these regions can serve as an anisotropic conductive connection part .
[0010]
In particular, the embodiment provides a mode in which this anisotropic conductive film is laminated on a release film, and as a more preferable mode, the release film corresponding to the thickness of the anisotropic conductive film has color coding, punching code, etc. A mode in which thickness indication is provided is provided.
[0011]
As a method for producing this anisotropic conductive film, a printed layer is formed on a release film having a uniform thickness so that the printed layer has a plurality of regions having different thicknesses, and an insulating adhesive and a conductive layer are formed thereon. Provided is a method of applying an anisotropic conductive adhesive composed of particles so that the entire thickness including a release film and a printed layer is uniform.
[0012]
According to this anisotropic conductive film, since a plurality of regions having different film thicknesses are formed in one anisotropic conductive film, mounting is performed as in the case of mounting a plurality of types of IC chips on the MCM substrate. Even if the optimum film thickness of the anisotropic conductive film used for each IC is different, the anisotropic conductive film that enables good mounting on each IC chip can be reduced from a single anisotropic conductive film reel at low cost Can be provided.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the drawings. In addition, in each figure, the same code | symbol represents the same or equivalent component.
[0014]
FIG. 1 is a cross-sectional view of one embodiment of the anisotropic conductive film of the present invention. The anisotropic conductive film 20 is laminated on the release film 30 via the printing layer 40. FIG. 2 is a perspective view of the reel 50 of the anisotropic conductive film 20 of FIG.
[0015]
This anisotropic conductive film 20 is formed by dispersing conductive particles in a sheet made of an insulating adhesive, and has regions 21, 22, and 23 having different thicknesses in the longitudinal direction. The thickness of each of the regions 21, 22, and 23 can be determined as appropriate according to the gap between elements mounted using the anisotropic conductive film 20. For example, the thickest region 21 is 36. ˜41 μm, the intermediate thickness region 22 can be 31 to 36 μm, and the thinnest region 23 can be about 25 to 31 μm.
[0016]
Thus, by providing the regions 21, 22, and 23 having different film thicknesses on the anisotropic conductive film 20, when mounting a plurality of types of IC chips on the MCM substrate, the mounting form of the IC chip is, for example, FIG. When the gap between the IC chip and the substrate is relatively narrow as in the case of mounting the IC chip 1 in FIG. 7, the IC chip 1 in FIG. 8, or the IC chip 1q in FIG. 9, the region 23 is used, as shown in FIG. When the IC chip and the substrate have a general gap, the region 22 is used, and the gap between the IC chip and the substrate is compared as in the IC chip 1 of FIG. 6 or the IC chip 1p of FIG. If the area is large, the area 21 can be used. Therefore, by using the single reel 50 of the anisotropic conductive film 20, it is possible to perform good mounting on each IC chip.
[0017]
In any region 21, 22, 23 of the anisotropic conductive film 20, the insulating adhesive and the conductive particles themselves constituting them can be the same as those of a known anisotropic conductive film. Therefore, for example, an adhesive mainly composed of an epoxy thermosetting resin can be used as the insulating adhesive, and the conductive particles include metal particles such as solder particles and nickel particles, and resins. Particles that are metal-plated on the particles can be used.
[0018]
On the other hand, the printed layer 40 located below the anisotropic conductive film 20 is formed characteristically in accordance with a method for manufacturing the anisotropic conductive film 20 described later. The regions 21, 22, and 23 are composed of regions 41, 42, and 43 in which the layer thicknesses are sequentially increased. That is, the combined thickness of the printed layer 40 and the anisotropic conductive film 20 is equal in each region.
[0019]
Thus, since each area | region 41,42,43 of the printing layer 40 is a layer thickness corresponding to each area | region 21,22,23 of the anisotropic conductive film 20, each area | region 41,42 of these printing layers is used. , 43 are preferably color-coded corresponding to the regions 21, 22, 23 of the anisotropic conductive film 20, as shown in FIGS. This makes it possible to easily identify the region of the anisotropic conductive film 20 that is optimal for mounting the IC chip.
[0020]
In addition, as a thickness display that makes it easy to identify the regions 21, 22, and 23 having different thicknesses of the anisotropic conductive film 20, the regions 41, 42, and 43 of the printing layer 40 are color-coded, The areas 41, 42, and 43 may be distinguished by color shading, or may be distinguished by applying characters or designs.
[0021]
In this invention, the peeling film 30 can be formed from a polyester film etc. similarly to the said peeling film currently used for the well-known anisotropic conductive film with a peeling film. Moreover, you may give arbitrary punching codes, uneven | corrugated codes, etc. as a thickness display so that the film thickness of each area | region 21, 22, 23 of the anisotropic conductive film 20 can be recognized easily. For example, like the reel 51 shown in FIG. 3, a punching code 31 such as a circle or a rectangle can be provided on the release film 30. In addition, a barcode may be provided.
[0022]
As a method for manufacturing the anisotropic conductive film 20 shown in FIGS. 1 and 2, first, the printing layer 40 is formed on the release film 30 having a uniform thickness by gravure printing or the like. In this case, the print layer 40 has a plurality of regions 41, 42, and 43 having different thicknesses, and the regions 41, 42, and 43 have different colors. Next, the anisotropic conductive film 20 is coated with an anisotropic conductive adhesive composed of an insulating adhesive and conductive particles so that the entire thickness including the release film 30 and the printed layer 40 is uniform. Form.
[0023]
As mentioned above, although this invention was demonstrated in detail based on the aspect shown in figure, this invention is not restricted to this but can take a various aspect. For example, there is no particular limitation on the shape and arrangement of regions having different thicknesses in the anisotropic conductive film. Accordingly, FIGS. 1 and 2 show examples in which the regions 21, 22, and 23 having different thicknesses of the anisotropic conductive film 20 are repeatedly provided in the longitudinal direction of the reel 50. However, the regions having different thicknesses in the width direction are shown. May be formed so as to appear sequentially.
[0024]
【Example】
Hereinafter, the present invention will be specifically described based on examples.
[0025]
A reel 50 of the anisotropic conductive film 20 having the layer configuration of FIG. 1 was produced as follows. First, a white PET film having a thickness of 50 μm is used as a release film 30, and a printing layer 40 is formed by repeatedly printing a coating made of a polyester resin colored with a yellow dye, a blue dye, and a red dye by 1 cm in width by gravure printing. Formed. In this case, the paint made of yellow dye, the paint made of blue dye, and the paint made of red dye have a dry coating thickness of 10 μm (region 41), 15 μm (region 42), and 20 μm (region 43), respectively. I made it.
[0026]
Next, a release treatment was performed by coating the printing layer 40 with a silicone release agent with a thickness of 2 μm.
[0027]
On the other hand, an anisotropic conductive adhesive is prepared by dispersing gold-plated plastic particles as conductive particles in an insulating adhesive made of an epoxy resin, and this is applied onto the above-described peeled print layer 40. Thus, the anisotropic conductive film 20 was formed, and the reel 50 was obtained. In this case, regions 21, 22, and 23 having different thicknesses were formed in the anisotropic conductive film 20 by setting the total thickness of the release film 30, the printing layer 40, and the anisotropic conductive film 20 to 100 μm. .
[0028]
By using the obtained reel 50 of the anisotropic conductive film 20 with an anisotropic conductive film temporary pasting machine with a color sensor, the regions 21, 22, 22, 22 of a predetermined film thickness in the anisotropic conductive film 20, 23 was half-cut into a predetermined shape, and each was pasted on a mounting portion on a flat substrate 3 as shown in FIG. As a result, the thickness after adhesion of the anisotropic conductive film 21 corresponding to the yellow region 41 of the printed layer is 38 μm, and the thickness after adhesion of the anisotropic conductive film 22 corresponding to the blue region 42 is The thickness of the anisotropic conductive film 23 corresponding to the red region 43 after bonding was 28 μm.
[0029]
【The invention's effect】
According to the present invention, when connecting between elements using an anisotropic conductive film, when the optimum film thickness required for the anisotropic conductive film differs for each connection site, the optimum film for each connection site. A thick anisotropic conductive film can be provided at a low cost with a single reel.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an anisotropic conductive film of the present invention.
FIG. 2 is a perspective view of a reel of anisotropic conductive film of the present invention.
FIG. 3 is a perspective view of a reel of an anisotropic conductive film of the present invention.
FIG. 4 is an explanatory diagram of a general method of using an anisotropic conductive film.
FIG. 5 is an example of a case where an IC chip is mounted on a substrate with an anisotropic conductive film.
FIG. 6 is an example of a case where an IC chip is mounted on a substrate with an anisotropic conductive film.
FIG. 7 is an example of a case where an IC chip is mounted on a substrate with an anisotropic conductive film.
FIG. 8 is an example of a case where an IC chip is mounted on a substrate with an anisotropic conductive film.
FIG. 9 is an example of a case where an IC chip is mounted on a substrate with an anisotropic conductive film.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... IC chip, 2 ... Bump, 3 ... Board | substrate, 4 ... Wiring terminal, 20 ... Anisotropic conductive film, 21 ... Area | region in anisotropic conductive film, 22 ... Area | region in anisotropic conductive film, 23 ... Area in anisotropic conductive film, 30 ... release film, 40 ... printed layer, 41 ... area in printed layer, 42 ... area in printed layer, 43 ... area in printed layer, 50 ... reel

Claims (7)

絶縁性接着剤からなるシート中に導電粒子が分散されてなる異方性導電膜において、該異方性導電膜が厚みの異なる複数の領域からなり、それらの領域のいずれもが異方性導電接続部位となりうることを特徴とする異方性導電膜。In an anisotropic conductive film in which conductive particles are dispersed in a sheet made of an insulating adhesive, the anisotropic conductive film is composed of a plurality of regions having different thicknesses, and all of these regions are anisotropic conductive. An anisotropic conductive film, which can be a connection site . 異方性導電膜が剥離フィルム上に積層されている請求項１記載の異方性導電膜。  The anisotropic conductive film according to claim 1, wherein the anisotropic conductive film is laminated on a release film. 異方性導電膜の厚さに対応して剥離フィルムに厚み表示が施されている請求項２記載の異方性導電膜。  The anisotropic conductive film according to claim 2, wherein the release film has a thickness indication corresponding to the thickness of the anisotropic conductive film. 厚み表示として、異方性導電膜の厚さに対応して剥離フィルムに色分けされた印刷層が形成されている請求項３記載の異方性導電膜。  4. The anisotropic conductive film according to claim 3, wherein a printed layer color-coded on the release film is formed corresponding to the thickness of the anisotropic conductive film as a thickness display. 厚み表示として、異方性導電膜の厚さに対応して剥離フィルムに打ち抜き符号が形成されている請求項３記載の異方性導電膜。  The anisotropic conductive film according to claim 3, wherein a stamped code is formed on the release film corresponding to the thickness of the anisotropic conductive film as a thickness display. 請求項２〜５のいずれかに記載の異方性導電膜をリールとした異方性導電膜リール。An anisotropic conductive film reel comprising the anisotropic conductive film according to claim 2 as a reel. 均一な厚みの剥離フィルム上に印刷層を該印刷層が厚みの異なる複数の領域をもつように形成し、その上に絶縁性接着剤と導電粒子からなる異方性導電接着剤を、剥離フィルムと印刷層を含む全厚が均一になるように塗布する請求項２記載の異方性導電膜の製造方法。  A print layer is formed on a release film having a uniform thickness so that the print layer has a plurality of regions having different thicknesses, and an anisotropic conductive adhesive composed of an insulating adhesive and conductive particles is formed on the print layer. The method for producing an anisotropic conductive film according to claim 2, wherein the coating is applied so that the total thickness including the printed layer is uniform.
JP4581398A 1998-02-26 1998-02-26 Anisotropic conductive film and manufacturing method thereof Expired - Fee Related JP3707231B2 (en)

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TW200913828A (en) * 2002-07-30 2009-03-16 Hitachi Chemical Co Ltd Adhesive material reel
JP4692664B2 (en) * 2009-05-13 2011-06-01 日立化成工業株式会社 Adhesive tape crimping method
KR102267650B1 (en) * 2016-12-01 2021-06-21 데쿠세리아루즈 가부시키가이샤 Anisotropic conductive film

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