JP3693858B2 - Current shunt built in semiconductor module - Google Patents
Current shunt built in semiconductor module Download PDFInfo
- Publication number
- JP3693858B2 JP3693858B2 JP20038799A JP20038799A JP3693858B2 JP 3693858 B2 JP3693858 B2 JP 3693858B2 JP 20038799 A JP20038799 A JP 20038799A JP 20038799 A JP20038799 A JP 20038799A JP 3693858 B2 JP3693858 B2 JP 3693858B2
- Authority
- JP
- Japan
- Prior art keywords
- shunt
- semiconductor module
- fixed
- metal substrate
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は,半導体モジュールの中に内蔵させて,半導体チップに流れる電流値を検出して制御するための分流器に関する。
【0002】
【従来の技術】
絶縁板に固着された銅回路に,半導体チップを半田付けした後にエポキシ樹脂などの封止材でモールドされ構成される半導体モジュールがある。図2(a)に電力制御用の半導体モジュールのブロック図を示す。この図において半導体制御回路41の通電電流が過大となった場合,一定電流以下にコントロールするための制御信号をつくりだして,該半導体制御回路41に導くために,まず,分流器42の,両端44,45の電位差を電流検出器43に導き,その電位差を増幅して,制御信号発生器40に導いて制御信号を作り,半導体チップによって電力制御するものである。上記のようなモジュールに内蔵されている分流器42の構成を図2(b)に示す。
【0003】
絶縁板50に固着された銅回路51に分流器42の両端44,45がはんだ付けされている。該分流器42の両端に発生する電位差は分流器のもつ抵抗値によるものであるから,その温度上昇によって該抵抗値の変動が小さい銅・ニッケル合金のような金属等が分流器の材料として用いられている。半導体モジュールに内蔵される分流器は,電流10Aまでの小型のものでは,その発熱によって変化する抵抗値も許容されたが,大電流の使用に耐えるものが求められてきた。
【0004】
【発明が解決しようとする課題】
大電流の流れる分流器は,放熱効果を高めるために,分流器全体の寸法を大きくして温度上昇を抑えてきた。この分流器を半導体モジュールに内蔵させるためには半導体モジュール全体寸法を抑える必要から分流器の占有する面積の極小化が課題であり,占有面積を小さく維持して放熱効果の高い分流器の実現と,分流器の抵抗値の精度向上が課題であった。
【0005】
【課題を解決するための手段】
分流器の精度向上を阻害する要因として次のようなものがある。第1の要因は温度上昇による分流器の抵抗値変化であり,第2の要因は抵抗値の個体間バラツキであり,その製作精度によって発生していることが判明した。
【0006】
第1の要因に対しては,熱伝導の効果を高めて,温度上昇を抑え,第2の要因に対しては,製作工程で微調整する。そこで,金属基板上に固着した熱伝導の良好な電気絶縁層上に設けられた銅回路の表面に,半導体チップ,電流検出器を構成する回路素子,および分流器を載置し固着して,封止材でモールドされた半導体モジュールの中に,内蔵される分流器においては,その両端が銅回路に固着され,下面が,熱伝導の良い電気絶縁物を介在させて金属基板上に密着し固定された金属片から成り,該金属片の上面の任意の2つの位置で,ワイヤボンディングされ電流検出器へ導出されるようにし,ワイヤボンディングと抵抗値の計測を連動させて位置決めを行う事によって,上記2つの要因に対応している。
【0007】
【発明の実施の形態】
以下に,本発明による実施の形態を説明する。図1(a)は,本発明の要部の平面図,図1(b)は要部の側面図である。1は銅・ニッケル合金などの金属片,2は金属基板,3は電気絶縁層,4は銅回路,5は半田付け部分,6は電流検出器へ導出されるボンディングワイヤ,P,Qは金属片1の上面にある任意の位置を示している。金属基板2に,電気絶縁層3を介して上記金属片1から成る分流器が,その両端で銅回路4に半田付けされている。該金属片1の下面は,熱伝導の良い金属基板2に,比較的良好な熱伝導性の,例えば窒化アルミニウムのような電気絶縁物7を介して密着させている。
【0008】
上記金属片1の上面には,任意の2つの位置PとQから電圧を電流検出器(図示せず)へ導出するためのボンディングワイヤ6が,その取付部P,Qの2点間の抵抗値を計測しつつ位置決めしてボンディングされる。このような構成の分流器は,半導体チップや電流検出器を構成する回路素子とともに,同一の銅回路4に半田付けされている。該分流器の抵抗値によって発生する熱は金属基板2へ伝えられて,その金属基板の放熱作用によって冷却される。
【0009】
【発明の効果】
本発明によれば分流器において発生した熱が,密着している金属基板の広い表面の面積から放熱されるので,精度の阻害要因である温度上昇を抑えることができる。更に,製作工程の最終段階において,抵抗値を計測しつつ位置決めをし,ワイヤをボンディング出来る構成であるから,個体間バラツキを小さくするように微調整が出来る。加えて,特別仕様の電流値にも所望の抵抗値を個別対応できる利点もある。
【図面の簡単な説明】
【図1】 本発明による実施形態を示すブロック図。
【図2】 従来の分流器の構成と,それを内蔵する半導体モジュール全体の構成を示すブロック図。
【符号の説明】
1 銅・ニッケル合金などの金属片
2 金属基板
3 電気絶縁層
4 銅回路
5 半田付け部分
6 電流検出器へ導出されるボンディングワイヤ
7 比較的良好な熱伝導性の電気絶縁物
P,Q 金属片1の上面にある任意の位置[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a shunt for detecting and controlling the value of a current flowing in a semiconductor chip by being incorporated in a semiconductor module.
[0002]
[Prior art]
There is a semiconductor module configured by soldering a semiconductor chip to a copper circuit fixed to an insulating plate and then molding it with a sealing material such as epoxy resin. FIG. 2A shows a block diagram of a semiconductor module for power control. In this figure, when the energization current of the semiconductor control circuit 41 becomes excessive, in order to generate a control signal for controlling the current to be equal to or less than a constant current and to guide it to the semiconductor control circuit 41, first, both
[0003]
Both
[0004]
[Problems to be solved by the invention]
In order to enhance the heat dissipation effect, shunts with large current flow have been increased in size to reduce the temperature rise. In order to incorporate this shunt into the semiconductor module, it is necessary to minimize the area occupied by the shunt because it is necessary to reduce the overall size of the semiconductor module, and to realize a shunt with a high heat dissipation effect by keeping the occupied area small. Therefore, improving the resistance value of the shunt was an issue.
[0005]
[Means for Solving the Problems]
Factors that hinder the accuracy improvement of the shunt are as follows. The first factor is the change in the resistance value of the shunt due to the temperature rise, and the second factor is the variation in resistance value among individuals, and it has been found that this is caused by the manufacturing accuracy.
[0006]
For the first factor, the effect of heat conduction is increased to suppress the temperature rise, and for the second factor, fine adjustment is made in the manufacturing process. Therefore, the semiconductor chip, the circuit elements constituting the current detector, and the shunt are mounted and fixed on the surface of the copper circuit provided on the electrically insulating layer with good heat conduction fixed on the metal substrate. In a shunt that is built in a semiconductor module molded with a sealing material, both ends of the shunt are fixed to a copper circuit, and the bottom surface is in close contact with the metal substrate with an electrically insulating material having good thermal conductivity. It is composed of a fixed metal piece, and is wire-bonded and led to a current detector at any two positions on the upper surface of the metal piece, and positioning is performed by linking wire bonding and resistance measurement. , Corresponding to the above two factors.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments according to the present invention will be described below. FIG. 1A is a plan view of the main part of the present invention, and FIG. 1B is a side view of the main part. 1 is a metal piece such as copper / nickel alloy, 2 is a metal substrate, 3 is an electrical insulation layer, 4 is a copper circuit, 5 is a soldering part, 6 is a bonding wire led out to a current detector, P and Q are metals An arbitrary position on the upper surface of the piece 1 is shown. A current divider made of the metal piece 1 is soldered to the
[0008]
On the upper surface of the metal piece 1, a
[0009]
【The invention's effect】
According to the present invention, the heat generated in the shunt is dissipated from the area of the wide surface of the metal substrate that is in close contact, so that the temperature rise, which is a factor that hinders accuracy, can be suppressed. Furthermore, in the final stage of the manufacturing process, positioning is performed while measuring the resistance value, and the wire can be bonded, so that fine adjustment can be made to reduce the variation between individuals. In addition, there is an advantage that a desired resistance value can be individually handled for a current value of a special specification.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment according to the present invention.
FIG. 2 is a block diagram showing the configuration of a conventional shunt and the configuration of the entire semiconductor module incorporating it.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Metal piece, such as copper and
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20038799A JP3693858B2 (en) | 1999-07-14 | 1999-07-14 | Current shunt built in semiconductor module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20038799A JP3693858B2 (en) | 1999-07-14 | 1999-07-14 | Current shunt built in semiconductor module |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2001028421A JP2001028421A (en) | 2001-01-30 |
JP3693858B2 true JP3693858B2 (en) | 2005-09-14 |
Family
ID=16423488
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20038799A Expired - Fee Related JP3693858B2 (en) | 1999-07-14 | 1999-07-14 | Current shunt built in semiconductor module |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3693858B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6131018B2 (en) * | 2012-10-08 | 2017-05-17 | 株式会社デンソー | Shunt resistor and mounting method thereof |
JP2015184206A (en) * | 2014-03-25 | 2015-10-22 | Koa株式会社 | Current detector |
-
1999
- 1999-07-14 JP JP20038799A patent/JP3693858B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2001028421A (en) | 2001-01-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7501700B2 (en) | Semiconductor power module having an electrically insulating heat sink and method of manufacturing the same | |
US4700273A (en) | Circuit assembly with semiconductor expansion matched thermal path | |
JP4902560B2 (en) | Power semiconductor module | |
US20080106160A1 (en) | Power Module and Motor Integrated Control Unit | |
US10074593B2 (en) | Shunt resistor integrated in a connection lug of a semiconductor module and method for determining a current flowing through a load connection of a semiconductor module | |
US9891247B2 (en) | U-shaped vertical shunt resistor for Power Semiconductor module | |
JP6328298B1 (en) | Power module for power converter, power converter, controller-integrated dynamoelectric machine | |
JP4262453B2 (en) | Power semiconductor device | |
US20130286618A1 (en) | Circuit device | |
JP4465906B2 (en) | Power semiconductor module | |
US20230178461A1 (en) | Semiconductor device | |
JP2000353778A (en) | Power semiconductor module | |
WO2018211735A1 (en) | Semiconductor device | |
WO2022215357A1 (en) | Semiconductor device | |
CN111799250A (en) | Power semiconductor module and method for manufacturing same | |
CN1332442C (en) | Semiconductor device with a pair of radiating fan | |
US4057825A (en) | Semiconductor device with composite metal heat-radiating plate onto which semiconductor element is soldered | |
JP3693858B2 (en) | Current shunt built in semiconductor module | |
EP2178117A1 (en) | Power semiconductor module with double side cooling | |
JP2007329387A (en) | Semiconductor device | |
JPH08306861A (en) | Chip resistor | |
JP2010177619A (en) | Semiconductor module | |
JP2002314037A (en) | Power semiconductor module | |
JPH04249353A (en) | Resin-sealed semiconductor device | |
CN113906557A (en) | Power electronic module with improved cooling |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20050614 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20050622 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080701 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090701 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090701 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100701 Year of fee payment: 5 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110701 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130701 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140701 Year of fee payment: 9 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |