JP3609171B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device such as a diode, a thyristor, and a transistor that are made of silicon and lead-wired with solder.
[0002]
[Prior art]
Conventional electroless nickel (Ni) plating film 1) of the semiconductor element electrodes, 2) various electronic components electrodes, 3) are widely used in electronic industry such as a stable non-magnetic undercoat layer film of a magnetic head for a hard disk .
FIG. 2 shows the steps of forming a conventional diode in order (a) to (e). Using an n-type silicon substrate (FIG. (a)) having a resistivity of several tens of Ω · cm to be the n layer 1, a trivalent p-type impurity such as boron (B) is applied to the upper anode in the figure. A p-layer 2 is formed by diffusing about several tens of μm to 100 μm from the surface of the silicon substrate (however, the depth is determined by the breakdown voltage design of the device). The cathode on the lower side of the figure has 5 atoms such as phosphorus atoms (P). The n-type impurity is diffused to form the n ⁺ layer 3, and both the anode and the cathode are brought to a surface impurity concentration capable of ohmic contact, and the surface is electrically activated ((b) in the figure). Thereafter, the lifetime killer 4 is introduced to the whole ((c) in the figure). Next, both surfaces of the anode and cathode are pre-plated, and in order to provide an anchor effect (improving adhesion of the plating film), both surfaces are ground (or may be polished) with sandblasting to roughen the surface. An uneven grinding surface 5 is formed, and this grinding surface 5 is activated with an acidic or alkaline etching solution so that Ni ions are more likely to precipitate, thereby creating active sites (FIG. 4D). Thereafter, an electrode is formed with a Ni film 7 of about 1 to 2 μm at the same time on both surfaces in an electroless Ni plating solution. At this time, about 10 g / l (liter) of sodium hypophosphite acting as a catalyst is dissolved in the plating solution so that Ni ions are likely to be deposited as a reducing agent. Phosphorus atoms (by weight) will always be deposited. In this way, an electrode of the Ni film 7 that can be soldered is formed. The silicon (Si) wafer on which the Ni film 7 is formed is stacked, and the Si wafer is cut into small square chips of about 1 mm □ using a multi-wire saw or the like (FIG. (E)). However, in the figure (e), one Si wafer is drawn for easy explanation.
[0003]
FIG. 3 is a process subsequent to FIG. 2, and the process of soldering the lead wire to the Si pellet is shown in FIG. A small-sized Si pellet 8 (FIG. 1A) is formed, and lead wires 10 are soldered 9 to both end faces of the Si pellet 8 (FIG. 1B). However , in the figure, the Si pellet 8 of one chip is shown for easy explanation.
[0004]
[Problems to be solved by the invention]
FIG. 4 shows a state where FIG. 3B is etched, FIG. 4A shows an etching state diagram with a KOH aqueous solution, and FIG. 4B shows an etching state diagram with a mixed acid solution. In FIG. 6A, in a KOH etchant (10% aqueous solution, 50 to 70 ° C.), the Ni—Si layer 6 at the interface between the Ni film 7 and the n ⁺ layer 3 becomes Ni— at the interface between the Ni film 7 and the p layer 2. The abnormal etching is selectively performed more than 10 μm more than the Si layer 6 to form the abnormal etching portion 13, and as a result, the n ⁺ layer 3 at the interface is also abnormally etched to reduce the effective cross-sectional area (current cross-sectional area). For this reason, it is difficult to reduce the size and cost of the chip. Note that the etched surfaces of the n layer 1, the p layer 2, the Ni—Si layer 6, and the Ni film 7 are normally etched to form a normal etching portion 12.
In FIG. 6B, in the mixed acid etchant (HF: HNO3: CH3 COOH = 1: 1: 5, volume ratio), the Ni—Si layer 6 at the interface between the Ni film 7 and the n ⁺ layer 3 is replaced by the Ni film 7 and the p layer. Thus, the n ⁺ layer 3, the n layer 1, the p layer 2, the Ni—Si layer 6, and the Ni film 7 form a normal etching portion 12. That is, although the amount etched selectively is smaller than that of the KOH etchant, there are many heavy metal contaminations such as iron and copper, and the electrical characteristics are poor and cannot be put into practical use.
[0005]
The object of the present invention is to solve the above-mentioned problems, and has an electrode of a Ni film on an n-type conductive layer that has good electrical characteristics even with surface etching with an aqueous KOH solution and has a small amount of selective abnormal etching. An object of the present invention is to provide a method for manufacturing a semiconductor device .
[0006]
[Means for Solving the Problems]
In order to achieve the above object, an amorphous nickel film electrode containing 8% by weight or more of phosphorus atoms is formed on the n-type conductive layer of the silicon element , and the n-type conductive layer, the nickel film, A Ni—Si layer is formed between the surfaces, and surface etching is performed with a KOH aqueous solution . The Ni film is preferably formed by electroless plating.
An amorphous Ni plating film containing 8% by weight or more of phosphorus atoms is a passive film on the surface by the action of phosphorus atoms (a film that prevents Si atoms at the interface with Ni from flowing out with an etchant such as KOH). ) And is an electrode film with good corrosion resistance against acidic and alkaline etchants. When this is used as a mask material and Si is treated with a chemical solution, no other than the above-mentioned selective etching peculiar to Si semiconductors occurs, and as a mask material. Also fulfills the role of.
[0007]
5A and 5B are diagrams for explaining the mechanism that causes abnormal etching of silicon at the electrode interface during etching. FIG. 5A is an energy diagram of the silicon, and FIG. 5B is a diagram illustrating the oxidation-reduction potential of the etchant. Indicates. In FIG. 5A, the left side is n-type silicon, and Ec, EF and Ev indicate the energy levels (levels indicated by electron energy) of the conduction band, Fermi level and valence band. In terms of potential, the vacuum level is set to 0 eV, and a positive positive value is obtained in the direction of the arrow, and a sign opposite to the electron energy is attached. The right side is the case of p-type silicon. In a solution such as a mixed acid having an oxidation-reduction potential of −4.5 eV with the energy indicated by hatching below Ev, electrons are transferred from the silicon to the solution in both n-type silicon and p-type silicon. Become an etchant. In FIG. 5B, the energy state density distribution of the oxidant EOX and the reductant Ered in the KOH aqueous solution is shown. In the case of n-type silicon, electrons are given from the silicon to the KOH aqueous solution so as to coincide with the Fermi level EF of silicon. As a result, the oxidation-reduction potential of the oxidant EOX increases, and as a result, the holes in the valence band of silicon increase and silicon dissolves in the KOH aqueous solution. On the other hand, in the case of p-type silicon, electrons are given to the silicon from the KOH aqueous solution so as to coincide with the Fermi level EF of silicon, and the redox potential of the reductant Ered is lowered. Decreases and silicon does not dissolve in the aqueous KOH solution.
[0008]
In the present invention, an amorphous Ni film containing 8% by weight or more of phosphorus atoms forms a passive film on the surface, and functions to cut off the exchange of electrons or holes between the Ni film and the etchant. , Abnormal etching of the Ni film is prevented. When the abnormal etching of the Ni film is prevented, the exchange of electrons and holes as described above is not performed at the interface of the silicon covered with the Ni film, and therefore no gap due to the etching of the silicon is generated. Silicon does not cause abnormal etching.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a sectional view showing an essential part of one embodiment of the present invention. The Si pellet 8 of the diode piece which is laminated and whose surface is etched (here, for simplification of description, a single Si pellet) is sandwiched between the n layer 1 and the p layer 2 on the upper side and n ⁺ on the lower side. The amorphous Ni film 15 in which the layer 3 is formed and the surface of the p layer 2 and the n + layer 3 is doped with 8% by weight of phosphorus atoms is used as an electrode through the Ni-Si layer 16 (sinter layer containing phosphorus atoms). The lead wire 10 is soldered 9 on the Ni film 15 and the Si pellet 8 is covered with the mold resin 20. The abnormal etching portion 13 (FIG. 4A) does not occur in the Ni—Si layer 16 sandwiched between the Ni film 7 and the n ⁺ layer 3 as in the case where the electrode is formed by the conventional Ni film 7. The manufacturing process is different from the conventional one in that an amorphous Ni film 15 doped with 8% by weight of phosphorus atoms is used for the electrode instead of a simple Ni film 7 (FIG. 4A). Since it is the same as the conventional process, it is omitted here. By the mechanism described above, the Ni film 15 that is amorphous and doped with phosphorus atoms is formed as an electrode, so that the passive film is formed on the Ni film 15, and the Ni-Si constituting the Ni film 15 is formed. The layer 16 (Ni / silicon sinter layer) is not abnormally etched even in an aqueous solution of KOH. Therefore, the exchange of electrons or holes between the n ⁺ layer 3 covered with the Ni—Si layer 16 and the etchant is cut off. Abnormal etching at the interface between the layer 16 and the n ⁺ layer 3 is prevented. A similar effect can be expected with an amorphous Ni film doped with boron atoms instead of phosphorus atoms. When the doping amount of phosphorus atoms is less than 8% by weight, the effect as a passive film is weak and abnormal etching occurs.
[0010]
【The invention's effect】
According to the present invention, an amorphous Ni film doped with 8% by weight or more of phosphorous atoms of electroless plating is used as an electrode of a silicon element, so that the surface by a KOH aqueous solution for ensuring the withstand voltage of a high voltage diode. The etching prevents the Ni film from being abnormally etched, and as a result, abnormal etching of the silicon (n + layer) at the interface is prevented. Therefore, it is possible to reduce the chip size and cost without reducing the effective area.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an essential part of one embodiment of the present invention. FIG. 2 is a process diagram sequentially illustrating steps (a) to (e) in forming a conventional diode. ) Is a process diagram sequentially showing the process following FIG. 2 (e). FIG. 4 is a state in which FIG. 3 (b) is etched, (a) is an etching state diagram in a KOH aqueous solution, and (b) is a mixed acid solution. FIG. 5 is a diagram for explaining the mechanism that causes abnormal etching of silicon at the electrode interface during etching, where (a) is an energy diagram of silicon, and (b) is a diagram illustrating oxidation and reduction potentials of an etchant. [Explanation of symbols]
1 n layer 2 p layer 3 n ⁺ layer 4 lifetime killer 5 grinding surface 6 Ni-Si layer 7 Ni film 8 Si pellet 9 solder 10 lead wire 12 normal etching part 13 abnormal etching part 15 Ni film (amorphous)
16 Ni-Si layer (containing phosphorus atoms)
20 Mold resin

Claims (1)

An amorphous nickel film electrode containing 8% by weight or more of phosphorus atoms is formed on the n-type conductive layer of the silicon element, and a Ni-Si layer is formed between the n-type conductive layer and the nickel film. A method for manufacturing a semiconductor device, wherein surface etching is performed with a KOH aqueous solution.

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