JP3592371B2 - Solar clock - Google Patents

Description

[0001]
[Industrial applications]
The present invention relates to an improvement in startability at the time of quick start in an electronic timepiece provided with a motor load driven by a solar cell, a large-capacity capacitor as a capacitor, and a small-capacity capacitor for quick start.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a long-life electronic timepiece that does not require battery replacement by combining a solar cell and an electric double-layer type large-capacity capacitor has been commercialized. However, since the large-capacity capacitor has a large capacity, if the electronic timepiece is completely discharged once, for example, when it is left in a dark place, even if it is brought out to a bright place next and exposed to light, it will reach the operation start voltage of the clock circuit. It takes a long time to charge, and there is a problem that it takes too much time to start the operation of the watch. However, a proposal for solving this problem is made in Japanese Patent Publication No. 4-80355.
[0003]
In this system, a large capacity capacitor is not charged until a voltage generated by a solar cell exceeds a predetermined value, and a clock circuit is operated only by a small capacity capacitor to realize a quick start. However, this method has a problem that the large-capacity capacitor is not charged indefinitely depending on the irradiation conditions when light is applied from the state of being discharged once. In other words, when the solar cell clock resumes light irradiation, if the generated voltage of the solar cell can only obtain the illuminance enough to maintain the minimum operation start voltage, the clock circuit starts operation with a small capacitor, There is a possibility that the charging of the capacitor will not be performed forever.
[0004]
Therefore, while the solar cell is illuminated, the clock circuit is operated by the small-capacitance capacitor.If the light does not strike even a little, the clock circuit stops operating because no voltage is supplied from the large-capacity capacitor. Will be. That is, in an office or a store under slightly dark illumination, a large-capacity capacitor does not function as a secondary battery.
[0005]
A method for solving the above problem is proposed in Japanese Utility Model Publication No. 5-34196. In this method, large-capacity capacitors and small-capacity capacitors are charged in a time-division manner, and at the time of quick start, small-capacity capacitors that are charged by solar cells are used to drive the motor load. It is possible to reliably charge a large-capacity capacitor even under illumination. This will be described below with reference to the drawings.
[0006]
FIG. 5 is a block diagram of a conventional solar clock, 10 is an electric double layer type large capacity capacitor, 11 is a small capacity capacitor, 4 is a small capacity capacitor 11, an N-type transistor for charging, and 7 is a large capacity capacitor 10. A P-type transistor for charging, 8 is a diode for preventing backflow to the solar cell, 9 is a solar cell, 12 is a comparator, and 40 is a clock circuit, which has a function of driving the motor coil 50.
The solar cell 9 generates an electromotive force by light irradiation and functions as a primary power supply. A large-capacity capacitor 10 connected to the solar cell 9 via a backflow prevention diode 8 and a P-type transistor 7 is charged by the solar cell 9 and functions as a secondary power supply. The small-capacity capacitor 11 connected to the solar cell 9 via the backflow prevention diode 8 and the N-type transistor 4 is charged by the solar cell 9 to a voltage that can drive the clock circuit 40 in a very short time. When the voltage of the large-capacity capacitor 10 is reduced to such an extent that the clock circuit 40 cannot be driven, power is supplied to the clock circuit 40 instead. The comparator 12 compares the potential of the large-capacity capacitor 10 with the potential of the small-capacity capacitor 11, and outputs an L-level output when the large-capacity capacitor 10 is sufficiently charged. An H level output is transmitted. The clock circuit 40 controls the gate inputs of the N-type transistor 4 and the P-type transistor 7 in a time-sharing manner when an H-level signal is input from the comparator 12, and switches the N-type transistor 4 and the P-type transistor 7 when an L-level signal is input. Control to ON state. The large-capacity capacitor 10 is connected via the N-type transistor 4 and the P-type transistor 7, and the small-capacity capacitor 11 is directly connected to a load circuit composed of the clock circuit 40 and the motor 50, and supplies power thereto. .
[0007]
Next, the operation of the conventional example will be described with reference to FIG. First, the quick start operation will be described. The quick start means that when the solar cell 9 is not irradiated with light for a long time, the large-capacity capacitor 10 and the small-capacitance capacitor 11 are completely discharged, and the operation is completely stopped, and then the solar cell 9 is irradiated with light. This is the function to restart the operation.
When light is applied to the solar cell 9, a predetermined electromotive force is generated in the solar cell 9, and the small capacity of the solar cell 9, the small-capacity capacitor 11, the N-type transistor 4, the backflow prevention diode 8, and the solar cell 9 is obtained. A charging circuit for the capacitor 11 is formed, and charging of the small-capacity capacitor 11 is started. Since the small-capacity capacitor 11 has a small capacity, the small-capacity capacitor 11 is charged in a short time to such an extent that the clock circuit 40 can be driven.
[0008]
When the clock circuit 40 starts operating, the comparator 12 starts operating. At this time, the charging of the large-capacity capacitor 10 has not yet started, while the small-capacitance capacitor 11 has been sufficiently charged, and the output of the comparator 12 becomes H level. The clock circuit 40 receives the H-level control signal from the comparator 12 and controls the gates of the N-type transistor 4 and the P-type transistor 7 in a time-sharing manner. As shown in FIGS. 6 (d) and 6 (e), the control signal has an H level for 1/4 second and a L level for 3/4 second in a 1 second cycle. The N-type transistor 4 and the P-type transistor 7 are alternately turned on, the N-type transistor 4 is turned on for 1/4 second, and the P-type transistor 7 is turned on for 3/4 second. . As a result, during 1/4 second when the N-type transistor 4 is turned on, a charging circuit for the small-capacity capacitor 11 such as the solar cell 9, the small-capacity capacitor 11, the N-type transistor 4, the backflow prevention diode 8, and the solar cell 9 is formed. Then, the small-capacity capacitor 11 is charged. For 3/4 seconds when the P-type transistor 7 is turned on, a charging circuit for the large-capacity capacitor 10 including the solar cell 9, the large-capacity capacitor 10, the P-type transistor 7, the backflow prevention diode 8, and the solar cell 9 is formed. The capacitance capacitor 10 is charged. The motor 50 outputs a hand movement signal once per second according to a control signal from the clock circuit 40. Since the hand movement timing (FIG. 6 (G)) is synchronized with the fall of the 1 Hz signal (FIG. 6 (A)), the hand movement timing is the period for charging the small capacitor 11 (FIG. 6 (F)). I have.
In other words, after the quick start, charging of the small-capacity capacitor 11 for 1/4 second in a cycle of 1 second and subsequently charging of the large-capacity capacitor 10 for 3/4 second are repeated (time-division charging operation).
[0009]
When the time-division charging operation is continued and a predetermined time has elapsed, the large-capacity capacitor 10 is sufficiently charged, and its voltage becomes sufficient to drive the clock circuit 40, and is higher than the voltage of the small-capacity capacitor 11. Then, the output of the comparator 12 becomes L level. The clock circuit 40 to which this is input outputs an H-level control signal to the gate of the N-type transistor 4 and an L-level control signal to the gate of the P-type transistor 7. (FIG. 6 (b) (c)) Therefore, both the N-type transistor 4 and the P-type transistor 7 are always in the ON state, and the small-capacity capacitor 11 and the large-capacity capacitor 10 are connected in parallel.
[0010]
[Problems to be solved by the invention]
However, in the method disclosed in Japanese Utility Model Publication No. 5-34196, at the time of quick start, the charging time from the solar cell to the small-capacity capacitor is as short as 1/4 second. There is a problem that the possibility that the motor is turned at the hand movement timing is low.
An object of the present invention is to solve the above problem and to provide a solar battery timepiece in which the possibility of the motor turning at the first hand movement timing at the time of quick start is improved.
[0011]
[Means for Solving the Problems]
The configuration of the present invention for achieving the above object is as follows. And solar cells, and relatively small capacity small capacitor which is charged without passing through the switch means by said solar cell, and the large-capacitance capacitor which is charged via a switching means from the solar cell, the small capacitor and A time-division signal generation circuit that generates a time-division signal for time-division charging of the large-capacity capacitor, and a clock circuit having a drive signal generation circuit that outputs a motor drive signal, when charging by the solar cell is started In an electronic timepiece that is quick-started by the small capacitor,
At the time of the quick start, until the motor drive signal is output for the first time, the time division signal output from the time division signal generation circuit causes the solar cell to charge only the small capacity capacitor. It is characterized in that it is configured to be controlled .
Further, at the time of the quick start, the switch means is held in an OFF state by a time division signal output from the time division signal generation circuit until a motor drive signal is output for the first time.
[0012]
Furthermore, a voltage detection circuit for detecting the voltage of the large-capacity capacitor is provided, and when the detection result of the voltage detection circuit indicates that the large-capacity capacitor is sufficiently charged, the detection from the voltage detection circuit is performed. The output of the time-division signal from the time-division signal generation circuit is stopped by a signal, and the control signal for constantly turning on the switch means is output from the time-division signal generation circuit.
Further, a voltage detection circuit for detecting the voltage of the large-capacity capacitor is provided, and when it is detected from the detection result of the voltage detection circuit that the large-capacity capacitor is sufficiently charged, the large-capacity capacitor is connected to the large-capacity capacitor. The capacitor is configured to be connected in parallel with the capacitance capacitor.
Further, the switch means is a charging transistor of an Nch type transistor.
[0013]
【Example】
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of a solar battery timepiece according to the present invention, in which 9 is a solar battery, 10 is an electric double layer type large-capacity capacitor, and 40 is a timepiece circuit having a function of driving a motor coil 50. 1 is a time division means, 8 and 13 are diodes for preventing backflow to the solar cell 9, 11 is a small capacity capacitor, 2 is a diode for preventing backflow to the large capacity capacitor 10, and 12 is a voltage detection circuit. In the above configuration, the same numbers as those in FIG. 5 indicate the same elements and perform the same operations.
[0014]
FIG. 2 is a block diagram showing details of the clock circuit 40 in FIG. FIG. 3 is a waveform diagram of one embodiment of the present invention. 41 is a crystal oscillation circuit, 42 is a frequency divider circuit, 43 is a motor drive signal generation circuit, 44 is a motor drive circuit, 46 is a start detection circuit that detects circuit start by power-on or the like, and 48 is a pulse circuit.
Reference numeral 45 denotes a time-division signal generating circuit which receives a signal from the frequency dividing circuit 42, and receives an H-level voltage detection signal Pk from the voltage detection circuit 12 to the control terminal C1 at a period of one second from the Q output. An L-level time-sharing signal Pc (FIG. 3E) is output for 1/4 second and an H-level for 3/4 seconds, and an H-level time-sharing signal Pch is output when the L-level voltage detection signal Pk is input. I do. When a time-division prohibition signal Pp from a later-described time-division prohibition control circuit 47 is input to the control terminal C2, an L-level time-division signal Pcl is output from the Q output irrespective of H and L of the control terminal C1. Is done.
Reference numeral 47 denotes a time-division prohibition control circuit, which is configured by a set-priority flip-flop with set / reset (hereinafter abbreviated as SR-FF), and receives a start signal Ps from a start detection circuit 46 at an S terminal. And a Q output from the Q output, and when a 1 Hz signal (FIG. 3A) from the frequency dividing circuit 42 is input to the R terminal via the pulsing circuit 48, the time division inhibiting signal Pp is released. Is done.
[0015]
Next, the operation will be described. First, the quick start operation will be described. When light is applied to the solar cell 9, a predetermined electromotive force is generated in the solar cell 9, and a charging circuit for the small-capacity capacitor 11 such as the solar cell 9, the small-capacity capacitor 11, the backflow prevention diode 8, and the solar cell 9. , And charging of the small-capacity capacitor 11 is started. In this state, the clock circuit 40 has not started operating, and the time-sharing means 1 is not in the ON state, so that the large-capacity capacitor 10 is not charged.
[0016]
When the charging voltage of the small capacitor 11 reaches the operation start voltage of the clock circuit 40, the clock circuit 40 starts operating. First, the activation signal Ps (FIG. 3 (b)) is output from the activation circuit 46 shown in FIG. 2, and the time division inhibition signal Pp (FIG. 3 (d)) is output from the Q output of the time division inhibition control circuit 47. . Next, the crystal oscillation circuit 41 and the frequency dividing circuit 42 also start operating. The time-division signal generation circuit 45 receives the signal group from the frequency dividing circuit 42 to generate the time-division signal Pc. However, since the time-division inhibition signal Pp is input to the control terminal C2, the L-level time-division signal is output. The signal Pcl is output. Since the time division means 1 is turned off when the L level signal is inputted as a gate, a charging circuit for the small capacity capacitor 11, such as the solar cell 9, the small capacity capacitor 11, the backflow prevention diode 8, and the solar cell 9, is constituted again. .
[0017]
After one second from the quick start, when a 1 Hz signal (FIG. 3A) from the frequency dividing circuit 42 is input to the R terminal of the time division prohibition control circuit 47 via the pulsing circuit 48, the time division prohibition signal Pp is released. The time-division signal generation circuit 45 stops outputting the L-level time-division signal Pcl from the Q output because the time-division inhibition signal Pp is no longer input to the control terminal C2. That is, only the small-capacity capacitor 11 is charged for the first second after the quick start.
At the same time, in synchronization with the fall of the 1 Hz signal shown in FIG. 3A, the drive signal generation circuit 43 outputs the motor drive signal Pm (FIG. 3C), and the drive signal Po1 is output via the coil terminal O1. It is supplied to the motor coil 50.
[0018]
Since the H-level voltage detection signal Pk is input to the control terminal C1, the time-division signal generating circuit 45 outputs the L-level and the H-level time-division signal for 1/4 second and 3/4 second from the Q output. Output Pc. Since the time division means 1 using the time division signal Pc as a gate signal is OFF when the time division signal Pc is L, the voltage generated by the solar cell 9 charges only the small capacity capacitor 11 via the diode 8, The clock circuit 40 is operated by the charging voltage of the capacitance capacitor 11, but when the time-division signal Pc becomes H, the time-division means 4 is turned on, so that the generated voltage of the solar cell 9 is passed through the diode 13 and the time-division means 1. The large-capacity capacitor 10 is also charged. At this time, the small-capacity capacitor 11 is connected in parallel via the diode 8, but at the time of quick start, the charging voltage of the large-capacity capacitor 10 is low and the charging voltage of the small-capacity capacitor 11 is high. The voltage is charged in the large-capacity capacitor 10 having a low voltage, and as a result, the diode 8 is reverse-biased, so that the small-capacity capacitor 11 is not charged and is substantially disconnected from the solar cell 9.
That is, charging of the small-capacity capacitor 11 for 1/4 second at a cycle of 1 second and subsequent charging of the large-capacity capacitor 10 for 3/4 seconds are repeated (time-division charging operation).
[0019]
When the illuminance is low and the voltage detection signal Pk is in the H state, the clock circuit 40 is operated in the quick start state by the voltage charged in the small capacitor 11 while the time division signal Pc is in the L state. While the divided signal Pc is H, the voltage of the large capacity capacitor 3 is gradually increased by charging the large capacity capacitor 3.
[0020]
When the charging voltage rises due to sufficient charging of the large-capacity capacitor 10, the voltage detection signal Pk from the voltage detection circuit 12 is inverted to L. As a result, the time-division signal generation circuit 45 outputs the H-level time-division signal Pch, so that the time-division means 1 is kept in the ON state, and the small-capacity capacitor 11 and the large-capacity capacitor 10 are connected via the backflow prevention diode 2. Are connected in parallel.
[0021]
FIG. 4 is a waveform chart showing another embodiment of the present invention. Those having the same numbers as those in the waveform diagram of FIG. 3 perform the same operation.
(A) is a 1 Hz signal, (b) is a start signal Ps, and (d) is a time division inhibition signal Pp which is set by the start signal Ps and reset by a 1 Hz pulse signal, and is output only for one second after quick start. You. (E) is a time division signal Pc of H level for 3/4 seconds and L level of 1/4 second in a one second cycle. The L level time division signal Pcl is output only when the time division inhibition signal Pp is output. The hand movement timing (c) is the charging timing of the large-capacity capacitor 10.
[0022]
In the time-division signal Pc shown in FIG. 4E, the first 3/4 second of the 1-second cycle is at the H level, which is the timing for charging the large-capacity capacitor 10. Therefore, the configuration in which the time-division signal Pcl of the L level is output and the small-capacity capacitor 11 is charged only for one second after the quick start as in the present invention is particularly effective.
[0023]
As described above, in the present invention, only the small capacitor 11 is charged by the L-level time division signal Pcl output from the time division signal generation circuit 45 until the first motor drive signal Pm is output at the time of quick start. Thereafter, the large-capacity capacitor 10 is charged while the time-division signal Pc is at the H level, the small-capacity capacitor 11 is charged during the L-level, and when the large-capacity capacitor 10 is sufficiently charged, The large capacity capacitor 10 and the small capacity capacitor 11 are connected in parallel by the divided signal Pch.
[0024]
【The invention's effect】
As described above, according to the present invention, even when the illuminance is low, the small-capacity capacitor is charged by the time-division signal until the first motor drive signal is output. Even if the generated voltage of the battery can obtain only the illuminance enough to maintain the minimum operation start voltage, at the time of quick start, there is a great effect of improving the possibility of the motor turning at the first hand movement timing.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a solar battery timepiece of the present invention.
FIG. 2 is a block diagram showing details of a clock circuit according to the present invention.
FIG. 3 is a waveform diagram of the present invention.
FIG. 4 is a waveform chart showing another embodiment of the present invention.
FIG. 5 is a block diagram showing a conventional solar battery timepiece.
FIG. 6 is a conventional waveform diagram.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 time division means 2 backflow prevention diodes 8, 13 backflow prevention diodes 9 solar cell 10 large capacity capacitor 11 small capacity capacitor 12 voltage detection means 40 clock circuit 42 frequency divider circuit 43 drive signal generation circuit 45 time division signal generation circuit 46 start detection circuit 47 Time-division prohibition control circuit 48 Pulsing circuit 50 Motor coil

Claims (5)

And solar cells, and relatively small capacity small capacitor which is charged without passing through the switch means by said solar cell, and the large-capacitance capacitor which is charged via a switching means from the solar cell, the small capacitor and A time-division signal generation circuit that generates a time-division signal for time-division charging of the large-capacity capacitor, and a clock circuit having a drive signal generation circuit that outputs a motor drive signal, when charging by the solar cell is started In an electronic timepiece that is quick-started by the small capacitor,
At the time of the quick start, until the motor drive signal is output for the first time, the time division signal output from the time division signal generation circuit causes the solar cell to charge only the small capacity capacitor. A solar battery timepiece characterized in that it is controlled . Before SL Quick Star - DOO time, until the first motor driving signal is output, according to claim wherein said switch means by a dividing signal when output from the time division signal generating circuit is characterized in that it is held in the OFF state 2. The solar cell clock according to 1. A voltage detection circuit for detecting the voltage of the large-capacity capacitor is provided, and when the detection result of the voltage detection circuit indicates that the large-capacity capacitor is sufficiently charged, a detection signal from the voltage detection circuit is used. 2. The control method according to claim 1, wherein the output of the time-division signal from the time-division signal generation circuit is stopped, and a control signal for constantly turning on a switch is output from the time-division signal generation circuit. Item 3. A solar cell watch according to any one of Items 2. A voltage detection circuit for detecting a voltage of the large-capacitance capacitor; and when the detection result of the voltage detection circuit indicates that the large-capacity capacitor is sufficiently charged, the small-capacity capacitor and the large-capacity capacitor are provided. 4. The solar cell timepiece according to claim 1, wherein the solar cell timepiece is configured to be connected in parallel. 5. The solar cell timepiece according to claim 1, wherein said switch means is a charging transistor of an Nch type transistor.

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