JP3582193B2 - Liquid crystal display device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having an auxiliary capacitance for compensating a storage amount of capacitance in a pixel portion.
[0002]
[Prior art]
Conventionally, as this type of liquid crystal display device, one having a structure of a pixel portion as shown in FIG. 7 and a wiring arrangement structure as shown in FIG. 8 is known. In this liquid crystal display element, as shown in FIGS. 7A and 7B, a capacitance is accumulated between the opposing auxiliary capacitance line 1 and the pixel electrode 2. The auxiliary capacitance line 1 extends along each pixel column (in the horizontal direction in the figure). FIG. 7B is a sectional view taken along line YY of FIG. As shown in FIG. 1B, a gate insulating film 3 is laminated and interposed between the opposing auxiliary capacitance line 1 and the pixel electrode 2, so that an auxiliary capacitance is formed. . Further, in the figure, reference numeral 5 denotes a data signal wiring formed for each pixel row, 6 denotes a thin film transistor, and 7 denotes a selection signal line (scanning line). FIG. 8A is an explanatory plan view of the auxiliary capacitance line 1 arranged over the entire liquid crystal display area, and FIG. 8B is a sectional view taken along the line Z-Z of FIG. As shown in FIG. 1A, both ends of the auxiliary capacitance wiring 1 are provided with contact holes 8A in first ring wirings 8, 8 formed along the row direction (vertical direction in the drawing) on both sides of the liquid crystal display area. Connected through. The first ring wirings 8, 8 are connected to each other via contact holes 9A to second ring wirings 9, 9 formed along the column direction above and below the liquid crystal display area. All of these auxiliary capacitance lines 1 to 1 are connected to the first and second ring lines 8 and 9 so that a constant voltage is applied. By providing the auxiliary capacitance line 1 in this manner, the state of the liquid crystal is maintained from the time of selection of the selection signal line to the time of the next selection, thereby enabling a liquid crystal display with good contrast.
[0003]
[Problems to be solved by the invention]
However, in the above-described liquid crystal display element, there is a problem that when a disconnection occurs in one auxiliary capacitance line 1, the entire pixels in one column in the liquid crystal display element are adversely affected.
[0004]
An object of the present invention is to take what measures should be taken to obtain a liquid crystal display element with a high yield, which can prevent the adverse effect caused by the disconnection of the auxiliary capacitance wiring.
[0005]
[Means for Solving the Problems]
In the invention according to claim 1, one substrate provided with pixel electrodes arranged in a column direction and a row direction and a thin film transistor connected to the pixel electrode is provided, and a common electrode is provided facing the pixel electrode. In a liquid crystal display element in which liquid crystal is interposed between the other substrate,
The thin film transistor is formed of the same material film as one of a gate electrode and a drain electrode, and each of the first capacitance wiring extends in a column direction of the pixel electrode, and extends in a row direction of the pixel electrode. A plurality of auxiliary capacitance wiring units having a second capacitance wiring connected to the first capacitance wiring;
The auxiliary capacitance wiring unit, which is formed of the same material film as the other of the gate electrode and the drain electrode of the thin film transistor, each extending in the row direction of the pixel electrode and corresponding to the pixel electrode adjacent in the row direction A plurality of connection wiring parts for connecting each other,
A row-direction ring wiring connected to the plurality of auxiliary capacitance wiring units at a periphery of a liquid crystal display area;
A column direction ring wiring connected to the plurality of auxiliary capacitance wiring units at the periphery of a liquid crystal display area and connected to the row direction ring wiring;
It is characterized by having.
[0006]
According to the first aspect of the present invention, since the auxiliary capacitance wiring is connected in a plurality of directions, even if the auxiliary capacitance wiring unit is partially disconnected, the auxiliary capacitance wiring unit is connected to another auxiliary capacitance wiring unit via the connection wiring part. Since the pixel electrodes are connected, the pixel electrodes can have the same potential, so that deterioration of display characteristics can be reduced. Further, since the auxiliary capacitance wiring unit and the connection wiring portion are formed on the same surface as the respective electrodes of the thin film transistor, they can be formed collectively using the same members as those electrodes.
[0007]
The invention according to claim 2 is characterized in that the auxiliary capacitance wiring unit and the connection wiring portion are connected to each other via a contact hole provided in a gate insulating film of the thin film transistor. According to the second aspect of the present invention, since the capacitance can be formed using the gate insulating film, it is not necessary to newly form a capacitance insulating film.
[0009]
According to a third aspect of the present invention, the first capacitance line of the auxiliary capacitance line unit is arranged between the two adjacent columns of the pixel electrodes in the column direction via the gate insulating film of the thin film transistor. It is characterized by being extended so as to overlap the pixel electrode. According to the third aspect of the present invention, since the number of auxiliary capacitance wiring units is reduced, the yield in wiring formation can be improved.
[0010]
The invention according to claim 4 , wherein the thin film transistor has a blocking insulating layer on a semiconductor layer thereof, and the same gate insulating film as the blocking insulating layer between the pixel electrode and the auxiliary capacitance wiring unit. And an insulating layer obtained by patterning this film . In the invention according to claim 4, an insulating layer formed collectively with the blocking insulating layer can be used in addition to the gate insulating film, so that the thickness of the gate insulating film according to the on / off characteristics of the thin film transistor is reduced. The thickness of the insulating layer can be set in order to obtain a sufficient thickness as the capacitance.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, details of a liquid crystal display device according to the present invention will be described based on embodiments shown in the drawings.
(Embodiment 1)
1 to 3 show a first embodiment of the present invention. 1A is a plan view showing one pixel portion of this embodiment, FIG. 1B is a cross-sectional view taken along line XX of FIG. 1A, and FIG. FIG. 2 is a plan view showing a connection structure between a storage capacitor electrode portion in a pixel portion and a ring wiring in a column direction, and FIG. 3 is a connection structure between a storage capacitor wiring unit and a ring wiring in a row direction and a row direction. FIG. 6 is a plan view showing a connection structure between the ring wiring of FIG.
[0012]
In the present embodiment, a thin film transistor (TFT) is used as a switching element, and the present invention is applied to a liquid crystal display element in which pixels are arranged in stripes. 1 to 3 show the structure on the TFT substrate side of the liquid crystal display element according to the present embodiment. In describing the present embodiment, the configurations of the common electrode substrate facing the TFT substrate, and the liquid crystal and the alignment film interposed in the gap between the TFT substrate and the common electrode substrate are well-known. Description is omitted.
[0013]
First, on the TFT substrate in the liquid crystal display element according to the present embodiment, as shown in FIG. 1A, a plurality of gate lines 11 as selection signal lines are arranged in the pixel column direction (FIG. Middle left and right directions). The gate line 11 has a gate electrode portion 11A formed to extend laterally (in a direction perpendicular to the gate line). The gate line 11 is formed by patterning a metal material film such as aluminum or tantalum. At the time of this patterning, the auxiliary capacitance wiring unit 12 is formed simultaneously with the same material film. The auxiliary capacitance wiring unit 12 extends in the column direction as a whole similarly to the gate line 11, but partially has a plurality of auxiliary capacitance electrode portions 12A extending downward at predetermined intervals. It is formed every time. In FIG. 1A, reference numeral 13 denotes a pixel electrode made of ITO (indium oxide). The pixel electrode 13 is formed such that its periphery is opposed to the auxiliary capacitance electrode portion 12A. Although not shown in FIG. 1A, the gate insulating film 14 and the silicon nitride film 15 shown in FIG. 1B are stacked between the pixel electrode 13 and the auxiliary capacitance electrode portion 12A. The storage capacitor is formed in the region shown by hatching in FIG. Note that, as shown in FIG. 1A, a cutout portion 13A is formed in the pixel electrode 13 so as not to overlap the gate electrode portion 11A. Notches 13B and 13C are formed in the pixel electrode 13 above the distal end and the base end of the auxiliary capacitance electrode portion 12A, respectively.
[0014]
A gate insulating film 14 is formed on the gate electrode 11A, and a semiconductor layer 16 made of, for example, amorphous silicon is patterned on the gate insulating film 14. On the semiconductor layer 16, a source electrode 17 connected to the pixel electrode 13 and a drain electrode 18A integrated with a drain line 18 as a signal line are provided separately. The drain line 18 extends in the row direction, and runs on the side of the column of the pixel electrode 13 in the row direction. As shown in FIG. 1C, a TFT (thin film transistor) 19 has an inverted staggered structure, and a gate electrode portion 11A formed integrally with an auxiliary capacitance electrode portion 12A and a gate made of silicon nitride or silicon oxide. An insulating film 14, a semiconductor layer 16 made of a-Si formed on the gate insulating film 14, a blocking layer 4 for protecting the semiconductor layer 16 from etching during patterning of source / drain electrodes, and a source electrode 17, And a drain electrode 18A. The blocking layer 4 is obtained by patterning the same film as the silicon nitride film 15.
[0015]
The above-described auxiliary capacitance wiring unit 12 is formed so that an auxiliary capacitance is formed by an auxiliary capacitance electrode portion 12A opposed to one column of pixel electrodes 13 located on the side, but adjacent to each other in a row direction. The auxiliary capacitance wiring units 12 are electrically connected to each other via a connection wiring part 20 as shown in FIG. That is, as shown in the figure, the adjacent auxiliary capacitance wiring units 12 are connected to each other through the contact hole 20A at the tip of one auxiliary capacitance electrode portion 12A and one end of the connection wiring portion 20. The other end of the connection wiring section 20 and the base end of the auxiliary capacitance electrode section 12A of the auxiliary capacitance wiring unit 12 are connected via a contact hole 20B. FIG. 1B shows a cross section of a portion where the connection wiring portion 20 is formed, and shows that the auxiliary capacitance wiring units 12 are connected across the gate line 11. In FIG. 1B, the connection wiring portion 20 is formed by patterning the same material film as the source electrode 17 and the drain electrode 18A at a time, and reference numeral 21 denotes a transparent substrate made of glass or the like.
[0016]
FIG. 2 shows a connection structure between the above-described auxiliary capacitance wiring unit 12 and a column direction ring wiring 22 formed on the periphery of the liquid crystal display area. In the figure, reference numeral 23 denotes a connection wiring portion for connecting the pixel electrode 13 located at the outermost position among the pixel electrodes 13 existing in the liquid crystal display area to the auxiliary capacitance wiring unit 12. The column direction ring wiring 22 is formed simultaneously with the same material film as the gate line 11 and the auxiliary capacitance wiring unit 12. The column direction ring wiring 22 and the tip of the auxiliary capacitance electrode portion 12A of the outermost auxiliary capacitance wiring unit 12 are connected via a connection wiring portion 23. The tip of the portion 12A is connected via a contact hole 23A. Further, the column direction ring wiring 22 and the connection wiring part 23 are connected via a contact hole 23B. Note that the contact holes 23A and 23B are formed penetrating the gate insulating film 14 and the silicon nitride film 15.
[0017]
FIG. 3 is an explanatory plan view showing a connection structure between the above-described auxiliary capacitance wiring unit 12, the row direction ring wiring 24 formed on the periphery of the liquid crystal display area, and the column direction ring wiring 22. Note that FIG. 3 does not show a pixel electrode, a gate line, a TFT, and the like. As shown in the figure, the row direction ring wiring 24 is connected to an end of the column direction ring wiring 22 via a contact hole 24A. The gate insulating film 14 and the silicon nitride film 15 shown in FIG. 1B are interposed between the row direction ring wiring 24 and the column direction ring wiring 22. Therefore, the contact hole 24A is formed penetrating these films. Note that an end of the row direction ring wiring 24 is provided integrally with a connection wiring part 25 for connecting to the auxiliary capacitance wiring unit 12 located at a corner in the liquid crystal display area. Further, the column direction ring wiring 24 and the end of each auxiliary capacitance wiring unit 12 are connected via a contact hole 24B.
[0018]
In the present embodiment, with such a configuration, the voltage of the auxiliary capacitance wiring unit 12 is supplied not only from the row-direction ring wiring 24 but also from the column-direction ring wiring 22 through the connection wiring portions 23, 20, and 25. Since the application can be performed, the electric resistance value can be reduced. Accordingly, it is possible to reduce the potential difference between the auxiliary capacitance electrode portions 12A. Further, in the present embodiment, even when a disconnection occurs in the auxiliary capacitance wiring unit 12, the adverse effect of the disconnection can be minimized because the entire auxiliary capacitance wiring is formed in a mesh shape (or a lattice shape). .
[0019]
Further, in the present embodiment, the wiring portion of the auxiliary capacitance wiring unit 12 is exposed to light when the gate line 11 (including the gate electrode portion 11A) and the source / drain electrodes 17 and 18A of the TFT 19 are patterned by a photolithography process. Since they can be formed simultaneously only by changing the mask, the number of steps is not increased.
[0020]
(Embodiment 2)
In the first embodiment described above, the present invention is applied to a liquid crystal display element having a pixel arrangement in a stripe arrangement. Next, a second embodiment in which the present invention is applied to a liquid crystal display element having a pixel arrangement in a delta arrangement. Will be described. FIG. 4 is a plan view of a pixel electrode portion formed on the TFT substrate of the liquid crystal display element according to the present embodiment.
[0021]
In the present embodiment, as shown in the figure, the pixel electrodes 31 have a delta arrangement, and the auxiliary capacitance wiring units 32 are formed along the columns of the respective pixel electrodes 31. As shown in the drawing, the auxiliary capacitance wiring unit 32 forms an auxiliary capacitance in opposition to the pixel electrode 31 in a region indicated by oblique lines. Note that a gate insulating film and a silicon nitride film are interposed between the auxiliary capacitance wiring unit 32 and the pixel electrode 31 as in the first embodiment.
[0022]
The auxiliary capacitance electrode portion 32A of the auxiliary capacitance wiring unit 32 extends toward an adjacent pixel column along one side of the pixel electrode 31 extending in the row direction. As shown in FIG. 4, the end of the auxiliary capacitance electrode portion 32A does not face the pixel electrode 31. The end of the auxiliary capacitance electrode portion 32A and the adjacent auxiliary capacitance wiring unit 32 are connected by a connection wiring portion. The connection wiring portion 34 is formed by collective patterning using the same material film as the source electrode 35 and the drain electrode 36A of the TFT 33, as in the first embodiment. The connection wiring part 34 and the end of the auxiliary capacitance electrode part 32A are connected by a contact hole 34A, and the connection wiring part 34 and the adjacent auxiliary capacitance wiring unit 32 are connected by a contact hole 34B. The corner portion of the pixel electrode 31 located at the tip of this one side is cut out in a rectangular shape to arrange the TFT 33. In adjacent pixel columns, notches formed in the pixel electrodes 31 are formed at corners in the direction opposite to the column direction. In the figure, reference numeral 36 denotes a drain line, which runs zigzag between the pixel electrodes 31 in the row direction.
[0023]
Also in the present embodiment, since the auxiliary capacitance wiring unit 32 and the connection wiring part 34 can be simultaneously formed by collective patterning using metal materials such as gate lines and source / drain electrodes, the number of manufacturing steps does not increase. In the present embodiment, the auxiliary capacitance wiring unit 32 is formed so as to substantially face the pixel electrode 31 along two sides. However, as in the modification shown in FIG. The structure may be such that they face each other along the four sides.
[0024]
(Embodiment 3)
FIG. 6 is a plan view showing Embodiment 3 of the present invention. In the present embodiment, one auxiliary capacitance wiring unit is formed for two rows of pixels. That is, as shown in the drawing, the main capacitance of the auxiliary capacitance wiring unit 42 is provided between the column of the pixel electrode 41A which is a predetermined pixel column and the column of the pixel electrode 41B which is a pixel column adjacent to the pixel column. The wiring portion 42A is formed to have a width facing the edges of the pixel electrodes 41A and 41B on both sides, and the auxiliary capacitance is formed from the main wiring portion 42A along one side of the pixel electrodes 41A and 41B on both sides in the row direction. Each of the electrode portions 42B is formed. As shown in FIG. 6, adjacent storage capacitor wiring units 42 are connected to each other by the connection wiring 43 at the tips of the storage capacitor electrodes 42 </ b> B. The auxiliary capacitance electrode portions 42B of the adjacent auxiliary capacitance wiring units 42 are connected to the connection wiring portion 43 via contact holes 43A. As a result, in the entire liquid crystal display area, the auxiliary capacitance wiring is formed in a mesh shape. In the figure, reference numeral 44 denotes a TFT, and 45 denotes a drain line. In the present embodiment, since the number of auxiliary capacitance wiring units 42 may be smaller than the number of pixel columns, the aperture ratio can be further increased. In the present embodiment, the present invention is applied to a liquid crystal display element in which pixels are arranged in a stripe array. However, the present invention can be applied to a liquid crystal display element in which pixels are arranged in a delta array.
[0025]
Although the first to third embodiments have been described above, the present invention is not limited to these, and various design changes accompanying the gist of the configuration are possible. For example, in each of the above embodiments, an inverse staggered thin film transistor is used as a switching element to suppress an increase in the number of steps. However, a thin film transistor having another structure such as a staggered type may be used. An auxiliary capacitance wiring unit is provided using a drain electrode material film, and a connection wiring portion is provided using a gate electrode material film. Further, other switching elements such as MIM may be used. In each of the above embodiments, the gate insulating film and the silicon nitride film are interposed between the auxiliary capacitance wiring unit and the pixel electrode. However, it is needless to say that only the gate insulating film may be used.
[0026]
【The invention's effect】
As is apparent from the above description, according to the present invention, it is possible to prevent the adverse effect caused by the disconnection of the auxiliary capacitance wiring in the liquid crystal display element. Further, since the manufacturing can be facilitated without increasing the number of steps, there is an effect that a liquid crystal display element can be manufactured with a good yield.
[Brief description of the drawings]
1A is a plan view of a pixel portion according to Embodiment 1 of the present invention, FIG. 1B is a cross-sectional view taken along line XX of FIG. 1A, and FIG. 1C is a cross-sectional view taken along line WW of FIG.
FIG. 2 is a plan view showing a connection structure between an auxiliary capacitance wiring unit and a column-direction ring wiring according to the first embodiment.
FIG. 3 is a plan view showing a connection structure of an auxiliary capacitance wiring unit, a column direction ring wiring, and a row direction ring wiring in the first embodiment.
FIG. 4 is a plan view of a second embodiment of the present invention.
FIG. 5 is a plan view showing a modification of the second embodiment.
FIG. 6 is a plan view of a third embodiment of the present invention.
FIG. 7A is a plan view of a conventional example, and FIG. 7B is a cross-sectional view taken along the line Y-Y of FIG.
8A is a plan view of a conventional example, and FIG. 8B is a sectional view taken along the line Z-Z of FIG. 8A.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 11 Gate line 12 Auxiliary capacity wiring unit 12A Auxiliary capacity electrode part 13 Pixel electrode 14 Gate insulating film 18 Drain line 19 TFT
20 Connection wiring parts 20A, 20B Contact holes

Claims (4)

A liquid crystal is interposed between one substrate provided with a pixel electrode arranged in a column direction and a row direction and a thin film transistor connected to the pixel electrode, and another substrate provided with a common electrode facing the pixel electrode. In the liquid crystal display element interposed,
The thin film transistor is formed of the same material film as one of a gate electrode and a drain electrode, and each of the first capacitance wiring extends in a column direction of the pixel electrode, and extends in a row direction of the pixel electrode. A plurality of auxiliary capacitance wiring units having a second capacitance wiring connected to the first capacitance wiring;
The auxiliary capacitance wiring unit, which is formed of the same material film as the other of the gate electrode and the drain electrode of the thin film transistor, each extending in the row direction of the pixel electrode and corresponding to the pixel electrode adjacent in the row direction A plurality of connection wiring parts for connecting each other,
A row-direction ring wiring connected to the plurality of auxiliary capacitance wiring units at a periphery of a liquid crystal display area;
A column direction ring wiring connected to the plurality of auxiliary capacitance wiring units at the periphery of a liquid crystal display area and connected to the row direction ring wiring;
A liquid crystal display device comprising: The liquid crystal display device according to claim 1, wherein the auxiliary capacitance wiring unit and the connection wiring portion are connected to each other via a contact hole provided in a gate insulating film of the thin film transistor. Wherein said first capacitor wire storage capacitor line unit, between the two rows which are adjacent to each other in the column direction of the pixel electrode, extending so as to overlap the pixel electrode of the two columns via the gate insulating film of the thin film transistor 2. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is provided. The thin film transistor has a blocking insulating layer on its semiconductor layer, and between the pixel electrode and the auxiliary capacitance wiring unit, the gate insulating film and the same film as the blocking insulating layer are obtained by patterning. 2. The liquid crystal display device according to claim 1, wherein an insulating layer is interposed.

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