JP3537095B2 - Photoelectric conversion device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion device arranged in a matrix, and more particularly to a photoelectric conversion device in which shading is reduced when reading optical signals of respective pixels of photoelectric conversion elements arranged in a matrix. It is.

[0002]

2. Description of the Related Art FIG. 7 is a schematic explanatory view showing a conventional photoelectric conversion circuit. In FIG. 7, a photoelectric conversion element (such as a photodiode) 1 accumulates electric charge according to the amount of incident light, and is arranged in a two-dimensional manner (4 × 4 elements in the figure). One end of the photoelectric conversion element 1 has a source follower input M
Connected to the gate of OS2, source follower input MOS2
Is connected to the drain of the vertical select switch MOS3, the drain of the source follower input MOS2 is connected to the power supply terminal 5 via the power supply line 4, and the vertical select switch M
The source of OS3 is connected via a vertical output line 6 to a load current source 7, which is connected to a source follower input MO.
S2, the vertical selection switch MOS3, and the load current source 7 as a whole constitute a source follower circuit.

The signal voltage of the photoelectric conversion element 1 is generated at the gate of the source follower input MOS 2 according to the electric charge accumulated in the photoelectric conversion element of each pixel, and the signal voltage is amplified by a source follower circuit and read out.

The gate of the vertical selection switch MOS 3 is connected to a vertical scanning circuit 9 via a vertical gate line 8. The output signal of the source follower circuit is supplied to the vertical output line 6, the horizontal transfer M
The signal is output to the outside through the OS switch 10, the horizontal output line 11, and the output amplifier 12. Horizontal transfer MOS switch 10
Are connected to the horizontal scanning circuit 13, respectively.
In such a configuration, the signal voltage of each photoelectric conversion element is
The vertical selection switch MOS3 is sequentially turned on by the pulse voltage of the vertical gate line 8 connected to the vertical scanning circuit 9, and
The data is read out to each vertical line, the horizontal transfer MOS switch 10 is sequentially turned on by the shift register signal of the horizontal scanning circuit 13, and the signal voltage of each photoelectric conversion element is output from the output amplifier 12 in time series for each element. You.

[0005]

However, in the above-mentioned conventional example, since a finite resistance is distributed on the vertical output line 6, there is a problem that a signal is vertically shaded due to a decrease in the potential of the resistance. I was In order to simplify the explanation, FIG. 8 shows a schematic explanatory view in which one pixel is extracted. In the figure, reference numeral 201 denotes a resistance distributed on the vertical output line 6. Assuming that M rows of pixels are vertically arranged and the resistance value of the vertical output line for each row is r1, the total resistance between the Kth row of pixels and the horizontal transfer MOS switch 10 is r1 × K ( 1 ≦ K ≦ M) (1)

Now, let the current flowing through the load current source 7 be Ia,
Assuming that the series resistance of the vertical selection switch MOS3 is Rm, the threshold voltage of the source follower input MOS2 is Vth0, and the signal voltage on the gate of the source follower input MOS2 is Vsig0, the signal Vsig1 which is current-amplified and read by the source follower circuit is Vsig1 = Vsig0−Vth0−Ia × Rm−Ia × r1 × K (1 ≦ K ≦ M) (2) In other words, even if the same signal voltage Vsig0 is generated in the pixel portion, a difference occurs in the voltage Vsig1 read out for each row due to the potential drop due to the resistance r1 of the vertical output line 6, and vertical shading occurs. However, there is a problem that the image quality is significantly reduced.

In recent years, the development of photoelectric conversion circuits has been proceeding in the direction of further increasing the number of pixels and reducing the size. At that time, the wiring of the photoelectric conversion circuit tends to be thinner and longer,
This problem of potential drop due to the resistance r1 of the vertical output line 6 is a serious problem.

Another problem is that a finite resistance is distributed on the power supply line 4, so that the dynamic range of the source follower circuit differs for each row. This problem will be described with reference to FIG.
In the figure, reference numeral 202 denotes a resistor distributed on the power supply line 4. Assuming that M rows of pixels are vertically arranged and the resistance of the power supply line for each row is r2, the resistance between the pixel on the Kth row and the power supply terminal 5 is r2 × K (1 ≦ K ≦ M). ... (3)

Assuming that the voltage of the power supply terminal 5 is Vd,
In order for the source follower circuit to operate as a linear amplifier, the source follower input MOS 2 needs to operate in the pentode region, and the conditional expression at that time is: Vd−Ia × r2 × K> Vsig0−Vth0 (1 ≦ K ≦ M) (4) By transforming this equation, Vsig0 <Vd + Vth0−Ia × r2 × K (1 ≦ K ≦ M) (5)

Due to the potential drop due to the resistance of the power supply line 4, the value of the signal voltage deviating from the conditional expression differs depending on the row, that is, the dynamic range of the signal differs.

This results in shading of the saturation voltage or output shading on the side of the low light quantity characteristic, depending on the combination with the polarity of the photodiode 1, and the image quality is remarkably reduced.

[0012]

According to the present invention, as a means for solving the above problems, a pixel each including a photoelectric conversion element and amplifying means for amplifying signal charges accumulated in the photoelectric conversion element is provided. includes a pixel region arranged in a matrix, a vertical scanning unit and the horizontal scanning means for reading the amplified signal sequentially scanned to by the amplifying means, a signal from said amplifying means
A vertical output line but to be output, in the photoelectric conversion device load means and <br/> is provided for each column of said amplifying means, said load means, to control the direction of current flowing through the vertical output lines
A photoelectric conversion device characterized in that the photoelectric conversion device is provided on the opposite side of the pixel region for each row or a plurality of rows.

The amplifying means is a MOS type source amplifier.
A follower circuit, and is a load for the source follower circuit.
The load means is a constant current source .

[0014] In addition, horizontal projections are provided on both sides of the pixel region.
Force lines are provided, and different lines of water
An object is to provide a photoelectric conversion device which is output to a flat output line .

[0015]

[First Embodiment] FIG. 1 is a schematic explanatory view showing a first embodiment of the present invention. In the present embodiment, the constant current source 7 is provided on the side opposite to the output end of the source follower circuit in the row direction. In FIG.
The photoelectric conversion element (photodiode or the like) 1 accumulates electric charge according to the amount of incident light, and is two-dimensional (4 in FIG.
× 4 elements). One end of the photoelectric conversion element 1 is connected to the gate of the source follower input MOS2, and the source of the source follower input MOS2 is connected to the vertical selection switch MO.
Connect to the drain of S3 and connect the source follower input MO
The drain of S2 is connected to the power supply terminal 5 via the power supply line 4, and the source of the vertical selection switch MOS3 is connected to the vertical output line 6
Through to the load current source 7, which are
Source follower input MOS2 and vertical select switch MOS
3 and the load current source 7 together form a source follower circuit.

A signal voltage of the photoelectric conversion element 1 is generated at the gate of the source follower input MOS 2 in accordance with the electric charge stored in the photoelectric conversion element of each pixel, and the signal voltage is amplified by a source follower circuit and read out.

The gate of the vertical selection switch MOS 3 is connected to a vertical scanning circuit 9 by a vertical gate line 8. The output signal of the source follower circuit is supplied to the vertical output line 6, the horizontal transfer M
The signal is output to the outside through the OS switch 10, the horizontal output line 11, and the output amplifier 12. Horizontal transfer MOS switch 10
Are connected to the horizontal scanning circuit 13, respectively.
In such a configuration, the signal voltage of each photoelectric conversion element is
The vertical selection switch MOS3 is sequentially turned on by the pulse voltage of the vertical gate line 8 connected to the vertical scanning circuit 9, and
The data is read out to each vertical line, the horizontal transfer MOS switch 10 is sequentially turned on by the shift register signal of the horizontal scanning circuit 13, and the signal voltage of each photoelectric conversion element is output from the output amplifier 12 in time series for each element. You. It is desirable that the output amplifier 12 has a high input impedance such as a MOS amplifier.

FIG. 2 is a schematic explanatory view in which one pixel is extracted for simplifying the explanation. In FIG. 2, 4
01 is a resistance between the source follower and the constant current source 7,
The steady current Ia of the constant current source 7 flows into the constant current source 7 via the resistor 401. 201 is a resistance between the source follower and the output terminal.

Here, assuming that the potential at the output terminal of the source follower is Vsig1 ', Vsig1' = Vsig0-Vth0-Ia.times.Rm (6) This value is a constant value determined by the design value of the transistor and the value of the steady-state current.

As described above, the steady-state current 7 is
1, the potential Vsig1 at the connection point between the constant current source 7 and the resistor 401 has a potential difference for each pixel row read out by the resistor 401, as shown in equation (2) above. Is generated.

However, the output terminal OUT is connected to the constant current source 7
Since the resistor 201 is provided on the opposite side, only a transient current at the initial stage of reading does not flow through the resistor 201 and a steady current does not flow.
The potential Vsig2 at the connection point between 1 and the switch 10 is as follows: Vsig2 = Vsig1 ′ (7) Since no potential effect occurs due to the resistance, the shading in the vertical direction can be greatly reduced.

In the present embodiment, the source follower circuit using a constant current type load has been described as an example. However, the present invention is not limited to this, and the same effect can be obtained by using a resistance type load. can get. Needless to say, the same effect can be obtained with the inverting amplifier type.

[Second Embodiment] FIG. 3 shows a second embodiment of the present invention.
FIG. 3 is a schematic explanatory view showing the embodiment. In this embodiment, a constant current source is provided for each column on the same side as the output terminal of the source follower circuit, and the output terminals are alternately drawn up and down for each column.

In FIG. 3, photoelectric conversion elements (such as photodiodes) 1 accumulate electric charges according to the amount of incident light, and are arranged two-dimensionally (4 × 4 elements in the figure). One end of the photoelectric conversion element 1 is a source follower input MOS
2, the source of the source follower input MOS2 is connected to the drain of the vertical selection switch MOS3,
The drain of the source follower input MOS 2 is connected to the power supply line 4.
And a vertical selection switch MOS
3 are connected to a load current source 7 via a vertical output line 6, and these are connected to a source follower input MOS2.
, The vertical selection switch MOS3, and the load current source 7 as a whole constitute a source follower circuit.

A signal voltage of the photoelectric conversion element 1 is generated at the gate of the source follower input MOS 2 in accordance with the electric charge accumulated in the photoelectric conversion element 1 of each pixel, and the signal voltage is amplified by a source follower circuit and read out. is there.

The gate of the vertical selection switch MOS 3 is connected to a vertical scanning circuit 9 by a vertical gate line 8. The output signal of the source follower circuit is supplied to the vertical output line 6, the horizontal transfer M
The signal is output to the outside through the OS switch 10, the horizontal output line 11, and the output amplifier 12. Horizontal transfer MOS switch 10
Are connected to the horizontal scanning circuit 13, respectively.
In such a configuration, the signal voltage of each photoelectric conversion element 1 is read out to each vertical output line 6 by sequentially turning on the vertical selection switch MOS 3 by the pulse voltage of the vertical gate line 8 connected to the vertical scanning circuit 9. The horizontal transfer MOS switch 1 is operated by the shift register signal of the horizontal scanning circuit 13.
0 are sequentially turned on, and the signal voltage of each photoelectric conversion element is output from the output amplifier 12 in time series for each element.

At this time, the horizontal scanning circuit 13 arranges the horizontal transfer MOS switches 10 alternately among the plurality of vertical output lines 6,
The data is output from the horizontal transfer MOS switch 10 to the horizontal output line 11 for each vertical output line 6. The source of the horizontal transfer MOS switch 10 on the side of the vertical output line 6 is provided with a constant current source 7 serving as a load of a source follower circuit. It depends on the location. The horizontal scanning circuit 13 is disposed at both ends of the vertical output line 6, and the horizontal scanning circuit 1 at both ends is provided.
Reference numeral 3 designates a timing, turns on the horizontal transfer MOS switch 10 for each vertical output line 6, reads out the photoelectric charge signal of the photoelectric conversion element 1 to the horizontal output line 11, and outputs the signal to the output amplifier 1.
2 is output. In this case, it is also possible to turn on the horizontal transfer MOS switches 10 on both ends to increase the reading speed.

Next, although not shown, the output signals output from the output amplifiers 12 at both ends are combined into a series of image signals while taking a timing in a time series to form a sample-and-hold circuit and shading correction. It may be output as a video signal via a circuit or the like.

With this structure, for example, when a photoelectric conversion circuit having M rows and N columns is considered, the K-th row and the L-th column (1 ≦ K ≦ M, 1 ≦ L)
The signal voltage read from the pixel of ≦ N) is as follows: VsigKL = Vsig0−Vth0−Ia × Rm−Ia × r1 × K (1 ≦ K ≦ M) (8) (where Rm is when the vertical selection switch MOS3 is on) , R1 is the resistance value of the vertical output line 6 for each row, Vsi
g0 is the output voltage of the photoelectric conversion element 1, Vth0 is the threshold voltage of the source follower input MOS 2, and Ia is the current of the constant current source 7. ). Further, the K-th row and the L + 1-th column (1 ≦ K ≦
M, 1 ≦ L ≦ N), the signal voltage read from the pixel is
Since the pulling direction is upside down, the affected resistance value is different, and VsigKL + 1 = Vsig0−Vth0−la × Rm−la × r1 × (M−K) (1 ≦ K ≦ M) (9)

As can be seen from the above equation, for example, when attention is paid only to the odd-numbered rows, in the present embodiment, the same shading as in the prior art occurs. When viewed as a whole, each shading was averaged and visually recognized, and the image quality was significantly improved.

In addition, shading can be further reduced by adding or averaging adjacent signals by mounting a circuit externally or internally. To add and read adjacent signals, for example, in a photoelectric conversion device that captures a color image using a complementary color filter, the signals of adjacent pixels are added and read, and a matrix operation is performed externally to perform video processing. Restoration of a signal is generally performed, but by using the structure of the present invention at that time, shading can be reduced without any problem.

In the present embodiment, an example in which every other row is alternated has been described. However, the present invention is not limited to this, and similar effects can be obtained by using other combinations such as every two rows or every three rows according to the degree of shading. It goes without saying that it can be obtained.

In the present embodiment, the source follower circuit using a constant current type load has been described as an example. However, the present invention is not limited to this, and the same effect can be obtained by using a resistance type load. Is obtained. Needless to say, the same effect can be obtained with the inverting amplifier type.

[Third Embodiment] FIG. 4 shows a third embodiment of the present invention.
FIG. 3 is a schematic explanatory view showing the embodiment. In the present embodiment, the power supply terminals of the source follower circuit are provided alternately on the upper and lower sides in the row direction for each column.

In FIG. 4, a photoelectric conversion element (photodiode or the like) 1 accumulates electric charge according to the amount of incident light, and is arranged two-dimensionally (4 × 4 elements in the figure). One end of the photoelectric conversion element 1 is a source follower input MOS
2, the source of the source follower input MOS2 is connected to the drain of the vertical selection switch MOS3,
The drain of the source follower input MOS 2 is connected to the power supply line 4.
And a vertical selection switch MOS
3 are connected to a load current source 7 via a vertical output line 6, and these are connected to a source follower input MOS2.
, The vertical selection switch MOS3, and the load current source 7 as a whole constitute a source follower circuit.

The signal voltage of the photoelectric conversion element 1 is generated at the gate of the source follower input MOS 2 according to the electric charge accumulated in the photoelectric conversion element 1 of each pixel, and the signal voltage is amplified by the source follower circuit and read out. is there. The power supply of each source follower circuit is connected to a power supply line 4 for each row, and the power supply lines 4 are connected alternately and connected to separate power supply terminals 5.

The gate of the vertical selection switch MOS 3 is connected to a vertical scanning circuit 9 by a vertical gate line 8. The output signal of the source follower circuit is supplied to the vertical output line 6, the horizontal transfer M
The signal is output to the outside through the OS switch 10, the horizontal output line 11, and the output amplifier 12. Horizontal transfer MOS switch 10
Are connected to the horizontal scanning circuit 13, respectively.
In such a configuration, the signal voltage of each photoelectric conversion element 1 is read out to each vertical output line 6 by sequentially turning on the vertical selection switch MOS 3 by the pulse voltage of the vertical gate line 8 connected to the vertical scanning circuit 9. The horizontal transfer MOS switch 1 is operated by the shift register signal of the horizontal scanning circuit 13.
0 are sequentially turned on, and the signal voltage of each photoelectric conversion element is output from the output amplifier 12 in time series for each element.

With this structure, for example, when a photoelectric conversion circuit having M rows and N columns is considered, the K-th row and the L-th column (1 ≦ K ≦ M, 1 ≦ L
The dynamic range of a signal read from a pixel of ≦ N) is as follows: VsigKL <Vd + Vth0−Ia × r2 × K (1 ≦ K ≦ M) (1) (where Vd is the power supply voltage, and Vth0 is the threshold of the source follower input MOS2) The voltage r2 is the source follower input MOS2 corresponding to each vertical gate line 8 of the power supply line 4 and the source follower input MO corresponding to the next vertical gate line 8.
This is the resistance value between the drain of S2. ). At this time, the K-th row and the L + 1-th column (1 ≦ K ≦ M, 1 ≦ L
The dynamic range of the signal read from the pixel of ≦ N) is as follows: VsigKL <Vd + Vth0−la × r2 × (M−K) (1 ≦ K ≦ M) (11) As can be seen from the above equation, for example, when attention is paid only to the odd-numbered rows, in the present embodiment, the saturation voltage or the output shading on the low light amount side in the photoelectric conversion characteristic of the photoelectric conversion element 1 occurs as in the related art. At that time, the even rows have shading that is upside down just like the odd rows,
As a whole, each shading was averaged and visually perceived, and the image quality was significantly improved.

In the present embodiment, an example in which every other row is alternated has been described. However, the present invention is not limited to this, and similar effects can be obtained by using other combinations such as every two rows or every three rows according to the degree of shading. Needless to say,

In the present embodiment, the source follower circuit using a constant current type load has been described as an example. However, the present invention is not limited to this, and the same effect can be obtained by using a resistance type load. can get. Needless to say, the same effect can be obtained with the inverting amplifier type.

When a current reading type amplifier is used, a new effect of reducing the shading of the output current can be obtained.

[Fourth Embodiment] FIG. 5 is a schematic explanatory view showing a fourth embodiment of the present invention. In FIG. 5, 70
Reference numeral 1 denotes a reset switch for discharging charges accumulated in the photoelectric conversion element 1, the source of which is connected to the photoelectric conversion element 1, and the drain of which is a power supply line 4 common to the source follower circuit.
It is connected to the. A reset gate line 702 controls the reset switch 701. By adopting the pixel structure of the present embodiment, the reset voltage of the photoelectric conversion element 1 can be controlled more accurately than in the above embodiment, and the DC level of the signal voltage due to the variation of the reset voltage and the strong reset voltage can be controlled. It is possible to reduce an afterimage due to a reset remaining when light is irradiated. However, since the resistance value between the power supply terminal 5 and the drain of the reset switch 701 is similarly distributed in the row direction, the transient characteristics of the reset differ from row to row, and shading of the signal reset level remains. This appeared as vertical shading of the read signal voltage. For this shading cause, as in the third embodiment,
By alternately pulling the power supply terminals 5 up and down in the row direction for each column or for a plurality of columns, the shading of the signal voltage could be significantly reduced.

[Fifth Embodiment] FIG. 6 shows a fifth embodiment of the present invention.
FIG. 3 is a schematic explanatory view showing the embodiment. In FIG.
01 is a source follower input MOS 2 from the photoelectric conversion element 1
Is a charge transfer switch for completely depleting transfer of a signal charge to the input gate. A transfer gate line 802 controls the transfer switch. Generally, in order to improve the sensitivity of the photoelectric conversion device, a method of increasing the size of the photoelectric conversion element 1 and increasing the amount of conversion for performing photoelectric conversion from an optical signal is adopted. However, the parasitic capacitance at the gate of the source follower input MOS 2 is accordingly increased. The value also increases, causing a delay in read speed,
There was a problem that the sensitivity could not be improved efficiently. However, by adopting this structure, the capacitance value of the input gate of the source follower input MOS 2 is designed to be smaller than the capacitance value of the photoelectric conversion element 1 (such as a photodiode), and the sensitivity is improved by performing full depletion transfer. Can be.

Also, as shown in FIG. 6, by disposing the vertical selection switch 3 between the power supply line 4 and the drain of the source follower input MOS 2, the vertical selection switch 3 in the above equation (2) can be obtained. (10), and a wider dynamic range can be obtained.

Also in this embodiment, the first to fourth embodiments
Needless to say, the same effects as those of the embodiment can be obtained.

Further, by using the above embodiments in combination, a video signal with higher quality can be obtained.

In each of the above embodiments, the NMOS
It goes without saying that the same effect can be obtained with both the PMOS type and the PMOS type. Further, by combining various types described in the above embodiment, the occurrence of shading can be further prevented and reduced. For example, by combining the example in which different power supply terminals in which the wiring of the power supply line shown in FIG. 4 is arranged at both ends of the column and the example in which the horizontal output line 11 shown in FIG. Shading due to the line resistance and the power supply line resistance can both be reduced.

[0048]

As described above, by employing the structure of the present invention, it is possible to reduce the vertical shading of the output signal of the photoelectric conversion device.

Further, the shading of the saturation voltage in the vertical direction of the output signal of the photoelectric conversion device can be reduced, and the dynamic range of the output of each photoelectric conversion element can be expanded.

[Brief description of the drawings]

FIG. 1 is a schematic explanatory diagram of a first embodiment of the present invention.

FIG. 2 is a schematic explanatory diagram illustrating an operation of the first exemplary embodiment of the present invention.

FIG. 3 is a schematic explanatory view of a second embodiment of the present invention.

FIG. 4 is a schematic explanatory view of a third embodiment of the present invention.

FIG. 5 is a schematic explanatory view of a fourth embodiment of the present invention.

FIG. 6 is a schematic explanatory view of a fifth embodiment of the present invention.

FIG. 7 is a schematic explanatory view of a conventional photoelectric conversion device.

FIG. 8 is a schematic explanatory view illustrating an operation of a conventional photoelectric conversion device.

[Explanation of symbols]

1 photoelectric conversion element 2 Source follower input MOS 3 Vertical select switch MOS 4 Power line 5 Power supply terminal 6 Vertical output line 7 Load current source 8 vertical gate lines 9. Vertical scanning circuit 10 Horizontal transfer MOS switch 11 Horizontal output line 12 output amplifier 13 Horizontal scanning circuit 201 Resistance distributed to vertical output line 202 Resistance distributed to power supply line 401 Resistance between source follower and constant current source 701 Reset switch 801 charge transfer switch 802 transfer gate line

Claims (5)

(57) [Claims] 1. A pixel region in which pixels each including a photoelectric conversion element and amplifying means for amplifying a signal charge accumulated in the photoelectric conversion element are arranged in a matrix, and the pixel area is amplified by the amplifying means. A vertical scanning unit and a horizontal scanning unit for sequentially scanning and reading signals; and a signal from the amplifying unit is output.
In a photoelectric conversion device in which a vertical output line to be provided and a load unit of the amplifying unit are provided for each column, the load unit changes a direction of a current flowing through the vertical output line.
A photoelectric conversion device , which has a function of controlling and is provided on the opposite side of the pixel region for each row or for a plurality of rows. 2. The photoelectric conversion device according to claim 1, wherein signals between adjacent pixels are averaged. 3. The photoelectric conversion device according to claim 1, wherein the amplifying unit is a MOS type source follower circuit.
The photoelectric conversion device, wherein the load means serving as a load of the source follower circuit is a constant current source. 4. The photoelectric conversion device according to claim 1, wherein horizontal output lines are provided on both sides of the pixel region, and different horizontal outputs are alternately provided for each column or for a plurality of columns. A photoelectric conversion device output to a line. 5. The method according to claim 1, wherein
A photoelectric conversion device, wherein the light is provided outside the photoelectric conversion device.
Matrix operation on signals from
An imaging device characterized by the following.