JPH03132175A - Picture element amplification type solid-state image pickup element - Google Patents

Abstract

PURPOSE:To improve the sensitivity by providing a charge transfer element transferring a signal charge formed by a photodiode and a picture element cell including an amplifier element receiving a signal charge supplied through the charge transfer element at its gate. CONSTITUTION:One picture element cell includes a photodiode D1 whose anode side electrode is coupled with a ground potential of the circuit, a charge transfer element CC1 transferring the signal charge in the photodiode D1 to a gate of an amplifier MOSFETQ3 and an amplifier MOSFETQ3 receiving the transferred signal charge at its gate and converting the charge into a signal voltage. Thus, the signal voltage is amplified according to a capacitance ratio of the capacitance of the photodiode D1 to the gate capacitance of the amplifier element Q3 and the sensitivity is improved as the area of the photodiode D1 is increased.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a technology that is effective when applied to a pixel amplification type solid-state image sensor in which a pixel signal formed by a photodiode is amplified by an amplification element and output. It is related to.

[Conventional technology]

To meet the demands for high sensitivity and high signal-to-noise ratio of solid-state image sensors, for example, as reported in the Proceedings of the 1986 National Conference of the Television Society of Japan, pp. 51-52, photoelectric conversion signals formed by photodiodes have been developed. There are things that are directly read out to the outside by a source follower amplifier.

[Problem to be solved by the invention]

In the above-mentioned conventional technology, there is no need to transfer signal charges as in a CCD type solid-state image sensor, so there is no need for extra noise to be mixed in during transfer, and charge-voltage conversion transistors arranged in the photoelectric conversion section The signal voltage V8.
is expressed by the following equation (1), where Qo is the signal charge generated in the photoelectric conversion section and C is the capacitance of the photoelectric conversion section.

■sg=Q1g/C (11) Here, if a pn junction photodiode is used for photoelectric conversion, both the junction capacitance C1 and the generated charge Q□ are proportional to the pn junction area. Therefore, from equation (11) , signal voltage V, , = does not depend on the junction area (even if the photoelectric conversion section is formed small, the signal voltage vs.

does not change. This means that as a solid-state image sensor, the sensitivity does not decrease even if the number of pixels is increased and the area of the photoelectric conversion section is decreased, which is advantageous when increasing the number of pixels.

However, conversely, even if the aperture ratio is increased, the sensitivity will not improve much; for example, if the aperture ratio is increased by 10
On the contrary, it is disadvantageous in the case of an image sensor with a two-dimensional structure or an image sensor with a three-dimensional structure, which can take 0%.

An object of the present invention is to provide a pixel amplification type solid-state image sensor with improved sensitivity.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for Solving the Problems] A brief overview of typical inventions disclosed in this application is as follows.

That is, signal charges are supplied through a charge transfer element to the gate of an amplification element that converts signal charges formed by a photodiode into a voltage signal.

[For production]

According to the above-described means, it is possible to amplify the signal voltage according to the ratio of the capacitance of the photodiode to the gate capacitance of the amplification element, and the sensitivity can be improved as the area of the photodiode increases.

〔Example〕

FIG. 1 shows a circuit diagram of a main part of an embodiment of a pixel amplification type solid-state image sensor to which the present invention is applied. In the figure, a pixel array of three rows and two columns, its selection circuit, and signal readout circuit are shown as a representative example.

The solid-state image sensor is composed of the following circuits. One pixel cell includes a photodiode D1 whose anode side electrode is coupled to the ground potential of the circuit, a charge transfer element CC1 which transfers the signal charge of the photodiode D1 to the gate of the amplification MO3FETQ3, and a charge transfer element CC1 which transfers the signal charge of the photodiode D1 to the gate of the amplification MO3F ETQ3. Amplifying MO3FE that receives signal charge at the gate and converts it into signal voltage
Based on TQ3, switches MO3FETQI and Q2 are provided to determine the direction of charge transfer by the charge transfer element. That is, when transferring the signal charge formed by the photodiode D1 to the charge transfer element CCI, the switch MO
SFETQI turns on and switch MO3FET
Q2 is turned off. When the signal charge transferred to the charge transfer element is transferred to the gate of the amplification MO3FETQ3, the switch MOSFETQ1 is turned off and the switch MO3FETQ2 is turned on. In other words, the switch MO3FETQ1 transfers the signal charge from the charge transfer element CCI to the photodiode DI side, and the switch MO3FETQ2 transfers the signal charge from the charge transfer element CCI to the photodiode DI side.
This is to prevent the signal charge transferred to the gate of CCI from flowing back to the charge transfer element CCI side. Therefore, if the charge transfer element is configured to be operated by a two-phase clock pulse that transfers charges in only one direction, the switches MO3FETQI and Q2 can be omitted.

A reset MO3FETQ4 is provided to reset the signal charge at the gate of the amplification MO3FETQ3.

The switch MO3FETQI is a switch MO3FETQ4 that configures pixel cells with a similar configuration arranged in the same row.
In addition, its gate is coupled to a row selection line extending laterally. The charge transfer element CCI is commonly connected to the transfer gates of the charge transfer element CG2 and the like constituting other similarly configured pixel cells, and is supplied with a transfer pulse input from an external terminal TRI. The switch MOSFBTQ2 corresponds to the corresponding switch MO3FET of other similarly configured pixel cells.
It is commonly connected to the gates of Q6 and the like, and is supplied with a transfer pulse TR2 inputted from an external terminal TR2. The drain of the reset MO3FETQ4 is commonly connected to the drains of the reset MO3FETQ8 and the like of other similarly configured pixel cells, and is supplied with the power supply voltage Vcc.

The first row (lateral direction) amplification MO3FETQ3. The sources of Q7 are commonly connected to the output terminal Vo via a switch MO3FET Q31 whose gate is connected to the corresponding row selection line.

The row selection line is connected to a switch MOSFETQ that receives a row selection signal (vertical selection signal) Vl formed by a vertical scanning circuit.
It is connected to the terminal PG via 21. A selection timing pulse is supplied from the terminal PG. The row selection lines to which the pixel cells arranged in the second and third rows, which are exemplarily shown as other representative rows, are connected are connected to the row selection signals ■2 and v3, respectively, which are generated by the vertical scanning circuit. Switch MO3FETQ22. which is supplied to the gate. It is connected via Q23 to the terminal PC to which the timing pulse is supplied.

In addition, the amplification MO3F E arranged in the same column (vertical direction)
The drains of TQ3 etc. are shared and connected to switch MO3.
Connected to power supply voltage Vcc via FETQI1.

A switch MO3FE provided corresponding to the common drains of the amplification MOSFETs arranged in the column direction.
TQI 1. Column selection signals (horizontal selection signals) Hl and H2 formed by a horizontal scanning circuit are applied to gates such as Ql2.
is supplied.

This causes the row selection signal Vl to be applied to the selected amplification MO.
The 3FET is given an operating voltage according to the column selection signal formed by the horizontal scanning circuit, and the amplified MO3FET
Q3. The amplified output of Q7 etc. is output from the output terminal Vo in time series. The above amplification MO3FET is connected to the output terminal VO.
Q3. A resistance element is provided that acts as a common load resistance for Q7 and the like.

Next, the operation of the pixel amplification type solid-state image sensing device of this embodiment will be explained below with reference to the timing chart shown in FIG.

When entering the horizontal blanking period (horizontal retrace period), the timing pulse supplied from the terminal RG is set to high level. In response to the high level of the timing pulse supplied from the terminal RG, the pixel cell reset MOSFETQ4
, Q8, etc. are turned on. This allows the amplification MO3F
ETQ3. The gates of Q7 and the like are precharged (reset) to the power supply voltage Vcc. At this time, the high level of the timing pulse supplied from the terminal RG is applied to the reset MO3FETQ4. The threshold voltage of Q8 etc. is raised. This allows the amplified MO3FE
TQ3. The operating voltage Vcc is charged up to the gate capacitance such as Q7.

After the timing pulse supplied from the terminal RG changes from high level to low level, that is, after the reset operation is completed, the timing pulse PC is changed from low level to high level.

Although not shown, at this time, if the row selection signal 1 has been set to a high level by the vertical scanning circuit, the row selection line for the first row is set to a high level via the switch MO3FETQ21 which is turned on.

At this time, bootstrap is applied due to the gate capacitance between the gate and channel of switch MO3FETQ21,
The gate of MO3FETQ21 is the timing pulse PG
The potential is boosted from the high level of . Therefore, the high level of the timing pulse supplied from the terminal PG is transmitted to the row selection line without any level loss due to the threshold voltage of the switch MO3FETQ21.

Since the row selection line for the first row is set to high level, the switches MO3FETQI, Q5, etc. are turned on. Then, a high level timing pulse is supplied from the terminal TRI so as to overlap with the high level of the terminal PC. Thereby, the signal charges formed by the photodiodes Di, D2, etc. are transferred to the charge transfer elements CCI, CC2, etc. When the timing pulse TRI is at a high level, the timing pulse PG is changed from a high level to a low level. This allows the switch MO
The 3FETs QI, Q5, etc. are turned off, and the signal charges transmitted to the charge transfer elements CCI, CC2 are prevented from flowing back toward the photodiodes DI, D2.

The timing pulse supplied from the terminal TR2 is set to a high level so as to overlap with the high level of the timing pulse supplied from the terminal TRI. As a result, the switches MO3FETQ2, Q6, etc. are turned on, and the signal charges transferred to the charge transfer elements CC1, CC2 are amplified by the MO3FETQ3. This will be communicated to the Q7 gate. The above switch MO3FETQ2. With Q6 and the like turned on, the timing pulse supplied from the terminal TRI is returned to the low level, and then the timing pulse supplied from the terminal TR2 is set to the low level.

By the above operation, the signal charges of the photodiodes Di, D2, etc. are amplified by the MO3FETQ3. This will be communicated to the Q7 gate.

Then, when entering the horizontal scanning period, the column (horizontal) selection pulses H1 and H2 formed by the horizontal scanning circuit are sequentially set to high level and apply operating voltage to the drains of the amplifying MO3FETs Q3, Q7, etc., so that the amplifying MO3FETs Q3, . Q7
A voltage signal corresponding to the signal charge transmitted to the gate of
1 from the output terminal vO. For such an output operation, in order to set the row selection line at high level, the terminal PG is set at high level again when the horizontal scanning period begins.

Note that during the above-mentioned transfer operation of the signal charge of the photodiode in the first row, since the other row selection lines are unselected, the switch M corresponding to the switch MOSFETQI
O3FET is off. Therefore, terminals TR1, T
Even if the timing pulse supplied from R2 is supplied to the charge transfer elements and switch MO3FETs in all pixel cells, no signal charge transfer operation is performed. That is, during the horizontal blanking period, only the signal charges of the photodiodes in the next output row are transferred.

Note that switching of the row selection signal by the vertical scanning circuit is performed between timing pulses RG and PG.

In the conventional amplification method, in which the signal charge in the photoelectric conversion section is directly converted into a signal voltage by an amplifying MO3FET, the generated signal voltage does not depend much on the aperture ratio of the pixel, as described above, and this is due to the size of the photoelectric conversion section. Even if the number of generated photoelectrons decreases, the capacitance value decreases due to the decrease in the size of the photoelectric conversion section, so that the above formula (1) V 19 = Q s
This is because the signal voltage is determined by g/C. Therefore,
In this example, photoelectrons (signal charges) generated in the photoelectric conversion section are transferred by a charge transfer element to the input capacitor of an amplification element that is electrically separated from the photoelectric conversion section, where the signal charges are converted into a signal voltage. It is something to do. Therefore, inversely proportional to the capacitance ratio between the capacitance value of the photoelectric conversion section and the capacitance value of the amplification section,
In other words, by forming the capacitance C2 of the amplification section smaller than the capacitance C1 of the photoelectric conversion section and transferring the signal charge Q□, the signal voltage is amplified in proportion to C1/C2. It is something. In this configuration, by increasing the aperture ratio of the photoelectric conversion section, the signal charge Q increases proportionally, whereas the capacitance value of the capacitor C2 of the amplification section can be kept constant, so it is proportional to the aperture ratio. can obtain a large signal voltage.

In order to increase the aperture ratio and increase the number of pixels as described above, the pixel amplification type solid-state image sensor shown in FIG.
This is achieved when the photoelectric conversion section and the signal amplification and readout circuit are formed into a two-dimensional structure or a three-dimensional structure.

The effects obtained from the above examples are as follows. That is, (1) By supplying signal charge through a charge transfer element to the gate of an amplification element that converts signal charge formed by a photodiode into a voltage signal, a signal is generated according to the ratio of the capacitance of the photodiode to the gate capacitance of the amplification element. It is possible to amplify the voltage, and as the area of the photodiode increases, the effect of improving sensitivity can be obtained.

(2) The aperture ratio of the photoelectric conversion section can be maximized to 100% by forming a two-story or three-dimensional structure of the photoelectric conversion section consisting of a photodiode, etc., and the signal charge readout circuit. The effect is that a solid-state imaging device with extremely high sensitivity can be obtained.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, in the embodiment circuit shown in FIG. 1, two row selection lines are provided, one for signal transfer and one for signal reading, and the switches MO3FETQI, Q5, etc. of pixel cells are connected. The readout switch MO5FETQ31 may be operated independently. Further, the source output of the amplification MOSFET Q3 may be outputted through a capacitor. That is, the capacitor is charged by the source output voltage of the amplification MO3FETQ3, etc., and the amplification MOS
When a precharge voltage is supplied to the gate capacitance of FETQ 3, the amplified output corresponding to the precharge potential is transmitted to the capacitor through the above charging path, and the electrode on the ground potential side is floated when the capacitor is charged with the above output signal. Then, only the signal voltage formed by subtracting the precharge voltage from the charged output voltage may be output.

A vertical shift register for sensitivity setting is provided, and the first row selection line is brought into a selected state prior to the selection operation of the vertical shift register VSR, and the signal charge of the photodiode is transferred and swept out. It may be. Thereby, the vertical scanning time difference between the two vertical shift registers becomes the photodiode accumulation time, and by changing the scanning timing of the sensitivity setting vertical shift register, the photodiode accumulation time can be made variable.

The present invention can be widely used as a solid-state imaging device having an amplification function.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows. In other words, by supplying signal charge through a charge transfer element to the gate of an amplification element that converts signal charge formed by a photodiode into a voltage signal, the signal voltage is amplified according to the ratio of the capacitance of the photodiode to the gate capacitance of the amplification element. This makes it possible to improve sensitivity as the area of the photodiode increases.

[Brief explanation of the drawing]

FIG. 1 is a main circuit diagram showing an embodiment of a pixel amplification type solid-state image pickup device to which the present invention is applied, and FIG. 2 is a timing chart for explaining the readout operation thereof. Diagram

Claims (1)

[Claims] 1. A pixel cell including a charge transfer element that transfers signal charges formed by a photodiode, and an amplification element whose gate is supplied with the signal charges supplied through the charge transfer element. A pixel amplification type solid-state image sensor characterized by: 2. A switch element is provided on both sides of the charge transfer element, and a switch element for resetting the signal charge is provided at the gate of the amplification element. Pixel amplification type solid-state image sensor.