JP3524806B2 - Code error correction method - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a CD (Compact Discharge).
The present invention relates to a code error correction method for detecting and correcting a code error of digital data read from a recording medium such as k) or MD (Mini Disk), and a code error correction device for executing this correction method.

[0002]

2. Description of the Related Art In a CD player for reproducing a CD on which digital data such as voice information is recorded, a code error may occur due to a scratch on the CD or a mechanical defect of the device. Therefore, in a normal CD player, CIRC (Cross-Interleave Reed-Solomon) using the Reed-Solomon code is applied to the digital data read from the CD.
Code) correction processing is performed.

In the CIRC system, when recording data on a CD, 16-bit audio data is divided into two to generate 8-bit symbol data. In this symbol data, a total of 24 symbols generated from 6 pieces of audio data of each of the left and right channels is one data group (1
Frame). 1 of these 24 symbols
Four pieces of each 2-series parity data consisting of an 8-bit C1 code and a C2 code based on the Reed-Solomon coding method are added to the symbol data to be a frame. As a result, symbol data for recording, in which one frame is composed of 32 symbols in total, is generated. The recording symbol data thus generated is 8
After the bit subcode data is attached, EFM (Eight
It is converted to 14-bit encoded data by to fourteen modulation (modulation), a sync signal and a connection bit are further added, and the data is written to a CD as an EFM signal.

The EFM signal read from the CD is shown in FIG.
As shown in, one frame consists of 588 bits,
A 24-bit synchronization signal is placed at the beginning of each frame, and subsequently, 14-bit data is placed 33 times in succession with a 3-bit connection bit in between. When data is actually read from the CD, the EFM signal is read for each frame, and the EFM signal is subjected to EFM demodulation. In the EFM demodulation, as shown in FIG. 3, 8-bit subcode data is generated from the first 14-bit data following the sync signal, and then 8-bit symbol data is generated from 32 consecutive 14-bit data. Is generated. The 32 pieces of symbol data are first decoded based on the C1 code and then decoded based on the C2 code. In each decoding process, each symbol data is arithmetically processed according to the arrangement rule according to the C1 code or the C2 code to calculate a syndrome, and a code error is detected and corrected for each symbol from this syndrome based on the Reed-Solomon coding method. . As a result, in the decoding process based on the C1 code, 28 symbol data are extracted, and in the decoding process based on the C2 code, 24 symbol data are extracted. The code error correction processing by the CIRC method described above is performed, for example, in Japanese Patent Publication No. 5-18.
It is disclosed in Japanese Patent No. 487.

As shown in FIG. 3, the 24 symbol data which have been subjected to the code error correction processing are combined two by two to restore six 16-bit audio data corresponding to the left and right channels respectively. It The audio data thus restored is subjected to D / A conversion processing for each of the left and right channels and sent to the audio amplifier.

FIG. 4 is a block diagram showing a configuration of a code error correction circuit for performing a calculation processing operation of CIRC decoding, and FIG. 5 is a timing chart for explaining the operation.

The code error correction circuit 10 comprises an I / O unit 1, a register 2, a syndrome calculator 3, and a Galois field calculator 4. Further, the code error correction circuit 10 is connected to a buffer RAM 20 that stores the symbol data in the number of frames required for the error correction processing.

The I / O unit 1 inputs and outputs symbol data to and from the outside, and also writes and reads symbol data to and from the buffer RAM 20. This I / O
A register 2, a syndrome calculator 3, and a Galois field calculator 4 are connected to the unit 1. The register 2 stores a calculation result calculated by a calculation process for correcting a code error, data indicating a position of the code error, and data indicating an error caused by the code error. This register 2
Holds each data while the code error correction process is performed on the symbol data for one frame.

The syndrome calculator 3 is a buffer RAM
Symbol data is fetched from 20 through the I / O unit 1, and four syndromes are sequentially calculated based on the roots of the primitive polynomial of degree 8. The syndrome calculator 3 holds the calculated syndrome while the calculation of the syndrome is first performed and then the correction process of the code error is performed on the symbol data for one frame. The Galois field arithmetic unit 4 executes the Galois field arithmetic, and the syndrome arithmetic unit 3
The syndrome calculated by and the data temporarily stored in the data register are calculated according to a predetermined rule. As a result, data representing the position of the code error and data representing the error caused by the code error are generated. Further, the Galois field arithmetic unit 3 buffers the symbol data including the code error in the buffer R based on the data indicating the position of the code error.
Take in from AM20. Then, the symbol error is corrected by adding data representing an error caused by the code error to the symbol data, and then the symbol data is stored in the buffer RAM 20 again.

In the correction process for the symbol data of the nth frame, first, the first frame period f1
To the first syndrome calculation process SC based on the C1 code
1 (n) is executed. Then, the first correction process DC1 (n) is executed based on the first syndrome group obtained in the first syndrome calculation process SC1 (n).
Then, after the completion of the first correction process DC1 (n), C2
The second syndrome calculation process SC2 (n) based on the code is executed. This second syndrome calculation process SC2
Up to (n) is completed in the first frame period f1.

At the beginning of the second frame period f2, the error position detection EC (n) is first executed. In this error position detection EC (n), the position of the symbol data including a code error that has not been corrected in the first correction processing DC1 (n) is detected based on the error flag. And the second
Error detection EC (n) at the end of the frame period f2 of
Detection result and second syndrome calculation processing SC2
The second correction process DC2 (n) is executed based on the second syndrome group calculated at (n). During the second frame period f2, the first syndrome calculation process SC1 (n + 1) and the first correction process DC are performed because the correction process is performed on the symbol data of the (n + 1) th frame.
1 (n + 1) and the second syndrome calculation process SC2 (n + 1) are executed in parallel.

In the above correction processing, the syndrome calculator 3 and the Galois field calculator 4 are operated in a time division manner so that the processing is completed in two frame periods for one frame of symbol data.

[0013]

With the increase in reproduction speed of recording media such as CDs, there has been a demand for speeding up of code error correction processing. To speed up this correction process, 1
Since the calculation required in the correction processing for the symbol data of the frame is determined by the correction method, the processing speed of the syndrome calculator 3 and the Galois field calculator 4 may be increased, or the syndrome calculator 3 and the Galois field calculator 4 may be changed. Two sets must be provided for parallel processing.

However, since the syndrome computing unit 3 and the Galois field computing unit 4 have a limit in the speed of circuit operation, the speed cannot be exceeded beyond that limit. Further, if two sets of the syndrome calculator 3 and the Galois field calculator 4 are provided, there arises a problem that the circuit scale increases and the power consumption increases.

Therefore, an object of the present invention is to improve the efficiency of arithmetic processing and to cope with high-speed operation without increasing the circuit scale.

[0016]

The present invention has been made to solve the above-mentioned problems, and is characterized in that a code error of digital data including two series of parity data is frame by frame. In a code error correction method for detecting and correcting a first syndrome group, a first step of calculating a first syndrome group according to parity data of a first series, and a first correction process based on the first syndrome group A second step, and a third step of calculating a second syndrome group according to the parity data of the second series,
A fourth step of performing a second correction process based on the second syndrome group, and performing the first step during the first frame period, and then performing the second and third steps. Step of the second frame that continues in the first frame period
And the fourth step is performed during a third frame period that follows the second frame period.

According to the present invention, since the correction process of the digital data is performed in the period of 3 frames, the syndrome calculation and the correction process can be executed without any idle time. When the correction processing is continuously performed on the digital data of a plurality of frames, the correction processing of the digital data of three frames can be performed in parallel within the same frame period.

[0018]

1 is a timing diagram for explaining a code error correcting method of the present invention, and FIG. 2 is a diagram for explaining a processing order for symbols of a specific frame.
In FIG. 1, a process A mainly indicates an error correction process executed by a Galois field arithmetic unit, and a process B mainly indicates a syndrome arithmetic process executed by a syndrome arithmetic unit.

In the process A, the first correction process DC1 (i) for the symbol data of the i-th frame and the error position detection E for the symbol data of the i-1th frame E
C (i-1) and the second correction process DC2 (i-1) for the symbol data of the (i-1) th frame are repeated. In the process B, the first syndrome calculation process SC1 (j) for the symbol data of the j-th frame
And the second syndrome calculation processing SC2 (j-1) for the symbol data of the (j-1) th frame are repeated. Here, the first correction process DC1 (i) of the process A is
One frame is delayed with respect to the first syndrome calculation process SC1 (j) of the process B, and the error position detection EC (i-1) and the second correction process DC2 (i-1) of the process A are the same as those of the process B. It is delayed by one frame with respect to the syndrome calculation process SC2 (j) of 2. That is, as shown in FIG. 2, in the specific frame period, the first correction process DC1 (n) is executed on the 32 symbol data of the nth frame, and the 32 symbol of the n + 1th frame is executed. The first syndrome calculation process SC1 (n + 1) is executed on the data. And
The n + 4th k-th (k = 1,
The second syndrome calculation process SC2 (n) is performed on 28 symbol data in total, which is extracted one symbol at a time from frames 2, 3, ... Furthermore, n-1
The n-1 + 4kth frame (k =
The second correction processing DC2 (n-1) is performed on a total of 28 pieces of symbol data extracted from each of the 1st, 2nd, 3rd ...

Here, the processes A and B are processed in parallel in accordance with a common reference clock. At this time, the first correction processing DC1 (n) in the processing A is
First syndrome calculation process SC1 (n +
It is set so that the processing is completed in a smaller number of clocks than 1). That is, the second syndrome calculation process SC2 (n) is performed in the process in which the process A and the process B proceed in parallel.
However, since it can be started only after the completion of the first correction processing DC1 (n), the first correction processing DC1 (n) should be completed before the first syndrome calculation processing SC1 (n + 1). I have to.

In the code error correction process for the symbol data of the nth frame, first, in the process B of the first frame period f1, the first syndrome calculation process SC1 (n) based on the C1 code is executed. . As shown in FIG. 3, the 32 pieces of symbol data D _{0 to} D ₃₁ forming the frame are obtained by converting the EFM signal read from the CD into the E data.
It is obtained by FM demodulation and includes four C1 codes. This syndrome calculation process SC1 (n)
Then, for 32 pieces of symbol data D _{0 to} D ₃₁ , C
Four syndromes S ₀ , S ₁ , S ₂ , and S ₃ are calculated by the operation of Expression 1 corresponding to the arrangement rule with the reference numeral 1.

[0022]

[Equation 1]

Α is an 8th-order primitive polynomial [f (x) = x ⁸ +
x ⁴ + x ³ + x ² +1]. Further, each arithmetic process is an arithmetic process by the Galois field, and, for example, the addition process represents an exclusive OR. (Hereinafter, all the calculation processes of the respective formulas are calculations by the Galois field.) Next, in the process A of the second frame period f2, the first syndrome calculated in the first syndrome calculation process SC1 (n)
First correction processing DC1 based on the syndrome group of
(n) is executed. In this first correction process DC1 (n),
From the calculated four syndromes S ₀ , S ₁ , S ₂ , and S ₃ , the error state included in the symbol data D _{0 to} D ₃₁ of one frame is determined. That is, the C1 code is added so that all of the four syndromes S _{0 to} S ₃ are “0” for the symbol data D _{0 to} D _{31 of} one frame, and the four syndromes S ₀ to S ₃ if the S ₃ are all "0", it is determined that there is no bit error in the symbol data D ₀ to D _31. Then, when Expression 2 is satisfied, it is determined that the symbol data D _{0 to} D ₃₁ has one code error, and when Expression 3 is satisfied, it is determined that there are two code errors. Further, when neither Expression 2 nor Expression 3 is satisfied, it is determined that the symbol data D _{0 to} D ₃₁ have three or more code errors.

[0024]

[Equation 2]

[0025]

[Equation 3]

When it is determined that the number of code errors is one, the syndromes S ₀ and S _{1 are determined.}
From the above, the calculation of Expression 4 is executed, and the position of the code error is detected from the index i of α given by the calculation result.

[0027]

[Equation 4]

At this time, the error caused by the code error coincides with the calculation result of the syndrome S ₀ according to the equation 1, and the code error is corrected by adding this error to the symbol data at the position where the code error occurs. . That is,
Assuming that the position of the code error is p (p = 0 to 31) and the symbol data D _p is deviated by the error Y due to the code error, S ₀ = Y and S 1 = α ^(31-p) It becomes Y. Therefore, from the calculation result of Expression 4, the position p of the code error can be detected as 31-i, and the error Y caused by the code error can be obtained by S ₀ . For example, if the result of Equation 4 becomes alpha ^29, there is a code error in the symbol data D _2, to correct the code error by adding the syndromes S ₀ to the symbol data D ₂ as an error.

As a result of the judgment of the code error, the code error is
When it is determined that there are two, correction processing is performed as follows.
Is done. First, the Thin Draw calculated by Equation 1
Mu S ₀~ S₃The calculation result of Formula 3 is executed using
From the solution of the simultaneous equations of degree 2 obtained as
Position is detected. And that caused by code errors
Syndrome S according to equation 1₀, S₁Calculation result of
This error is calculated from the result and the error at the position where the code error occurs is calculated.
Code error by adding to each symbol data
To correct. That is, the position of the code error is p, q (p, q =
0 to 31 p ≠ q) and symbol data D_p, D_qIs a sign
Error Y depending on the number error₀, Y₁Just shifted
Then, from Equation 1, S₀= Y₀+ Y₁, S₁= Α^(31-p)・
Y₀+ Α^{( 31-q)}・ Y₁Becomes Therefore, in the calculation result of Equation 3,
The sign from the index i, j of α given as the solution of the simultaneous equations
Positions p and q of the signal error are 31-i and 31-j, respectively.
Error Y₀, Y₁And the error Y₀, Y₁The symbol
Data D_p, D_qThe code error is corrected by adding to.

When it is determined that the number of code errors is three or more as a result of the determination of the code error, the error flag is set for all the symbol data. That is, when the number of code errors in one frame is three or more, the correction cannot be performed by the C1 code. Therefore, regardless of whether or not there is a code error, it is considered that an error may be included and the error flag is set for all symbol data. It is added and moved to the next process.

After the first correction processing DC1 (n) is completed,
In the process B within the second frame period f2, the second syndrome calculation process SC2 (n) is executed. This second
In the syndrome calculation processing SC2 (n) of, for 28 pieces of symbol data D _{0 to} D ₂₇ including four C2 codes,
The four syndromes S ₀ , S ₁ , and
S ₂ and S ₃ are calculated.

[0032]

[Equation 5]

Here, 28 pieces of symbol data D _{0 to} D
₂₇ is obtained by completing the first correction process DC1 (n), and is rearranged in the order corresponding to the C2 code. That is, the C2 code is attached such that the symbol number is shifted by one every four frames with respect to the arrangement order of the C1 code as shown in FIG. 3, and 28 pieces of symbol data extracted from 109 frames are attached. It is attached to.

Subsequently, processing A in the third frame period f3
At, error position detection EC (n) is performed. In this error position detection EC (n), the number and position of code errors are detected based on the error flag added in the first correction processing DC1 (n). That is, when the error flag is set for the symbol data of a specific frame in the first correction processing DC1 (n), the error flag is also set for the symbol data extracted from that frame. Therefore, by detecting this error flag, the first
It is possible to confirm the number and position of code errors that have not been corrected by the correction process DC1 (n). Based on this detection result, the subsequent second correction process DC2 (n) is performed.

Then, the process A of the third frame period f3
In the second correction, based on the four syndromes S ₀ , S ₁ , S ₂ , S ₃ calculated by the second syndrome calculation process SC2 (n) and the detection result of the error position detection EC (n), The process DC2 (n) is executed. Here, the error position detection E
When it is detected that the number of code errors is two or less in C (n), based on the four syndromes S ₀ , S ₁ , S ₂ , and S ₃ calculated in the second syndrome calculation process SC2 (n). Then, the same correction processing as the first correction processing DC1 (n) is performed.

Error position detection EC (n) has a code error
If it is determined that there are three, correct as follows
Processing is performed. In the case of this correction process, each symbol data
TA D ₀~ D₂₇Sign error due to error flag attached to
Since the position of the
Syndrome S₀~ S₂Error caused by code error from
Calculated respectively. Here, the sign error
Position is p, q, r, depending on each code error
The error is Y₀, Y₁, Y₂Then, the calculation result of Equation 5 is S₀= Y₀+ Y₁+ Y₂ S₁= Α^(27-p)・ Y₀+ Α^(27-q)・ Y₁+ Α^(27-r)・ Y₂ S₂= Α^(54-2p)・ Y₀+ Α^(54-2q)・ Y₁+ Α^(54-2r)・ Y
₂ Becomes These calculation results and the syndrome S₀~ S₂of
Each error Y from the relationship₀, Y₁, Y₂The value of is a system of three-dimensional equations
Can be obtained as the solution of. As a result, each error Y₀,
Y₁, Y₂Symbol data D_p, D_q, D_rCan be added to
You can correct the code error with and.

In the error position detection EC (n), when it is determined that there are four code errors, the correction process is performed as follows. Also in the correction process of the code error in this case, since the positions of the four code errors can be specified in advance,
As with the two cases, the error caused by each code error can be calculated. That is, the position of the code error is p, q,
r and s, and the error of each position is Y ₀ , Y ₁ ,
If Y ₂ and Y ₃ , the calculation result of Equation 5 is S ₀ = Y ₀ + Y ₁ + Y ₂ + Y ₃ S ₁ = α ^(27-p) · Y ₀ + α ^(27-q) · Y ₁ + α ^{( 27-r)}・ Y ₂ ＋
α ^(27-s)・ Y ₃ S ₂ = α ^(54-2p)・ Y ₀ + α ^(54-2q)・ Y ₁ + α ^(54-2r)・ Y
₂ + α ^(27-s)・ Y ₃ S ₃ = α ^(81-3p)・ Y ₀ + α ^(81-3q)・ Y ₁ + α ^(81-3r)・ Y
It becomes ₂ + α ^(27-s) · Y ₃ . The values of the respective errors Y ₀ , Y ₁ , Y ₂ , and Y ₃ can be obtained as the solution of a quartic simultaneous equation from the relation between these calculation results and the syndromes S _{0 to} S ₃ . As a result, each error Y
Symbols ₀ , Y ₁ , Y ₂ and Y ₃ are symbol data D _p , D _q , D _r and D _s.
A code error can be corrected by adding to.

If it is determined in the error position detection EC (n) that there are five or more code errors, the first correction process DC cannot be performed because the correction process using the C2 code cannot be performed.
As in the case of 1 (n), an error flag is set for the symbol data.

In the above-mentioned code error correction processing, three frame periods are required to correct one frame of symbol data, but within one frame period, three frames of symbol data are corrected in parallel. It is being appreciated. Therefore, when n frames of symbol data are processed consecutively, it takes n + 2 frame periods until all the processing is completed. In the actual processing, several tens of frames are continuously processed, so that there is no problem even if the processing time is extended by about 2 frame periods. In the error correction method of the present invention, since the syndrome calculation process and the correction process can be executed without waiting time, the number of reference clocks required for one frame period can be set small. For example, in the conventional correction method shown in FIG.
Although processing was performed in 2 clocks, in the correction method of the present invention, all arithmetic processing can be completed in 144 clocks.

[0040]

According to the present invention, the number of clocks required for the correction processing can be reduced in one frame period, and the correction processing can be speeded up. Further, in the algorithm of the arithmetic processing, the number of clocks required for the first correction processing is set shorter than the number of clocks required for the first syndrome calculation processing, so that the completion of the mutual processing is confirmed by the processing of two systems. There is no need. Therefore, the operation can be speeded up, the processing can be simplified, the load on the microprocessor for controlling the operation can be reduced, and the control system circuit can be simplified.

[Brief description of drawings]

FIG. 1 is a timing diagram illustrating a code error correction method of the present invention.

FIG. 2 is a diagram showing an arrangement order of symbol data for which arithmetic processing is performed.

FIG. 3 is a format diagram of data read from a disc.

FIG. 4 is a block diagram showing a configuration of a code error correction circuit.

FIG. 5 is a timing diagram illustrating a conventional code error correction method.

[Explanation of symbols]

1 I / O section 2 Data register 3 Syndrome calculator 4 Galois field arithmetic unit 5 Operation control section 6 Error monitor 10 Code error correction circuit 20 buffer RAM

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI G11B 20/18 G11B 20/18 572F H03M 13/15 H03M 13/15 H04L 1/00 H04L 1/00 A (58) Fields investigated (Int.Cl. ⁷ , DB name) H03M 13/00-13/53

Claims (4)

(57) [Claims] 1. A code error correction method for detecting and correcting a code error of digital data including two series of parity data for each frame, wherein a first syndrome group is calculated according to the first series of parity data. 1 step, a second step of performing a first correction process based on the first syndrome group, a third step of calculating a second syndrome group according to parity data of a second series, and a fourth step of subjecting the second correction processing based on the second syndromes, the, the first step executed in the first half of the first frame period, the first and the second step 1 frame period
Perform the first half of the second frame period continue, the third step is performed in the second half of the second frame period, the third consecutive said fourth step to said second frame period
Is executed in the latter half of the frame period, and the number of processing clocks in the second step is changed to the first step.
The code error correction method is characterized in that it is set to be shorter than the number of processing clocks . 2. Symbol data of an (n-1) th frame
2nd step for and the symbol of the nth frame
1st step for the first data period is performed in the first half of the first frame period, and the symbol data of the (n-2) th frame is
For the fourth step and the ( n-1) th frame
The third step for the symbol data is executed in the latter half of the first frame period, and as the frame period advances by one , the frame number increases by one.
First to fourth steps for the symbol data of the frame
Code error correction method according to claim 1, characterized in that to perform the flop. 3. The first step in the second step
3. The code error correction method according to claim 2, wherein an error flag is set for the data including the uncorrectable code error based on the syndrome group. 4. The code error correction method according to claim 3, wherein the fourth step is executed after detecting the position of the data in which the error flag is set.