JP3521115B2 - Electronic unit wiring structure - Google Patents

Electronic unit wiring structure

Info

Publication number
JP3521115B2
JP3521115B2 JP16839398A JP16839398A JP3521115B2 JP 3521115 B2 JP3521115 B2 JP 3521115B2 JP 16839398 A JP16839398 A JP 16839398A JP 16839398 A JP16839398 A JP 16839398A JP 3521115 B2 JP3521115 B2 JP 3521115B2
Authority
JP
Japan
Prior art keywords
printed circuit
insulating substrate
bus bar
sub
electronic unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP16839398A
Other languages
Japanese (ja)
Other versions
JP2000003740A (en
Inventor
芳伸 関
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yazaki Corp
Original Assignee
Yazaki Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yazaki Corp filed Critical Yazaki Corp
Priority to JP16839398A priority Critical patent/JP3521115B2/en
Publication of JP2000003740A publication Critical patent/JP2000003740A/en
Application granted granted Critical
Publication of JP3521115B2 publication Critical patent/JP3521115B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Multi-Conductor Connections (AREA)
  • Connection Or Junction Boxes (AREA)

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、電子ユニットの配
索構造に関するものである。 【0002】 【従来の技術】従来、図5のような配線基板が提案され
ている(実開平8−89号公報)。この配線基板80
は、基板本体81に導電ペースト(図示せず)を注入す
るための溝82を形成すると共に、基板本体81の上面
プリント回路83を配索したものである。これによ
り、基板本体81に占めるプリント回路83の実装密度
を高めることができる。しかしながら、電源回路からの
大電流には上述のプリント回路83では対応することが
できない欠点があった。 【0003】そこで、図6に示すような電子ユニット8
5の配索構造が提案されている。この配索構造は、絶縁
基板86にプリント回路87を配索し、電源回路からの
大電流を流すブスバー88をプリント回路87の一端部
87aに接続し、プリント回路87の他端部87bに半
導体リレー89を接続する構造である。ブスバー88
は、図7のように、L字状に形成され、プリント回路8
7に接続するためのピン状の接続部88bを垂直部88
aの自由端に有している。 【0004】しかしながら、大電流に対応するにはプリ
ント回路87の板厚を増しても自ずと限界があるため、
板幅方向で断面積を大きくする必要があった。そのため
プリント回路87の板幅が大きくなると共に、絶縁基板
86自身も巨大化する恐れがあった。 【0005】 【発明が解決しようとする課題】本発明は上記した点に
鑑み、プリント回路の板幅を大きくすることなく大電流
に対応することができる電子ユニットの配索構造を提供
することを目的とする。 【0006】 【課題を解決するための手段】上記目的を達成するため
に、本発明は、ユニット本体内に絶縁基板を載置し、該
絶縁基板に設けられたプリント回路の一端部にL字状の
ブスバーを、且つ他端部に複数の半導体リレーをそれぞ
れ電気的に接続した電子ユニットの配索構造において、
前記ブスバーが、前記絶縁基板に対して垂直な垂直部
と、該垂直部から前記半導体リレーの配列方向と平行に
延設された連結板と、該連結板に該半導体リレーと同数
設けられた接続部とを備え、前記プリント回路を分割し
て該半導体リレーと同数のサブプリント回路を形成し、
該サブプリント回路に該接続部を接続し、該絶縁基板及
びプリント回路の面積を小さくしたことを特徴とする
(請求項1)。 【0007】 【発明の実施の形態】以下、本発明の実施の形態の具体
例を、図面を参照して説明する。図1〜図4は本発明に
係る電子ユニットの配索構造の一実施例を示すものであ
る。図1において、この電子ユニット1の配索構造は、
箱形のユニット本体2内に絶縁基板3を載置し、絶縁基
板3上に七つの半導体リレー4及びサブプリント回路5
と、一つの連結ブスバー6(請求項1のブスバーに相
当)とをそれぞれ電気的に接続する構造である。 【0008】図1及び図2に示すように、連結ブスバー
6はL字状の本体10と、絶縁基板3に対して垂直な本
体10の垂直部11に延設された連結板12と、連結板
12から突出した複数の接続部13とから成る。即ち、
連結ブスバー6は丁度熊手のような形状をしている。連
結板12は垂直部11の左右側から、絶縁基板3に配設
された複数の半導体リレー4の配列方向(図のP方向)
と平行になるように設けれられている。接続部13はピ
ン状に形成され、連結板12の下部に配置されている。
接続部13の個数は半導体リレー4と同じ七つである。
また、絶縁基板3に対して水平な本体11の水平部14
は、ユニット本体2の外部に設けられたコネクタ挿着部
7内へ延びている。 【0009】図1及び図3の如くに、サブプリント回路
5の一端部5aには接続部13が半田付けされ、そして
サブプリント回路5の他端部5bには半導体リレー4の
第二接続子4bが半田付けされている。一方、第一及び
第三接続子4a,4cがそれぞれ絶縁基板3に半田付け
されている。サブプリント回路5の個数は半導体リレー
4と同じ七つである。これにより、サブプリント回路5
を介して連結ブスバー6と半導体リレー4とが電気的に
接続される。 【0010】上述の連結ブスバー6を半導体リレー4の
近くに配置することにより、絶縁基板3上のサブプリン
ト回路5の面積を小さくできる。そのため、連結板12
が、図6のプリント回路87の板幅Vと図1のサブプリ
ント回路の板幅Uとの差(V−U)の役割を果たしてい
る。これにより、絶縁基板3自身の面積も小さくでき
る。特に、図6の絶縁基板86の板幅Yを図1の絶縁基
板3の板幅Xまで小さく(短く)できる。従って、ユニ
ット本体2自身のサイズを小型化できる。 【0011】図3及び図4のように、ユニット本体2に
絶縁基板3、サブプリント回路5、半導体リレー4及び
連結ブスバー6を配索した後に、ユニット本体2の上部
及び下部にそれぞれ上蓋8及び下蓋9を冠着し、コネク
タ挿着部7に外部コネクタ(図示せず)を嵌合する。こ
れにより、電子ユニット1が形成される。 【0012】また図3及び図4に示す如くに、絶縁基板
3の略中央に一列状態で複数の半導体リレー4が配列さ
れ、半導体リレー4の裏面4d側には矩形状の放熱板2
0が配置されている。放熱板20は下蓋9の上面9aか
ら絶縁基板3を介してユニット本体2内に突出してい
る。半導体リレー4と放熱板20とはそれぞれ一対一に
対応している。半導体リレー4の裏面4dと放熱板20
の前面20aとは弾性のクリップ部材21により相互に
密着している。下蓋9の下面9bには櫛状の放熱フィン
23が設けられている。また、絶縁基板3の下面3bと
下蓋9の上面9aとの間には熱を下蓋9から逃がすため
の空間24が形成されている。 【0013】なお、本実施例では、絶縁基板3の面積を
小さくすることでユニット本体2を小型化するための一
手段として連結ブスバー6やサブプリント回路5を利用
しているので、本実施例での手段に限定されるものでは
ない。 【0014】 【発明の効果】以上の如くに、本発明によれば、絶縁基
板に対して垂直なブスバーの垂直部に連結板が、複数の
半導体リレーの配列方向と平行に延設されている。プリ
ント回路が分割されて半導体リレーと同数のサブプリン
ト回路が形成されている。連結板にサブプリント回路に
接続する接続部が半導体リレーと同数設けられている。
これにより、サブプリント回路の面積を従来に比べて小
さくできる。それに伴ってサブプリント回路を配置する
絶縁基板の面積も小さくできる。そのため、ユニット本
体自身のサイズも小さくできる。 【0015】また、サブプリント回路の面積を小さくで
きるから、ブスバーと半導体リレーとの間の距離を従来
よりも短くできる。これにより、例えば、ブスバーに通
電すべき電流値に対して最適なプリント回路のサイズを
各々選択することができる。そのため、従来のような一
つの大きなプリント回路を使用した配索パターンが不要
になる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring structure for an electronic unit. 2. Description of the Related Art Conventionally, a wiring board as shown in FIG. 5 has been proposed (Japanese Utility Model Laid-Open No. 8-89). This wiring board 80
Is to form a groove 82 for injecting the conductive paste (not shown) on the substrate main body 81, the upper surface of the substrate main body 81
And a printed circuit 83 arranged therein. Thereby, the mounting density of the printed circuit 83 occupying the board main body 81 can be increased. However, there is a disadvantage that the above-described printed circuit 83 cannot cope with a large current from the power supply circuit. Therefore, an electronic unit 8 as shown in FIG.
Five routing structures have been proposed. In this wiring structure, a printed circuit 87 is wired on an insulating substrate 86, a bus bar 88 for flowing a large current from a power supply circuit is connected to one end 87a of the printed circuit 87, and a semiconductor 87 is connected to the other end 87b of the printed circuit 87. This is a structure for connecting a relay 89. Busbar 88
Is formed in an L shape as shown in FIG.
7 into a vertical portion 88.
a at the free end. However, there is a limit to cope with a large current even if the thickness of the printed circuit 87 is increased.
It was necessary to increase the cross-sectional area in the plate width direction. Therefore, the width of the printed circuit 87 becomes large, and the insulating substrate 86 itself may become large. SUMMARY OF THE INVENTION In view of the above, the present invention provides a wiring structure for an electronic unit which can cope with a large current without increasing the width of a printed circuit board. Aim. In order to achieve the above object, an object of the present invention is to place an insulating substrate in a unit body and to attach an L-shaped part to one end of a printed circuit provided on the insulating substrate. In the wiring structure of an electronic unit in which a plurality of semiconductor relays are electrically connected to the other busbar and the other end, respectively,
The bus bar has a vertical portion perpendicular to the insulating substrate.
From the vertical portion in parallel with the arrangement direction of the semiconductor relays.
An extended connecting plate, and the connecting plate has the same number as the semiconductor relays.
Provided with a connecting portion , forming the same number of sub-printed circuits as the semiconductor relay by dividing the printed circuit,
Connect the connecting portion to the sub-printed circuit, characterized in that to reduce the area of the insulating substrate and the printed circuit (claim 1). [0007] Embodiments of the present invention will be described below with reference to the drawings. 1 to 4 show an embodiment of a wiring structure of an electronic unit according to the present invention. In FIG. 1, the wiring structure of the electronic unit 1 is as follows.
The insulating substrate 3 is placed in the box-shaped unit main body 2, and the seven semiconductor relays 4 and the sub printed circuit 5 are placed on the insulating substrate 3.
And one connection bus bar 6 (corresponding to the bus bar of claim 1). As shown in FIGS. 1 and 2, a connecting bus bar 6 is connected to an L-shaped main body 10 and a connecting plate 12 extending from a vertical portion 11 of the main body 10 perpendicular to the insulating substrate 3. And a plurality of connecting portions 13 protruding from the plate 12. That is,
The connecting bus bar 6 has a shape just like a rake. The connecting plate 12 is arranged from the left and right sides of the vertical portion 11 in the direction in which the plurality of semiconductor relays 4 arranged on the insulating substrate 3 are arranged (P direction in the drawing).
It is provided so that it may become parallel. The connecting portion 13 is formed in a pin shape and is arranged below the connecting plate 12.
The number of the connection portions 13 is the same as that of the semiconductor relay 4, that is, seven.
Also, the horizontal portion 14 of the main body 11 that is horizontal with respect to the insulating substrate 3
Extend into a connector insertion portion 7 provided outside the unit main body 2. As shown in FIGS. 1 and 3, a connection portion 13 is soldered to one end 5a of the sub-printed circuit 5, and a second connector of the semiconductor relay 4 is connected to the other end 5b of the sub-printed circuit 5. 4b is soldered. On the other hand, the first and third connectors 4a and 4c are soldered to the insulating substrate 3, respectively. The number of the sub-print circuits 5 is the same as that of the semiconductor relay 4, ie, seven. Thereby, the sub-print circuit 5
The connection bus bar 6 and the semiconductor relay 4 are electrically connected via the. By arranging the connection bus bar 6 near the semiconductor relay 4, the area of the sub-print circuit 5 on the insulating substrate 3 can be reduced. Therefore, the connecting plate 12
Play the role of the difference (VU) between the board width V of the printed circuit 87 in FIG. 6 and the board width U of the sub-printed circuit in FIG. Thereby, the area of the insulating substrate 3 itself can be reduced. In particular, the width Y of the insulating substrate 86 in FIG. 6 can be reduced (shorter) to the width X of the insulating substrate 3 in FIG. Therefore, the size of the unit body 2 itself can be reduced. As shown in FIGS. 3 and 4, after the insulating substrate 3, the sub-printed circuit 5, the semiconductor relay 4, and the connection bus bar 6 are routed on the unit body 2, the upper cover 8 and the lower cover 8 are provided on the upper and lower parts of the unit body 2, respectively. The lower cover 9 is mounted, and an external connector (not shown) is fitted to the connector insertion portion 7. Thereby, the electronic unit 1 is formed. As shown in FIGS. 3 and 4, a plurality of semiconductor relays 4 are arranged in a row at substantially the center of the insulating substrate 3, and a rectangular heat sink 2 is provided on the back surface 4d side of the semiconductor relay 4.
0 is arranged. The heat radiating plate 20 projects from the upper surface 9 a of the lower lid 9 into the unit main body 2 via the insulating substrate 3. The semiconductor relay 4 and the heat sink 20 correspond one to one. Back surface 4d of semiconductor relay 4 and heat sink 20
Are in close contact with each other by an elastic clip member 21. A comb-shaped heat radiation fin 23 is provided on the lower surface 9 b of the lower lid 9. A space 24 is formed between the lower surface 3b of the insulating substrate 3 and the upper surface 9a of the lower lid 9 for releasing heat from the lower lid 9. In this embodiment, the connecting bus bar 6 and the sub-print circuit 5 are used as a means for reducing the size of the unit body 2 by reducing the area of the insulating substrate 3. However, the present invention is not limited to this means. As described above, according to the present invention, the connecting plate extends in the vertical portion of the bus bar perpendicular to the insulating substrate in parallel with the arrangement direction of the plurality of semiconductor relays. . The printed circuit is divided to form the same number of sub-printed circuits as the semiconductor relays. The same number of connection portions as the semiconductor relays are provided on the connection plate to connect to the sub-printed circuit.
As a result, the area of the sub-print circuit can be reduced as compared with the related art. Accordingly, the area of the insulating substrate on which the sub-printed circuit is arranged can be reduced. Therefore, the size of the unit body itself can be reduced. Further, since the area of the sub-printed circuit can be reduced, the distance between the bus bar and the semiconductor relay can be made shorter than before. Thereby, for example, it is possible to select the optimum size of the printed circuit for the current value to be supplied to the bus bar. Therefore, a routing pattern using one large printed circuit as in the related art is not required.

【図面の簡単な説明】 【図1】本発明に係る電子ユニットの配索構造の一実施
例を示す平面図である。 【図2】図1の連結ブスバーを拡大した斜視図である。 【図3】図1のA−A線の断面図である。 【図4】図1の矢視B方向から見た一部断面を含む正面
図である。 【図5】従来例を示す斜視図である。 【図6】他の従来例を示す平面図である。 【図7】図6のブスバーを拡大した斜視図である。 【符号の説明】 2 ユニット本体 3 絶縁基板 4 半導体リレー 5 サブプリント回路 6 連結ブスバー(ブスバー) 11 垂直部 12 連結板 13 接続部
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view showing an embodiment of an electronic unit wiring structure according to the present invention. FIG. 2 is an enlarged perspective view of a connecting bus bar of FIG. 1; FIG. 3 is a sectional view taken along line AA of FIG. 1; FIG. 4 is a front view including a partial cross section viewed from the direction of arrow B in FIG. 1; FIG. 5 is a perspective view showing a conventional example. FIG. 6 is a plan view showing another conventional example. FIG. 7 is an enlarged perspective view of the bus bar of FIG. 6; [Description of Signs] 2 Unit body 3 Insulating board 4 Semiconductor relay 5 Sub-print circuit 6 Connection busbar (busbar) 11 Vertical portion 12 Connection plate 13 Connection portion

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H05K 1/02 H05K 3/20 H05K 7/06 H02G 3/16 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1/02 H05K 3/20 H05K 7/06 H02G 3/16

Claims (1)

(57)【特許請求の範囲】 【請求項1】 ユニット本体内に絶縁基板を載置し、該
絶縁基板に設けられたプリント回路の一端部にL字状の
ブスバーを、且つ他端部に複数の半導体リレーをそれぞ
れ電気的に接続した電子ユニットの配索構造において、前記ブスバーが、前記絶縁基板に対して垂直な垂直部
と、該垂直部から前記半導体リレーの配列方向と平行に
延設された連結板と、該連結板に該半導体リレーと同数
設けられた接続部とを備え、 前記プリント回路を分割し
て該半導体リレーと同数のサブプリント回路を形成し、
該サブプリント回路に該接続部を接続し、該絶縁基板及
びプリント回路の面積を小さくしたことを特徴とする電
子ユニットの配索構造。
(57) [Claim 1] An insulating substrate is placed in a unit main body, an L-shaped bus bar is provided at one end of a printed circuit provided on the insulating substrate, and the other end is provided with an L-shaped bus bar. In a wiring structure of an electronic unit in which a plurality of semiconductor relays are electrically connected, the bus bar has a vertical portion perpendicular to the insulating substrate.
From the vertical portion in parallel with the arrangement direction of the semiconductor relays.
An extended connecting plate, and the connecting plate has the same number as the semiconductor relays.
Provided with a connecting portion , forming the same number of sub-printed circuits as the semiconductor relay by dividing the printed circuit,
A wiring structure for an electronic unit, wherein the connection portion is connected to the sub-printed circuit, and the areas of the insulating substrate and the printed circuit are reduced.
JP16839398A 1998-06-16 1998-06-16 Electronic unit wiring structure Expired - Fee Related JP3521115B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16839398A JP3521115B2 (en) 1998-06-16 1998-06-16 Electronic unit wiring structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16839398A JP3521115B2 (en) 1998-06-16 1998-06-16 Electronic unit wiring structure

Publications (2)

Publication Number Publication Date
JP2000003740A JP2000003740A (en) 2000-01-07
JP3521115B2 true JP3521115B2 (en) 2004-04-19

Family

ID=15867292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16839398A Expired - Fee Related JP3521115B2 (en) 1998-06-16 1998-06-16 Electronic unit wiring structure

Country Status (1)

Country Link
JP (1) JP3521115B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110915312A (en) * 2017-05-11 2020-03-24 株式会社自动网络技术研究所 Circuit structure and electrical connection box

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003189621A (en) * 2001-12-11 2003-07-04 Denso Corp Vehicle powering circuit device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110915312A (en) * 2017-05-11 2020-03-24 株式会社自动网络技术研究所 Circuit structure and electrical connection box
CN110915312B (en) * 2017-05-11 2021-03-26 株式会社自动网络技术研究所 Circuit structure and electrical connection box

Also Published As

Publication number Publication date
JP2000003740A (en) 2000-01-07

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