JP3520719B2 - Liquid crystal display device and projection display device using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a liquid crystal display device. More specifically, the present invention relates to an active matrix type liquid crystal display device in which a scanning side driving circuit and a signal side driving circuit are incorporated in the same substrate as a substrate on which pixel switching elements are formed. Further, the present invention relates to a projection display device using the liquid crystal display device as a light valve.

[0002]

2. Description of the Related Art An equivalent circuit of a conventional active matrix type liquid crystal display device is shown in FIG. The circuit shown in FIG. 3 is formed on one substrate of a liquid crystal panel in which a liquid crystal layer is sandwiched between a pair of substrates.

The signal side driving circuit formed on the substrate controls an analog switch 35 formed of a thin film transistor for sampling an image signal from a signal line 34 through which the image signal is transmitted in time series, and a sampling timing by the analog switch 35. Shift register circuit 3 for
7 and 7.

On the other hand, the pixel region 100 formed on the substrate
In the above, the scanning lines 31 and the data lines 33 are formed in a matrix form, and in the vicinity of the intersections thereof, a gate is connected to the scanning lines 31 and a source is connected to the data lines 33. 32) is formed. This TFT 32 is provided for each pixel.
And a pixel electrode (not shown) connected to the drain of the TFT and a charge storage capacitor are arranged. A common electrode 39 is formed on the opposing substrate of the liquid crystal panel, and an image is supplied to the pixel electrode via the data line 33 and the TFT 32 with respect to the liquid crystal layer 38 sandwiched between this pixel electrode and the common electrode. A potential difference between the signal and the common potential applied to the common electrode is applied.

A data line and a signal line 34 for supplying an image signal are connected to the analog switch 35. The shift register circuit 37 includes one using a clock gate and one using a transfer gate. A power supply voltage (not shown) is input to the shift register circuit 37 as an input signal.
In addition to the clock signal CLx and its inverted phase signal CLx
And the start pulse signal SPx, etc. are input, and the start pulse SPx is supplied at the beginning of the horizontal scanning period.
Are sequentially shifted by complementary clock signals, and as a result of the shift, sampling pulses of the analog switch 35 are sequentially generated. The analog switch 35 is provided for each data line 33, sequentially samples the time-series image signals transmitted to the signal line 34 in accordance with the output from the shift register circuit 37, and outputs to each data line 33. Output.

The scanning side drive circuit is composed of a shift register circuit 36. The shift register circuit 36 receives a power supply voltage (not shown) as input signals, a clock signal CLy and its inverted phase signal CLy, and a start pulse signal SPy. The start pulse SPy supplied at the beginning of the vertical scanning period is sequentially shifted by complementary clock signals, and as a result of the shift, scanning signals are sequentially output to the scanning lines 31.

Generally speaking, to drive a liquid crystal,
It is necessary to apply a voltage of about 5 V to the liquid crystal in order to secure the contrast. In addition, it is necessary to drive the liquid crystal display device with an alternating current in order to ensure the durability thereof, and as a result, an image signal to be actually applied is constituted by an alternating current waveform of about 0 V to 10 V on the liquid crystal. Furthermore, an analog switch 35 for sampling this image signal
Is usually constituted by an N-type thin film transistor, and in this case, the gate signal of the analog switch 35 needs to be a pulse signal having an amplitude of about 10 V or more in order to reduce the ON resistance.

FIG. 4 shows a connection state between a conventional liquid crystal display device and an external circuit.

The wiring of the signal line 34 is connected to the flat panel cable wiring 41 outside the liquid crystal panel module via the terminal portion formed on the panel substrate. A power supply voltage and various signals are supplied to the liquid crystal panel from the external drive circuit 45 via the cable wiring 41. In the front stage of the flat panel cable 41, the signal of 5V-TTL level output from the external drive circuit 45 is converted by the level shift circuit 42 into a signal having a voltage amplitude of 10V or more. The converted signal and power supply voltage are connected to the flat panel cable 41 via the wiring 44, the connector 43, and the like. Further, in the flat panel cable wiring 41 or wiring 44, all the signals input to the liquid crystal panel module are wired together, and a high-frequency signal such as a clock signal after level shift transmits a signal line for transmitting an image signal. Will be wired near the.

The above-mentioned conventional liquid crystal display device (especially small size) is generally mainly used for video signals for electronic viewfinders of camcorders, and in recent years, there are many demands for liquid crystal data projectors. Used for computer display screens.

[0011]

The small-sized TFT liquid crystal panel was mainly used for video image signals for electronic viewfinders of camcorders, etc., but in recent years, there have been many demands for liquid crystal data projector applications and many computer display screen specifications. It's coming. Accordingly, the number of horizontal pixels is 400 to 800, and the video signal frequency is 2 to 4 MH.
z, clock frequency of about 1 to 2 MHz was sufficient, but VGA at video frequency of 25 MHz to 32 MHz,
SVGA 30-40MHz, XGA 65MHz-8
High-speed frequencies of 90 to 135 MHz have been required for 5 Hz and SXGA. Specifically, the video frequency is 25 MHz to 32 MHz for VGA, 30 to 40 MHz for SVGA, and 65 MHz to 85 Hz for XGA.
XGA requires a high frequency of 90 to 135 MHz. The clock frequency also needs to be increased according to the video frequency. Further, in the case of performing display with pixel specifications equal to or less than the number of pixels that the device itself has in multi-sync drive or the like, it is necessary to drive and display at high speed in the blanking interval. In such a case, it is necessary to increase the speed of the clock signal and increase the clock frequency from 5 MHz to about 10 MHz.

However, the drive circuit of the liquid crystal panel requires the clock signal CL, the inverted phase signal CLx.sub .-- of the clock signal, and the image signal to be displayed. Supply of these signals to the liquid crystal panel is performed by cable wiring in which a plurality of wirings are bundled. Therefore, a large-amplitude / high-frequency signal such as a clock signal whose amplitude level has been shifted interferes with an analog image signal having a smaller amplitude to cause noise in the image signal line. Then, an image signal of an erroneous level is written in the data line 33 or the pixel electrode due to noise.

When the display is observed in such a state, a vertical line-shaped non-uniform display is observed at the time of raster halftone display, resulting in display failure. Particularly, in the case of a liquid crystal projector application, since a plurality of liquid crystal panels are arranged apart from each other, it is necessary to increase the distance from the control circuit that outputs the clock signal and the image signal, and increase the length of the cable wiring and the flat panel cable. . In such a situation, driving a high voltage at a high speed causes noise of the clock signal to easily get on the power supply or the image signal wiring, and when displaying, a line-shaped contrast unevenness appears. Further, there is a drawback that this tendency is further increased as the pixels are made finer and the driving frequency is made higher, and it becomes difficult to make the fineness higher.

Furthermore, since it is necessary to boost the signal voltage to a high voltage before the input to the liquid crystal panel, it is necessary to provide a level shift circuit externally, and when the circuit is integrated, it is possible to manufacture it by full custom. It was essential and was disadvantageous in terms of delivery time and cost.

Further, a high voltage of 10 V or more drives a flat panel cable or a wiring in a circuit at a high frequency such as a clock frequency, resulting in high power consumption, which is unsuitable for a camcorder for portable equipment or a display for a portable information terminal. It was suitable.

It is an object of the present invention to prevent a high frequency signal such as a clock signal from interfering with an image signal and causing noise in the image signal line.

[0017]

A liquid crystal display device according to the present invention comprises a data line and a scan line arranged in a matrix on a substrate, a first drive circuit for supplying a data signal to the data line, In a liquid crystal display device including a second drive circuit for supplying a scan signal to the scan line, and a switching element connected to the data line and the scan line, a clock signal supplied from outside the substrate Is provided on the substrate to supply the clock signal to the first driving circuit and / or the second driving circuit, and the signal input circuit is supplied as a current signal from outside the substrate. The clock signal is converted into a signal whose voltage level changes.

According to the present invention, the clock signal is transmitted as a current signal in the cable wiring outside the liquid crystal panel, and the voltage level (H level, L level) is transmitted by the signal input circuit on the panel substrate.
Since the signal is converted into a signal whose level changes, it is possible to suppress the noise generated in the conventional cable wiring.

Further, since the signal input circuit is a level shift circuit, the voltage level of the clock signal is boosted inside the substrate, so that a high-frequency signal having a large amplitude is not transmitted through the cable wiring and noise is generated. Is further suppressed.

Further, the signal input circuit formed on the substrate is surrounded by a wiring layer connected to a power supply potential. As a result, noise generated in the analog circuit that converts the clock signal, which is a high frequency signal, into a voltage signal from a current signal is shielded by the wiring layer arranged around the circuit, and is less likely to affect the image signal.

By using the above liquid crystal display device for a plurality of light valves provided in the projection display device, it is possible to suppress the noise generation which has been conventionally generated in the cable wiring from the control circuit to the liquid crystal light valves arranged apart from each other. can do.

[0022]

DETAILED DESCRIPTION OF THE INVENTION

(Embodiment 1) FIG. 1 shows an equivalent circuit block diagram of a liquid crystal display device of the present invention.

The liquid crystal display device is composed of a liquid crystal panel in which a liquid crystal layer is sandwiched between a pair of substrates. Pixels and driving circuits made of thin film transistors and the like are formed on one substrate of the liquid crystal panel.

Pixels formed in a matrix in the pixel region 100 are TFTs 1 provided near the intersections of the scanning lines 13 and the data lines 14 formed in a matrix on the substrate.
2, a pixel electrode (not shown) connected to this, and a charge storage capacitor. The pixel structure is the same as the conventional structure, and the gate of the TFT 12 is the scanning line 1
3, the source is connected to the data line 14, and the drain is connected to the pixel electrode and the charge storage capacitor. A common electrode is formed on the counter substrate of the liquid crystal panel, and the potential difference between the image signal applied to the pixel electrode and the common potential of the common electrode 19 is applied to the liquid crystal layer 17 sandwiched between the pixel electrode and the common electrode 19. . The image signal is supplied from the data line 14 to the pixel electrode through the TFT 12 which is made conductive by the scanning signal. The charge storage capacitance is
Is for holding the voltage of the image signal when is turned off.

An analog switch 11 composed of a TFT is connected to each of the data lines 14, and the analog switch 11 samples an analog image signal transmitted through the signal line 10 in time series to form an image on the data line 14. Supply a signal. The sampling timing signal is formed by the signal side drive circuit 15. This signal side drive circuit 15
Includes a shift register circuit. In addition to the power supply voltage, the shift register circuit supplies a start pulse SPx that is supplied at the beginning of the horizontal scanning period, a clock signal CLx that sequentially shifts this pulse, and its inverted phase signal CLx.
￣ is input by wiring on the board. This clock signal is a high frequency signal having a dot frequency of the image signal or a frequency which is a fraction of the dot frequency.

Further, the scanning side drive circuit 16 is provided on the scanning line 13.
The scanning signal is output from, and the scanning signal is supplied to the scanning line 13. The scanning side drive circuit 16 also includes a shift register circuit. The shift register circuit includes a power supply voltage, a start pulse SPy supplied at the beginning of the vertical scanning period, and a clock for sequentially shifting the pulse. The signal CLy and its inverted phase signal CLy are input via wiring on the substrate.

Signal side driving circuit 15 and scanning side driving circuit 16
The clock signal and the like respectively supplied to are supplied from the signal input circuit 18 formed on the substrate. Various signals are input to the signal input circuit 18 from the outside of the liquid crystal panel via a cable and a terminal formed on the substrate.

FIG. 2 shows an embodiment of a clock signal input circuit for inputting a clock signal for the signal side and / or scan side shift register circuit of the signal input circuit 18. The signal input circuit 29 is formed together with the drive circuit on the substrate of the liquid crystal panel.

The clock signal input circuit 29 shown in FIG.
It consists of a current switch circuit composed of T21 to T24.
The clock signal input circuit 29 receives a signal transmitted by cable wiring outside the liquid crystal panel from the terminal 2 on the board.
A signal is input via 0a and 20b.

As the final stage of the external circuit, a circuit using bipolar transistors 25 and 26 in FIG. 2 is used. An external circuit output clock signal 27 is input to the base of the transistor 25 to turn on / off the current flowing between the collector and the emitter. Similarly, the inverted clock signal 28 output from the external circuit is input to the base of the transistor 26 to turn on / off the current flowing between the emitter and the collector. Therefore, the clock signal 27 and the clock inversion signal 28 are converted into a current signal flowing through the cable wiring and input to the signal input circuit via the terminals 20a and 20b of the liquid crystal panel substrate.

The output potential of the current signal is determined by the current mirror circuit formed by the TFTs 21 to 24, and the clock signal CL is output.

The clock signal input circuit 29 is supplied with a power supply voltage VGG of 10 V or more, similarly to the external circuit.
The gates of the P-channel TFTs 21 and 22 are commonly connected,
The gate and drain of the TFT 21 are commonly connected.
The gates of the N-channel TFTs 23 and 24 are commonly connected, and the TFT 23 has its gate and drain commonly connected.

This operation is as follows.

When the bipolar transistor 25 is turned on, the TFTs 21 and 22 are turned on. At this time, since the bipolar transistor 26 is turned off, the TFTs 23 and 24
Also turn off. Therefore, the output CL becomes a clock signal having the H level phase of VGG. On the other hand, when the bipolar transistor 25 turns off and 26 turns on, the TFT 21
22 is turned off and the TFTs 23 and 24 are turned on, so that the output CL becomes a signal of the L level phase of the ground potential.

By converting the clock signal from the voltage signal to the current signal and inputting it to the liquid crystal display device as described in this embodiment, the noise generated in the wiring from the external circuit to the liquid crystal display device is significantly reduced. To be done. In addition, since it is turned on and off with a current signal from the outside, electromagnetic noise is extremely small compared to the type in which a high frequency voltage is input at a high voltage. Further, the wiring portion is in a state where the clock signal and the clock inversion signal flow currents in opposite directions.

Further, since the clock signal and the clock inversion signal are the wirings of the adjacent lines in the cable wiring and are the currents in the opposite directions, they are canceled and noise is not generated. Therefore, in the liquid crystal display device of the present invention, it is possible to prevent noise from being mixed in the image signal, and prevent occurrence of display defects such as line unevenness during display.

(Embodiment 2) As another embodiment of the present invention, the same effect can be obtained by the clock signal input circuit shown in FIG. Similar to FIG. 2, FIG. 5 also shows a clock signal input circuit for inputting a clock signal for the shift register circuit on the signal side and / or the scanning side. The signal input circuit 51 is formed on the substrate of the liquid crystal panel together with the drive circuit.

The clock signal input circuit 51 of FIG.
It is composed of a current switch circuit composed of T52 to T57.
The clock signal input circuit 51 receives signals transmitted from the outside of the liquid crystal panel by cable wiring and outputs them to the terminals 5 on the board.
A signal is input via 0a and 50b.

At the final stage of the external circuit arranged outside the liquid crystal panel, the clock signal 59 is input to the bases of the two bipolar transistors 58 and the current flowing between the collector and the emitter is converted into a current signal for turning on and off. To do.
Reference numeral 60 is a constant current source. In the clock signal input circuit 51 formed on one substrate of the liquid crystal panel,
The current mirror circuit composed of 57 level-shifts the current signal of the clock signal to the voltage VGG of 10 V or more and outputs it. Therefore, in the external circuit, 5V-TT
It can be configured as an L level circuit.

The output potential of the current signal is determined by the current mirror circuit formed by the TFTs 52 to 57, and the clock signal CL is output.

The clock signal input circuit 51 is supplied with a power supply voltage VGG of 10 V or higher, which is higher than that of the external circuit. The gates of the P-channel TFTs 52 and 53 are commonly connected, and the gate and drain of the TFT 53 are also commonly connected. The gates of the P-channel TFTs 54 and 55 are commonly connected, and the gates and drains of the TFT 54 are commonly connected. Further, the gates of the N-channel TFTs 56 and 57 are commonly connected, and the gate and drain of the TFT 57 are commonly connected.

This operation is as follows.

When both the bipolar transistors 58 are turned on, the TFTs 52 and 53 are turned on. In addition, TFT5
4.55 is turned on. Turning on the TFT 52 causes the TFT 5
6.57 turns off. Therefore, the output CL becomes a clock signal having the H level phase of VGG. On the other hand, when both the bipolar transistors 58 are turned off, the TFT 52.5
Both 3,54 and 55 are turned off. When the TFT 52 is turned off, the TFTs 56 and 57 are turned on, so that the output CL becomes a signal of the L level phase of the ground potential.

Although the clock signal 59 is an input of only the non-inverted signal, it is a current signal, so that the generation of clock noise or the like can be prevented. Further, the voltage level of the clock signal on the external circuit side may be a low voltage of about 5 V which is the TTL level, which eliminates the need for disposing a circuit such as a level shifter in an external wiring path, which is advantageous in terms of cost and delivery time of development.

In the liquid crystal display devices of Examples 1 and 2, polysilicon is often used as the material forming the TFT channel, but as a manufacturing method, amorphous silicon is formed by plasma CVD, and then thermal annealing, There are a method of crystal growth by heat treatment such as a lamp anneal and a laser anneal, and a method of forming polysilicon by a low pressure CVD.

(Embodiment 3) FIG. 6 shows a diagram in which the signal input circuits of Embodiments 1 and 2 are arranged on a substrate. In the figure, reference numeral 80 is a substrate on which a drive circuit of the liquid crystal panel and pixels are formed. To the terminal groups 81 to 84 and the like formed on the substrate, the electrode groups at the end portions of the wiring formed on the flexible tape and the like are connected through a conductive adhesive material, and the power supply voltage and Various signals are input. Terminal 81
Is an input terminal for the clock signal shown as 20a in FIG. 2 and 50a in FIG. The terminal 82 is an input terminal for the clock signal shown as 20b in FIG. 2 and 50b in FIG. The terminal 83 is a terminal for inputting a power supply voltage (ground potential). The terminal 84 is a terminal for inputting the power supply voltage VGG.

The signals and power supply voltages from these terminals are
It is input to the clock signal input circuit 85. The clock signals CL and CL here are output from the wirings 88 and 89 and supplied to the signal side or scanning side drive circuit. The conductive layer 56 is arranged in a ring shape around the clock signal input circuit 85. The conductive layer 86 is formed by a wiring layer different from the wiring for power supply voltage, signals, etc., and is connected to the ground potential through the contact hole 87.

Therefore, the noise generated from the analog circuit of the current mirror for converting the clock signal which is a high frequency signal can be prevented from being absorbed by the surrounding conductive layer 86 and being mixed into the image signal.

(Embodiment 4) In the liquid crystal display device of the present invention described above, the light flux emitted from the light source is mainly modulated based on the image signal, and the modulated light flux is emitted toward the screen by the magnifying lens. It can be used as a light modulator in a display device. FIG. 7 shows a plan view of an example of such a projection display device. White light emitted from a projection light source 61 such as a halogen lamp is condensed by a parabolic mirror 62, heat rays in the infrared region are cut by a heat ray cut filter 63, and only visible light enters a dichroic mirror system. First, the blue reflection dichroic mirror 64 reflects blue light and transmits other light. The reflected blue light changes its direction by the reflection mirror 65 and enters the blue modulation liquid crystal light valve 69.

The light transmitted through the blue reflection dichroic mirror 64 enters the green reflection dichroic mirror 66, reflects the green light, and transmits the other light, the red light. The reflected green light is a green modulation liquid crystal light valve 70.
Incident on.

The red light transmitted through the green reflection dichroic mirror 66 changes its direction by the reflection mirrors 67 and 68 and enters the red modulation liquid crystal bulb 71.

Blue light, green light and red light are respectively
Liquid crystal light valves 69, 7 according to the active matrix panel of the present invention driven by blue, green and red primary color signals.
After being modulated by 0, 71, they are combined by the dichroic prism 74. Dichroic prism 7
4 is configured such that the blue reflection surface 72 and the red reflection surface 73 are orthogonal to each other. The color image thus combined is enlarged and projected on the screen by the projection lens 75 and displayed.

[0053]

The liquid crystal display device of the present invention is turned on / off by an external current signal.

Therefore, electromagnetic noise is extremely small as compared with the type in which a high frequency and high frequency voltage is input.

Moreover, the wiring portion is in a state where the clock signal and the clock inversion signal flow currents in the opposite directions. Since the clock signal and the clock inversion signal are the wirings of the adjacent lines and the currents in the opposite directions, they are canceled and no noise occurs. Therefore, in the liquid crystal display device of the present invention, it is possible to prevent occurrence of display defects such as line unevenness during display.

Further, since the clock input circuit can raise the voltage to a predetermined voltage level, the external circuit does not need a level shift function, which is advantageous in terms of cost.

Further, when an external circuit is integrated into an IC, a level shift circuit is required, which is a full custom specification. In this case, costs, development costs, delivery time, etc. are disadvantageous.

Since the liquid crystal display device of the present invention can also incorporate a level shift function, only a gate array IC is required, and the cost,
It is advantageous in terms of delivery.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a liquid crystal display device of the present invention.

FIG. 2 is a clock signal input circuit diagram of the liquid crystal display device of the present invention.

FIG. 3 is an equivalent circuit diagram of a conventional liquid crystal display device.

FIG. 4 is a connection diagram of a conventional liquid crystal display device and an external drive circuit.

FIG. 5 is a diagram showing a clock signal input circuit of the liquid crystal display device of the present invention and a clock generation signal of an external circuit.

FIG. 6 is a layout diagram of a clock signal input circuit of the present invention on a panel substrate.

FIG. 7 is a diagram showing an application example in which the present invention is applied to a projection type liquid crystal display device.

[Explanation of symbols]

11 ... Analog switch 12 ... Thin film transistor 13 ... Scan line 14 ... Data line 15 ... Signal side drive circuit 16 ... Scan side drive circuit 17 ... Image signal line 18 ... Signal input circuits 21, 22, 23, 24 ... Clock signal input circuit transistors 25, 26 ... External clock drive circuit transistor 27 ... Clock signal 28 ... Clock inversion signal 31 ... Scan line 32・ ・ ・ Pixel transistor 33 ・ ・ ・ Data line 34 ・ ・ ・ Signal line 35 ・ ・ ・ Analog switch 41 ・ ・ ・ Flat panel cable 42 ・ ・ ・ Level shift circuit 43 ・ ・ ・ Connector 44 ・ ・ ・ Connection wiring 45 ・..External drive circuit 46 ... Liquid crystal display device 51 ... Clock signal input circuits 52, 53, 54, 55, 56, 57 ... For clock signal input circuits Transistor 58 ... external clock drive circuit transistor 59 ... external clock signal generating circuit

Front page continued (58) Fields surveyed (Int.Cl. ⁷ , DB name) G02F 1/133 550 G09C 3/36 H04N 5/66 102 H04N 5/74

Claims (4)

(57) [Claims] 1. A data line and a scan line arranged in a matrix on a substrate, a first drive circuit for supplying a data signal to the data line, and a first drive circuit for supplying a scan signal to the scan line. In a liquid crystal display device including a second drive circuit and a switching element connected to the data line and the scanning line, a clock signal supplied from the outside of the substrate is input to the first drive circuit and the first drive circuit. A signal input circuit for supplying the clock signal to one of the two drive circuits is provided on the substrate, and the signal input circuit changes the voltage level of the clock signal supplied as a current signal from outside the substrate. A liquid crystal display device characterized by being converted into a signal. 2. The liquid crystal display device according to claim 1, wherein the signal input circuit is a level shift circuit. 3. The liquid crystal display device according to claim 1, wherein the signal input circuit formed on the substrate is surrounded by a wiring layer connected to a power supply potential. 4. A projection type display device, comprising the liquid crystal display device according to claim 1 as a plurality of liquid crystal light valves, which are spaced apart from each other.