JP3507891B2 - Dielectric thin film and ferroelectric memory and integrated circuit - Google Patents

Dielectric thin film and ferroelectric memory and integrated circuit

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Publication number
JP3507891B2
JP3507891B2 JP2001189808A JP2001189808A JP3507891B2 JP 3507891 B2 JP3507891 B2 JP 3507891B2 JP 2001189808 A JP2001189808 A JP 2001189808A JP 2001189808 A JP2001189808 A JP 2001189808A JP 3507891 B2 JP3507891 B2 JP 3507891B2
Authority
JP
Japan
Prior art keywords
thin film
dielectric thin
ferroelectric memory
integrated circuit
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2001189808A
Other languages
Japanese (ja)
Other versions
JP2003007983A (en
Inventor
豊裕 知京
アヘメト パールハット
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute for Materials Science
Original Assignee
National Institute for Materials Science
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Institute for Materials Science filed Critical National Institute for Materials Science
Priority to JP2001189808A priority Critical patent/JP3507891B2/en
Publication of JP2003007983A publication Critical patent/JP2003007983A/en
Application granted granted Critical
Publication of JP3507891B2 publication Critical patent/JP3507891B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】この出願の発明は、誘電体薄
膜ならびに強誘電体メモリおよび集積回路に関するもの
である。さらに詳しくは、この出願の発明は、高安定な
誘電体/半導体構造を実現する新しい誘電体薄膜、なら
びにそれを用いた新しい強誘電体メモリおよび集積回路
に関するものである。
TECHNICAL FIELD The present invention relates to a dielectric thin film, a ferroelectric memory and an integrated circuit. More specifically, the invention of this application relates to a new dielectric thin film that realizes a highly stable dielectric / semiconductor structure, and a new ferroelectric memory and an integrated circuit using the same.

【0002】[0002]

【従来の技術】次世代の低消費電力化と高速・高集積化
を実現するメモリとして、強誘電体メモリ(FRAM
(登録商標))が知られている。この強誘電体メモリ
は、電荷を蓄積するキャパシタ部分に強誘電体を用いる
ことで長期間、電力なしでデータを維持することが可能
な不揮発性メモリである。現在、このキャパシタ部分に
は白金電極が主に用いられている。これは、白金が酸化
物との界面形成において安定であり、かつその上に成長
させた強誘電体材料が<100>方向に配向することによっ
ている。
2. Description of the Related Art Ferroelectric memory (FRAM) is used as a memory for realizing next-generation low power consumption, high speed, and high integration.
(Registered trademark)) is known. This ferroelectric memory is a non-volatile memory that can maintain data for a long period of time without power by using a ferroelectric material in a capacitor portion that stores electric charges. Currently, platinum electrodes are mainly used in this capacitor part. This is because platinum is stable at the interface formation with the oxide, and the ferroelectric material grown on it is oriented in the <100> direction.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、この強
誘電体メモリでは、白金の利用に上記利点がある反面、
白金がその触媒作用から、後の水素雰囲気の熱処理にお
いて強誘電体を還元し、メモリ特性の劣化の原因にもな
るといった問題をかかえている。
However, in this ferroelectric memory, the use of platinum has the above advantages, but
Due to its catalytic action, platinum reduces the ferroelectric substance in the subsequent heat treatment in a hydrogen atmosphere and causes deterioration of memory characteristics.

【0004】また、次世代の集積回路では、Si基板上
に誘電体材料を成長させた電界効果型トランジスタやそ
のゲート酸化膜を強誘電体メモリとして使用することも
考えられているが、Si基板上に誘電体である酸化物を
成長させると界面で反応が起きてしまうといった問題が
ある。
In the next-generation integrated circuit, it is also considered to use a field effect transistor having a dielectric material grown on a Si substrate and its gate oxide film as a ferroelectric memory. There is a problem that reaction occurs at the interface when an oxide that is a dielectric is grown on top.

【0005】そこで、この出願の発明は、以上のとおり
の事情に鑑みてなされたものであり、従来技術の問題点
を解消し、界面反応を抑制して、高温でも安定な誘電体
/半導体構造を実現することのできる、新しい誘電体薄
膜、ならびに新しい強誘電体メモリおよび集積回路を提
供することを課題としている。
Therefore, the invention of this application has been made in view of the above circumstances, and solves the problems of the prior art, suppresses the interfacial reaction, and stabilizes the dielectric / semiconductor structure even at high temperature. It is an object of the present invention to provide a new dielectric thin film, a new ferroelectric memory and an integrated circuit capable of realizing the above.

【0006】[0006]

【課題を解決するための手段】この出願の発明は、上記
の課題を解決するものとして、第1には、半導体基板上
に形成された誘電体薄膜であって、半導体基板との間に
介在層として絶縁体単原子炭素膜が設けられていること
を特徴とする誘電体薄膜を提供する。
The invention of this application is to solve the above-mentioned problems. Firstly, a dielectric thin film formed on a semiconductor substrate is provided between the semiconductor substrate and the dielectric thin film.
Provided is a dielectric thin film having an insulating monatomic carbon film as an intervening layer .

【0007】また、この出願の発明は、第2には、上記
の誘電体薄膜が用いられていることを特徴とする強誘電
体メモリ、第3には、上記の誘電体薄膜が用いられてい
ることを特徴とする集積回路を提供する。
The invention of this application is, secondly, a ferroelectric memory characterized by using the above-mentioned dielectric thin film, and thirdly, using the above-mentioned dielectric thin film. An integrated circuit characterized by being provided.

【0008】[0008]

【発明の実施の形態】この出願の発明の誘電体薄膜は、
半導体基板上に形成される際に、介在層として絶縁体
原子炭素膜を設けるようにしたものである。より具体的
には、たとえば図1に例示したように、Si、GaAs
などの半導体基板上に絶縁体炭素膜を1原子層からたと
えば数十nm成長させ、さらにその上に酸化物、窒化
物、フッ化物、硫化物などを含む誘電体特性を示す材料
を積層させる。
BEST MODE FOR CARRYING OUT THE INVENTION The dielectric thin film of the invention of this application is
An insulator monatomic carbon film is provided as an intervening layer when it is formed on a semiconductor substrate. More specifically, for example, as illustrated in FIG. 1, Si, GaAs
An insulating carbon film is grown from an atomic layer, for example, to several tens of nm on a semiconductor substrate such as, and a material having dielectric properties including oxide, nitride, fluoride, sulfide and the like is further stacked thereon.

【0009】[0009]

【0010】原子層の炭素を半導体基板上に成長させ
ることで化学的に安定な表面を作製することができる。
この表面は酸素雰囲気でも酸化されることがない。この
上に高誘電体材料や強誘電体材料を成長させることで、
従来問題とされていた界面反応を抑制し、急峻で安定し
た酸化物/半導体界面を形成できるのである。
A chemically stable surface can be produced by growing one atomic layer of carbon on a semiconductor substrate.
This surface is not oxidized even in an oxygen atmosphere. By growing high dielectric material and ferroelectric material on this,
It is possible to form a steep and stable oxide / semiconductor interface by suppressing the interface reaction, which has been a problem in the past.

【0011】このことは、次世代集積回路におけるゲー
ト酸化膜と半導体基板との界面安定性に寄与することが
でき、さらに電界効果型強誘電体メモリへの応用も可能
である。図2は、この誘電体薄膜を用いた電界効果型強
誘電体メモリ構造の一例を示したものであり、低消費電
力・高速・高集積と安定性とを両立した極めて優れたデ
バイスとなる。
This can contribute to the interface stability between the gate oxide film and the semiconductor substrate in the next-generation integrated circuit, and can also be applied to the field effect type ferroelectric memory. FIG. 2 shows an example of a field effect type ferroelectric memory structure using this dielectric thin film, which is an extremely excellent device which has both low power consumption, high speed, high integration and stability.

【0012】この出願の発明は、上記のとおりの特徴を
有するものであるが、以下に、添付した図面に沿って実
施例を示し、さらに詳しくこの出願の発明の実施の形態
について説明する。
The invention of this application has the characteristics as described above, but the embodiments will be described below in more detail with reference to the accompanying drawings.

【0013】[0013]

【実施例】[実施例1]まずSi(100)基板上に室温で2
0nmの単原子炭素膜を堆積し、それを700℃で酸素
雰囲気にて加熱した。続いてその上に700℃で高誘電
体材料であるSrTiO3を堆積した。
[Example] [Example 1] First, 2 at room temperature on a Si (100) substrate.
A 0 nm monatomic carbon film was deposited and heated at 700 ° C. in an oxygen atmosphere. Then, SrTiO 3 which is a high dielectric material was deposited thereon at 700 ° C.

【0014】作製した誘電体薄膜のX線回折を測定した
ところ、図3から明らかなように、SrTiO3は<100>方向
に配向していることが示された。また、透過型電子顕微
鏡による断面構造観察では、図4に示したように、<1
00>方向に配向していること、粒界は緻密であるこ
と、炭素膜/Si界面およびSrTiO3/炭素膜界面はいつ
でも急峻で反応層のないこと、が観察された。Si上に直
接SrTiO3を高温で成長させた場合では、通常、図5にも
例示したように界面で反応が起こり、SiO2層(明るい帯
状部分)と非晶質SrTiO3(その上の少し明るい帯状部
分)が形成されるが、この出願の発明によれば界面反応
が抑制され、安定した誘電体/半導体構造が実現される
のである。
When X-ray diffraction of the produced dielectric thin film was measured, it was shown that SrTiO 3 was oriented in the <100> direction, as is clear from FIG. In addition, in the cross-sectional structure observation with a transmission electron microscope, as shown in FIG.
It was observed that they were oriented in the 00> direction, the grain boundaries were dense, and that the carbon film / Si interface and the SrTiO 3 / carbon film interface were always steep and had no reaction layer. In the case where the grown directly SrTiO 3 at a high temperature on the Si, typically, a reaction occurs at the interface, as also illustrated in FIG. 5, the amorphous SrTiO 3 and SiO 2 layer (light swath) (slightly above it Although a bright strip portion is formed, the invention of this application suppresses the interfacial reaction and realizes a stable dielectric / semiconductor structure.

【0015】もちろん、高誘電体材料の代わりに強誘電
体材料、たとえばPb(Zrx,Ti1-x)O3やBi4Ti3O12などを用
いても、同様に優れた特性の強誘電体薄膜を実現するこ
とができる。
Of course, even if a ferroelectric material such as Pb (Zr x , Ti 1-x ) O 3 or Bi 4 Ti 3 O 12 is used instead of the high-dielectric material, it is possible to obtain the same excellent characteristics. A dielectric thin film can be realized.

【0016】この出願の発明は以上の例に限定されるも
のではなく、細部については様々な態様が可能であるこ
とは言うまでもない。
It is needless to say that the invention of this application is not limited to the above examples, and various details can be made.

【0017】[0017]

【発明の効果】以上詳しく説明したとおり、この出願の
発明によって、界面反応を抑制し、高温でも安定な誘電
体/半導体構造を実現することのできる、新しい誘電体
薄膜が提供され、この誘電体薄膜を用いることで、低消
費電力・高速・高集積性と安定性とを兼ね備えた次世代
強誘電体メモリおよび次世代集積回路が実現されること
となる。
As described in detail above, the invention of this application provides a new dielectric thin film capable of suppressing an interfacial reaction and realizing a stable dielectric / semiconductor structure even at a high temperature. By using a thin film, a next-generation ferroelectric memory and a next-generation integrated circuit having low power consumption, high speed, high integration, and stability will be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】この出願の発明の誘電体薄膜を説明するための
図である。
FIG. 1 is a diagram for explaining a dielectric thin film of the invention of this application.

【図2】この出願の発明の誘電体薄膜を用いたFET型
強誘電体メモリ構造の一例を示した概念図である。
FIG. 2 is a conceptual diagram showing an example of a FET type ferroelectric memory structure using the dielectric thin film of the invention of this application.

【図3】SrTiO3/炭素膜/Si(100)構造を持つ誘電体薄
膜のX線回折測定結果を示した図である。
FIG. 3 is a diagram showing an X-ray diffraction measurement result of a dielectric thin film having a SrTiO 3 / carbon film / Si (100) structure.

【図4】SrTiO3/炭素膜/Si(100)構造を持つ誘電体薄
膜の透過型電子顕微鏡像である。
FIG. 4 is a transmission electron microscope image of a dielectric thin film having a SrTiO 3 / carbon film / Si (100) structure.

【図5】SrTiO3/Si(100)構造を持つ従来の誘電体薄膜
の透過型電子顕微鏡像である。
FIG. 5 is a transmission electron microscope image of a conventional dielectric thin film having a SrTiO 3 / Si (100) structure.

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 27/105 H01L 21/8247 H01L 29/78 H01L 29/788 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 27/105 H01L 21/8247 H01L 29/78 H01L 29/788

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体基板上に形成された誘電体薄膜で
あって、半導体基板との間に介在層として絶縁体単原子
炭素膜が設けられていることを特徴とする誘電体薄膜。
1. A dielectric thin film formed on a semiconductor substrate, wherein an insulating monatomic carbon film is provided as an intervening layer between the dielectric thin film and the semiconductor substrate.
【請求項2】 請求項1の誘電体薄膜が用いられている
ことを特徴とする強誘電体メモリ。
2. A ferroelectric memory, wherein the dielectric thin film according to claim 1 is used.
【請求項3】 請求項1の誘電体薄膜が用いられている
ことを特徴とする集積回路。
3. An integrated circuit using the dielectric thin film according to claim 1.
JP2001189808A 2001-06-22 2001-06-22 Dielectric thin film and ferroelectric memory and integrated circuit Expired - Lifetime JP3507891B2 (en)

Priority Applications (1)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001189808A JP3507891B2 (en) 2001-06-22 2001-06-22 Dielectric thin film and ferroelectric memory and integrated circuit

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Publication Number Publication Date
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JP3507891B2 true JP3507891B2 (en) 2004-03-15

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* Cited by examiner, † Cited by third party
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WO2022230787A1 (en) * 2021-04-26 2022-11-03 パナソニックIpマネジメント株式会社 Capacitor, electric circuit, circuit board, and apparatus
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