JP3468206B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip type or chip stacked type semiconductor device in which a plurality of semiconductor chips are mounted in a thin package.

[0002]

2. Description of the Related Art In the standardized surface mount semiconductor package technology, a semiconductor chip is mounted on a die pad portion of a lead frame made of a copper (Cu) alloy or an iron-nickel (Fe-Ni) alloy by die bonding.
The bonding pad (electrode pad) of the semiconductor chip and the tip of the lead portion of the lead frame are wire-bonded with a fine metal wire such as a gold (Au) wire, and resin-molded with a mold having a predetermined shape to form a package body. It is composed.

The flow of this technology has been made lighter, thinner, shorter, smaller, and lower in cost with the times.

A conventional surface mount type semiconductor device will be described below with reference to the drawings. FIG. 6 is a main sectional view showing a conventional semiconductor device. In the drawing, a part of the structure showing the sealing resin is shown as a dot substitute for hatching.

As shown in FIG. 6, the conventional semiconductor device is
A semiconductor chip 3 is mounted on the die pad 2 of the lead frame 1 by die bonding via an adhesive 4, and a bonding pad (not shown) of the semiconductor chip 3 is mounted.
And the tip of the inner lead portion 1a of the lead frame 1 are wire-bonded with a thin metal wire 5 to make an electrical connection, and are molded with a sealing resin 6 with a mold having a predetermined shape to form a semiconductor device. It is a thing. Then, after the resin is sealed and the resin is cured, the outer lead portion 1b of the lead frame 1 of the semiconductor device taken out from the mold is processed into a predetermined lead shape by the lead forming mold.

After the semiconductor device is completed, electrical connection, signal inspection, and reliability test are carried out, and products which are judged as non-defective are packaged and shipped.

In recent years, the development of LSIs has been progressing rapidly in memory / logic mixed mounting and analog / digital mixed mounting, but the cost competitiveness of the market has further advanced, and it is now advantageous to simply combine them into a single chip to overcome cost competition. The condition is disappearing.

Therefore, there is a possibility that selecting an optimum chip having cost competitiveness in the global market and packaging a plurality of semiconductor chips into one package will make much more profit than forming one chip by mixed mounting. . An example thereof is a chip stack type semiconductor device.

The chip-stacked semiconductor device has a first lead frame and a die pad on the lead frame.
The semiconductor chip is die-bonded, and the second semiconductor chip is die-bonded to the back surface of the die pad, and then wire bonding with each inner lead is performed by a fine metal wire, and an outer mold is formed by a sealing resin. Was in one package.

A conventionally proposed chip stack type semiconductor device will be described.

FIG. 7 shows a first structural example of a conventional semiconductor device of chip laminated type. FIG. 7 (a) is a two chip mounted type, and FIG. 7 (b) is a laminated structure similar to that of FIG. 7 (a). FIG. 4 is a main cross-sectional view showing a 4-chip mounted semiconductor device having the above.
In the drawing, a part of the structure showing the sealing resin is shown as a dot substitute for hatching.

As shown in FIG. 7, in the first conventional structure example, the first semiconductor chip 3f is die-bonded onto the die pad 2 of the lead frame 1 via the lead frame 1 by the adhesive 4, and the die pad is formed. Second on the back of 2
After the surface of the semiconductor chip 3s is die-bonded, the metal wires 5f and 5s electrically connect the first and second semiconductor chips 3f and 3s to the same surface of each inner lead 1a, and the sealing resin 6 The outer mold is made by using two chips or more in one package.

Next, FIG. 8 shows a second structural example of a conventional chip stack type semiconductor device. FIG. 8A is a two-chip mounting type and FIG. 8B is the same as FIG. 8A. FIG. 6 is a cross-sectional view of a main portion showing a 4-chip mounted semiconductor device having a laminated structure.

As shown in FIG. 8, in the second conventional structure example, the first semiconductor chip 3f is die-bonded with the adhesive 4 onto the die pad 2 of the lead frame 1 via the lead frame 1, and the die pad is formed. Second on the back of 2
After the semiconductor chip 3s is die-bonded, the first and second semiconductor chips 3f,
3 s and each inner lead 1 a are electrically connected to each other on the front surface and the back surface, and the outer periphery is molded by the sealing resin 6 to form two packages or more into one package.

FIG. 9 shows a third structural example of a conventional chip-stacked type semiconductor device. FIG. 9 (a) is a two-chip mounted type, and FIG. 9 (b) is a stack similar to FIG. 9 (a). FIG. 4 is a cross-sectional view of a main portion showing a 4-chip mounted semiconductor device having a structure.

As shown in FIG. 9, in the third conventional structure example, the bottom surface of the first semiconductor chip 3f is die-bonded onto the die pad 2 of the lead frame 1 by the adhesive 4, and the first semiconductor chip is formed. After the second semiconductor chip 3s is die-bonded to the surface of 3f on the bottom surface side with the adhesive 4, the first and second metal thin wires 5f and 5s are used.
The semiconductor chips 3f and 3s are electrically connected to the same surface of each inner lead 1a, and the encapsulation resin 6 is used to mold the surroundings to form two or more chips in one package.

[0017]

However, in the conventional semiconductor device described above, particularly in the case of a chip stack type semiconductor device, a plurality of semiconductor chips are intentionally mounted on the recent semiconductor device structure which tends to be light, thin, short and small. ,
There is a concern that the inside of the semiconductor device will become more dense and reliability and production stability will be reduced.

In the conventionally proposed chip-stacking type semiconductor device, specifically, various problems such as damage to the chip surface in the stacking method, wire bond stability, and resin thickness stability in thin package correspondence. There is.

In particular, in the structure shown in FIG. 7 of the above-described conventional semiconductor device of chip stack type, when the back surface of another semiconductor chip is mounted on the semiconductor chip element surface, in this case, the machine to the element surface is machined. It is necessary to separately develop a new material that solves electrical damage such as static damage, electrical damage such as back bias, and chemical damage from adhesives, as well as a new method for achieving reliable adhesion.

Further, the structure shown in FIG. 8 of the conventional chip stack type semiconductor device is a structure in which the respective back surfaces of the first and second semiconductor chips are adhered to the upper and lower surfaces of the die pad of the lead frame. It seems that there is no damage to the surface of the semiconductor chip, but when the second semiconductor chip is die-bonded or wire-bonded, a measure for preventing damage to the element surface of the first semiconductor chip existing on the opposite surface of the die pad. It is necessary to separately develop the new construction method.

Further, in the structure shown in FIG. 9 of the conventional chip-stacked type semiconductor device, a method of exposing the die pad of the lead frame to the surface of the molded encapsulating resin for stacking in a thin package is adopted. However, due to high-pressure injection during resin encapsulation, resin burrs are likely to occur between the exposed surface and the molding die surface, and in the worst case, molding failure may occur.

As described above, the conventional chip stack type semiconductor device has various problems and concerns, and a semiconductor device having a new structure that solves these problems is desired. Furthermore, in order to quickly shift to a production system that is in line with the times and, on the contrary, to be able to withdraw quickly, there is a demand for the minimum required technology, a minimum capital investment, and a semiconductor device structure that can be accommodated by existing equipment. It

The present invention solves the above-mentioned problems of the conventional semiconductor device, particularly various problems of the chip-stacked semiconductor device seen in recent years, and can cope with high production versatility, high reliability, low cost and high density mounting. An object is to provide a semiconductor device.

[0024]

Means for Solving the Problems A semiconductor device of the present invention to solve the conventional problems is the semiconductor device in which at least two or more semiconductor chips mounted against rie de frame, the die pad of a lead frame A thermoplastic adhesive sheet attached on the main surface, a first semiconductor chip adhered to the die pad on the element surface side of the thermoplastic adhesive sheet, and an adhesive on the back surface side of the first semiconductor chip Another second semiconductor chip laminated and adhered with a chemical agent is connected to the first semiconductor chip and the surface of the lead portion of the lead frame, and the loop height is the die.
Sum of the thickness of the pad and the thickness of the thermoplastic adhesive sheet
A lower first metal thin wire, a second metal thin wire connecting the second semiconductor chip and the back surface of the lead portion, a part of the lead portion of the lead frame and a side opposite to the main surface of the die pad Exposing the surface of the first semiconductor chip, the second semiconductor chip and the first thin metal wire, the second
Is a semiconductor device made of a sealing resin that seals the region of the metal fine wire.

Further, the semiconductor device of the present invention, first adhered to the die pad with a thermoplastic adhesive sheet is attached on the main surface of the die pad of rie de frame, the element surface side with respect to the thermoplastic adhesive sheet 1 semiconductor chip,
Another second semiconductor chip laminated and adhered to the back side of the first semiconductor chip with an adhesive, and another third semiconductor chip laminated and adhered to the back side of the first semiconductor chip with an adhesive.
Connects the semiconductor chip, and said first semiconductor chip and the surface of the lead portion of the lead frame, the loop height is the
Between the thickness of the die pad and the thickness of the thermoplastic adhesive sheet
A first metal thin wire lower than the total sum, a second metal thin wire connecting the second semiconductor chip and the back surface of the lead portion, and a third metal thin wire connecting the third semiconductor chip and the back surface of the lead portion. 3, a thin metal wire, a chip connecting thin wire connecting the second semiconductor chip and the third semiconductor chip, a part of the lead portion of the lead frame and a surface opposite to the main surface of the die pad are exposed. And sealing for sealing the regions of the first semiconductor chip, the second semiconductor chip, the third semiconductor chip and the first metal thin wire, the second metal thin wire, the third metal thin wire, and the chip connecting thin wire. A semiconductor device made of resin.

Specifically, at least the first semiconductor chip and the second semiconductor chip are rectangular in a planar shape and are stacked with a certain amount of overhang or more. Is a semiconductor device in which the long side of the second semiconductor chip is orthogonal to the short side of the semiconductor chip.

Further, the die pad is a semiconductor device having a PSD (point supported die pad) shape having a plurality of supporting portions bonded to the semiconductor chip, and one surface of the PSD is exposed on the same surface as the sealing resin surface. is there.

As described above, according to the semiconductor device of the present invention, it is possible to secure the stability of the position of the semiconductor chip in the semiconductor device in the laminated chip state, effectively utilize the existing construction method and equipment, secure the manufacturing stability, and secure the reliability. Three points can be achieved.

Further, in the semiconductor device of the present invention, the first semiconductor chip and the second semiconductor chip are rectangular in plan view and are stacked with an overhang amount of a certain value or more. Since the long side of the second semiconductor chip is laminated so as to be orthogonal to the short side of the first semiconductor chip, there is no obstacle in connecting each semiconductor chip and the lead portion with the thin metal wire. A stable wire bond can be made.

[0030]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a semiconductor device of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a main portion showing a semiconductor device of this embodiment. In FIG. 1, FIG. 1A is a diagram showing a 2-chip stacked semiconductor device, and FIG. 1B is a diagram showing a 3-chip stacked semiconductor device. In the drawing, a part of the structure showing the sealing resin is shown as a dot substitute for hatching.

In general, in the semiconductor device of this embodiment, the front surface of the first semiconductor chip 3f is die-bonded to the back surface side of the die pad 2 of the lead frame 1 with the adhesive 4, and the bottom surface of the first semiconductor chip 3f is bonded. The second semiconductor chip 3s has a structure in which the bottom surface side is die-bonded via the adhesive 4, and the fine metal wires 5f and 5s form the surfaces of the first and second semiconductor chips 3f and 3s and the inner leads 1a. The back surface is electrically connected, and the encapsulation resin 6 is used to mold the surroundings to form two or more chips into one package.

Specifically, the semiconductor device shown in FIG. 1A is a semiconductor device in which at least two semiconductor chips are mounted on the lead frame using a lead frame for electrical connection. , A thermoplastic adhesive sheet 7 as an adhesive provided on the main surface of the die pad 2 of the lead frame 1, and a first semiconductor adhered to the die pad 2 on the element surface side of the thermoplastic adhesive sheet 7. The chip 3f and another second semiconductor chip 3s adhered to the back surface side of the first semiconductor chip 3f by another adhesive 4.
A first thin metal wire 5f connecting the first semiconductor chip 3f and the surface of the tip of the inner lead portion 1a of the lead frame 1, and the second semiconductor chip 3s and the tip of the inner lead portion 1a of the lead frame. The second that is connected to the back
Of the metal thin wire 5s, the outer lead portion 1b of the lead frame 1, and the surface of the die pad 2 to which the semiconductor chip is not bonded are exposed to expose the first semiconductor chip 3f, the second semiconductor chip 3s and the first metal thin wire 5f, 2 thin metal wire 5
The semiconductor device is made of the sealing resin 6 that seals the region s.

The semiconductor device shown in FIG. 1B is a semiconductor device in which at least three semiconductor chips are mounted on the lead frame using a lead frame for electrical connection. Thermoplastic adhesive sheet 7 as an adhesive attached on the main surface of the die pad 2, and the first semiconductor chip 3 adhered to the die pad 2 on the element surface side of the thermoplastic adhesive sheet 7.
f and another adhesive 4 on the back surface side of the first semiconductor chip 3f.
First metal thin wire 5f connecting the other second semiconductor chip 3s and third semiconductor chip 3t, which are bonded together by the above, to the first semiconductor chip 3f and the surface of the tip of the inner lead portion 1a of the lead frame 1. And the second semiconductor chip 3s
And a second metal thin wire 5s that connects the back surface of the tip of the inner lead portion 1a of the lead frame, and a third metal that connects the third semiconductor chip 3t and the back surface of the tip of the inner lead portion 1a of the lead frame. The thin wire 5t, the chip connecting thin wire 8 connecting the second semiconductor chip 3s and the third semiconductor chip 3t, the outer lead portion 1b of the lead frame 1, and the surface of the die pad 2 to which the first semiconductor chip is not bonded are exposed. Then, the first semiconductor chip 3f, the second semiconductor chip 3s, the third semiconductor chip 3t, the first thin metal wire 5f, the second thin metal wire 5s, and the third thin metal wire 5 are formed.
t, a semiconductor device including a sealing resin 6 that seals the region of the chip connection thin wire 8.

That is, the semiconductor device of this embodiment is a semiconductor device in which one surface of the die pad 2 of the lead frame 1 is exposed to the outside of the sealing resin 6 and chips are stacked, and the semiconductor chip position in the semiconductor device in the chip stacked state is determined. It is possible to ensure stability. Further, in the die pad of the lead frame, the surface of the thermoplastic adhesive sheet 7 opposite to the pasting surface is exposed on the same plane as the sealing resin surface in the resin mold state. This is a semiconductor device in which the thickness of the sealing resin from the element surface of the semiconductor chip can be regulated to a constant value by the total thickness with the thickness of the sheet 7. In addition, the first semiconductor chip 3
f and the second semiconductor chip 3s have a rectangular shape in a plan view and are stacked with an overhang amount of a certain amount or more (500 [μm]), and the short length of the first semiconductor chip 3f. The second semiconductor chip 3s with respect to the side
Are stacked so that their long sides are orthogonal to each other. As a result, each semiconductor chip and the inner lead portion 1a are separated from each other by the thin metal wire 5.
Stable connection at f and 5s.

The thermoplastic adhesive sheet 7 is a polyimide base and is a high heat resistant tape material commonly called LOC (lead on chip) tape. By using this material, Ag paste is used for the die pad of the lead frame. Higher solder heat resistance can be obtained than in the case.

Further, in the semiconductor device of this embodiment, the die pad 2 has a PSD (point supported die pad) shape having a plurality of supporting portions bonded to the semiconductor chip, and one surface of the PSD is exposed on the sealing resin surface. The exposed area can be made smaller than that of a normal square die pad, and the reliability can be maintained.

Next, a method of manufacturing the semiconductor device of this embodiment will be described.

First, bending is performed to a predetermined depth so that the die pad surface of the lead frame is exposed on the sealing die surface. The bends are made on the die pad support leads with the extensions connected to the four corners of the die pad of the lead frame toward the corners of the package. Then, a thermoplastic adhesive sheet is attached on the die pad, but since the die pad has a PSD (point supported die pad) shape including a plurality of supporting portions, the thermoplastic adhesive sheet is also attached in a divided state.

In the step of mounting the semiconductor chip, first, the first semiconductor chip is bonded. The equipment used in this case is a so-called LOC (lead-on-chip) bonder. The lead frame and the diced wafer are supplied to the equipment, and the thermoplastic adhesive sheet attached on the die pad of the lead frame is called a preheat. It is heated to make it sticky.

The semiconductor chips separated from the wafer are conveyed to the main heating stage, and then, the semiconductor chip surface, the thermoplastic adhesive sheet, the die pad, and the pressing jig are vertically aligned in this order in the pressing jig. The surface of the first semiconductor chip is adhered to the thermoplastic adhesive sheet and the die pad by sandwiching the main heating stage.

Next, the second semiconductor chip is bonded. The equipment used in this case is a so-called die bonder, and supplies a lead frame magazine storing a lead frame on which the first semiconductor chip is mounted and a diced wafer. At this time, the lead frame needs to be inverted so that the back surface of the first semiconductor chip faces upward.

Then, an adhesive such as silver (Ag) paste is applied to the back surface of the first semiconductor chip of the supplied lead frame, and then the second semiconductor chip is bonded to cure the paste. An in-line curing furnace is used to cure the paste.

Next, wire bonding is carried out. On this occasion,
The condition is that the size difference between the first semiconductor chip and the second semiconductor chip is secured at a certain level or more. That is, with the same chip size, wire bonding may not be possible even with this method. The size of this semiconductor chip will be described with reference to the drawings.

2 to 5 show the definition of chip size. In each figure, (a) is a plan view and (b) is a cross-sectional view near the die pad 2. In the plan view, a transparent state is shown to show a part of the internal structure, and in the cross-sectional view, a part of the structure showing the sealing resin is shown as a hatching substitute.

First, as shown in FIG. 2, wire bonding is impossible when the vertical and horizontal sizes of the first and second semiconductor chips 3f and 3s are substantially the same and the sizes are close to a square.

Further, the first and second semiconductor chips 3f, 3
Even if s has a rectangular shape, wire bonding is impossible if they are arranged in the same direction. However, as shown in FIG. 3, the first and second
Even if the semiconductor chips 3f and 3s are rectangular with the same shape, wire bonding is possible depending on the overhang amount 9 when they intersect at 90 degrees. The need for overhang is because the jig is commonly used for contacting the heater plate during wire bonding.

The chip size state shown in FIGS. 4 and 5 is as follows.
The chip overhang amount 9 is in a state of satisfying a certain condition, and the first and second semiconductor chips 3f, 3s are stacked with each other with an overhang amount of a certain amount or more.
Preferably, as shown in FIGS. 4 and 5, both semiconductor chips have a rectangular shape and are stacked with an overhang amount of a certain amount or more.
The second semiconductor chips 3s are stacked so that the long sides thereof are orthogonal to the short sides thereof. The overhang amount 9 depends on the thickness of the semiconductor chip and the alignment accuracy of the equipment, but when the semiconductor chip thickness is 200 [μm] or less, the overhang amount 9 after alignment is 500 [μ
m] or more, a problem may occur during wire bonding, and stable wire bonding may not be possible.
The amount of overhang becomes a problem when wire bonding the first semiconductor chip 3f. First semiconductor chip 3
The height of the wire bond loop of f must be lower than the sum of the thickness of the die pad 2 and the thickness of the thermoplastic adhesive sheet after the semiconductor chip is attached, and should be a low loop.

Next, wire bonding of the second semiconductor chip is carried out. In this case, the frame must be inverted again so that the element surface of the second semiconductor chip faces upward. When wire-bonding the second semiconductor chip, it is necessary to prevent the wire of the wire-bonded first semiconductor chip from coming into contact with the jig or the transport system.

Next, the lead frame on which the chip is mounted is put into the sealing molding die, and the die pad exposure direction can be arbitrarily changed. The lead frame die pad depth at the time of inserting the die should be slightly deeper so that the die pad surface is pressed against the die when the die is closed. By doing so, it is possible to reduce the occurrence of resin burrs and the like, and to withstand the resistance at the time of resin injection. In addition, the PSD structure has an exposed area smaller than that of a normal square die pad, and has an effect of further reducing the occurrence of resin burr. After encapsulation molding, normal product processing is performed.

As described above, in the semiconductor device of this embodiment, the die pad of the lead frame is exposed from the sealing resin portion, and the total thickness of the thickness of the thermoplastic adhesive sheet and the lead frame is used to seal the element surface of the semiconductor chip. A certain distance from the resin thickness can be ensured, and thus a sealing resin thickness of 200 tens [μm] can be stably ensured. The lead frame has a normal thickness of about 150 [μm], and the thermoplastic adhesive sheet has a thickness of about 100 [μm].

The attachment of the thermoplastic adhesive sheet for adhering the die pad of the lead frame and the element surface of the semiconductor chip is performed by utilizing the bonder device for the lead frame, so that the second semiconductor chip is attached to the first semiconductor chip. It is possible to secure stability by performing the die bonding and wire bonding steps twice and prevent damage to the semiconductor chip. Furthermore, by utilizing the existing equipment, it is possible to avoid an increase in manufacturing cost due to new equipment investment. Also, as a lead frame provided with a thermoplastic adhesive sheet, commonly known as L
It is available as a lead frame used in the OC method.

Further, by adopting the PSD lead frame and the thermoplastic adhesive sheet, it is possible to improve solder heat resistance and reduce resin molding defects in the chip laminated semiconductor device. The PSD lead frame has a structure suitable for improving solder heat resistance and sealing moldability in a thin package.

[0054]

As described above, according to the present invention, it is possible to stack a plurality of chips of two or more chips in a thin package with high reliability, high production versatility, high reliability, low cost and high density. A semiconductor device that can be mounted can be realized.

[Brief description of drawings]

FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a chip size of a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a diagram showing a chip size of a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a diagram showing a chip size of a semiconductor device according to an embodiment of the present invention.

FIG. 5 is a diagram showing a chip size of a semiconductor device according to an embodiment of the present invention.

FIG. 6 is a sectional view showing a conventional semiconductor device.

FIG. 7 is a cross-sectional view showing a conventional chip-stacked semiconductor device.

FIG. 8 is a cross-sectional view showing a conventional chip-stacked semiconductor device.

FIG. 9 is a cross-sectional view showing a conventional chip stacked semiconductor device.

[Explanation of symbols]

1 lead frame 1a Inner lead part 1b Outer lead part 2 die pad 3 semiconductor chips 3f First semiconductor chip 3s Second semiconductor chip 3t Third semiconductor chip 4 adhesive 5 thin metal wires 5f First fine metal wire 5s Second fine metal wire 5t Third metal wire 6 Sealing resin 7 Thermoplastic adhesive sheet 8 Chip connection fine wire 9 Overhang amount

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Claims (4)

(57) [Claims] And 1. A rie de frame thermoplastic adhesive sheet is attached on the main surface of the die pad of a first semiconductor chip that is adhered to the die pad at the element surface side with respect to the thermoplastic adhesive sheet, wherein a second semiconductor chip stacked adhesively bonded to the rear surface side of the first semiconductor chip, wherein the first semiconductor chip to connect the surface of the lead portion of the lead frame, said die pad loop height
Lower than the sum of the thickness of the thermoplastic adhesive sheet and the thickness of the thermoplastic adhesive sheet.
A first thin metal wires have a second thin metal wire which is connected to the second semiconductor chip and the back surface of the lead portion, the main part and the die pad of the lead portion of the lead frame
The first semiconductor chip by exposing a surface opposite to the surface,
A semiconductor device comprising a second semiconductor chip, a first thin metal wire, and a sealing resin that seals a region of the second thin metal wire. 2. A rie de frame thermoplastic adhesive sheet is attached on the main surface of the die pad of a first semiconductor chip that is adhered to the die pad at the element surface side with respect to the thermoplastic adhesive sheet, wherein a second semiconductor chip stacked adhesively bonded to the rear surface side of the first semiconductor chip, and the third semiconductor chips stacked adhesively bonded to the rear surface side of the first semiconductor chip, said first Connect the semiconductor chip and the surface of the lead part of the lead frame ,
The loop height depends on the thickness of the die pad and the thermoplastic adhesive.
A first metal thin wire lower than the total thickness of the sheet, a second metal thin wire connecting the second semiconductor chip and the back surface of the lead portion, a third semiconductor chip and the back surface of the lead portion A third metal thin wire that connects the second semiconductor chip and the third semiconductor chip, and a part of the lead portion of the lead frame and the main surface of the die pad opposite to each other. A side surface of the first semiconductor chip, the second semiconductor chip, the third semiconductor chip and the first thin metal wire, the second thin metal wire,
A semiconductor device comprising a third metal thin wire and a sealing resin that seals a region of the chip connecting thin wire. 3. The first semiconductor chip and the second semiconductor chip are in a rectangular shape in a plan view and are stacked with an overhang amount of a certain amount or more. 3. The semiconductor device according to claim 1, wherein the second semiconductor chip is stacked so that the long side of the second semiconductor chip is orthogonal to the short side of the second semiconductor chip. Wherein the die pad is a plurality have a PSD (point Sapoteddo die pad) shaped support portion which is bonded to the semiconductor chip, characterized in that one surface of the PSD is exposed flush with the sealing resin surface The semiconductor device according to claim 1 or 2.