JP3441435B2 - motor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor in which a current path to a coil is electronically switched by a plurality of transistors.

[0002]

2. Description of the Related Art In recent years, as a driving motor for OA equipment and AV equipment, a motor in which a current path is electronically switched by a plurality of transistors is widely used. An example of such a motor is a PNP type power transistor and an NP.
Some motors use N-type power transistors to switch the current path to the coil. FIG. 34 shows a conventional motor,
The operation will be briefly described. The rotor 2011 has a magnetic field portion formed by a permanent magnet, and the position detector 2041 responds to the rotation of the rotor 2011, so that the position detector 2041 has two sets of three-phase voltage signals K.
1, K2, K3 and K4, K5, K6 are generated. The first distributor 2042 produces three-phase lower side energization control signals L1, L2, L3 in response to the voltage signals K1, K2, K3,
Lower NPN power transistors 2021 and 202
It is supplied to the bases of 2, 2023 to control the energization of NPN power transistors 2021, 2022, 2023. The second distributor 2043 receives the voltage signals K4, K5, K6.
In response to the three-phase upper side energization control signals M1, M2, M3, and the upper side PNP type power transistor 202
5, 2026, 2027 are supplied to the bases to control the energization of the PNP type power transistors 2025, 2026, 2027. As a result, the three-phase coils 2012, 20
A three-phase drive voltage is supplied to 13, 2014.

[0003]

However, the conventional motor has the following problems. (1) Power loss is large. In the conventional configuration, the NPN power transistor 202
1, 2022, 2023 and PNP type power transistors 2025, 2026, 2027 have their emitters
The voltage between the collectors is controlled in an analog manner, and the coil 201
A drive current having a required amplitude is supplied to 2, 2013, and 2014. Therefore, the residual voltage of each power transistor is large, and a large power loss occurs due to the product of this residual voltage and the energizing current of the power transistor. In particular,
Since the drive current to the motor coil was large, the power loss was extremely large. Therefore, the power efficiency of the motor was extremely poor. (2) The cost is high. To reduce the cost, add 1 transistor or resistors.
It is effective to combine them into an integrated circuit (IC) of a chip. However, PNP type power transistors 2025, 2
In order to form 026 and 2027, a large chip area is required, which is a major factor in increasing cost. Further, it is difficult to operate the PNP type power transistor at high speed due to the influence of the parasitic capacitance when integrated into a circuit. Also, the power loss of the power transistor
It generated a lot of heat and was difficult to make into an integrated circuit. In particular, since the drive current to the motor coil is large, there is a high possibility that the integrated circuit will be thermally destroyed due to the heat generation of the power transistor.
Further, when a heat dissipation plate is attached to prevent thermal destruction, the cost increases greatly. (3) Vibration of the motor is large. 2. Description of the Related Art In recent years, in disk devices such as optical disk devices (DVD devices, CD devices, etc.) and magnetic disk devices (HDD devices, FDD devices, etc.), there has been a demand for motors with small vibrations accompanying high-density recording / reproduction of disks. It was However, in the conventional configuration, the spike voltage is generated in the coil due to the abrupt switching of the power transistor, and the pulsation of the drive current is generated. As a result, the generated driving force pulsates, causing large motor vibration. There has been a strong demand for a motor that solves these problems individually or simultaneously. An object of the present invention is to provide a motor having a configuration in which the above various problems are solved individually or simultaneously.

[0004]

A motor having a structure of the present invention includes a moving body, coils of a plurality of phases, voltage supply means for supplying a DC voltage, one output terminal side of the voltage supply means, and the coil. Q each including a first field effect power transistor forming a current path to one of
Q is an integer equal to or greater than 3), and a second field effect power transistor forming a current path to the other output terminal side of the voltage supply means and one of the coils. Q second power amplifying means, switching creating means for creating switching signals of a plurality of phases, and a first Q-phase signal in response to an output signal of the switching creating means are created, and the first Q-phase is created. Signal in response to the output signals of the switching control means and the first control means for controlling the energization of each of the Q first power amplification means to an angle width larger than 360 / Q degrees in electrical angle. A second Q-phase signal is generated, and the energization of each of the Q second power amplifying means is controlled by the second Q-phase signal to an angular width larger than 360 / Q degrees in electrical angle. Second control means and Q first electric field effects At least one FET power transistor among the type power transistors and Q pieces of said second FET power transistors A motor comprising a switching operation means for high-frequency switching operation, wherein the switching operation means Is a current detection means for obtaining a current detection signal in response to a combined supply current to the coils of the plurality of phases, and a pulse signal is generated by comparing an output signal of the current detection means with a command signal.
In response to a signal, at least one Q field effect power transistor among the Q first field effect power transistors and the Q second field effect power transistors is simultaneously turned off. And a switching control means for controlling the switching control means.

With this configuration, at least one field effect power transistor among the first field effect power transistor and the second field effect power transistor is subjected to high frequency switching operation. The power loss of the power transistor can be greatly reduced. Therefore, the motor has high power efficiency. Further, the energization of each of the Q first power amplifying means is controlled to an angle width larger than 360 / Q degrees in electrical angle, and the energization of each of the Q second power amplifying means is controlled in electrical angle of 3
The angle width was controlled to be larger than 60 / Q degrees. This makes it possible to smoothly switch the current path. As a result, the drive current to the coil changes smoothly, and the pulsation of the generated drive force is reduced. Further, the combined supply current to the coil was detected, and at least one Q field effect power transistor was turned off simultaneously in a pulsed manner in response to the pulse signal obtained by comparing the detection signal and the command signal. This allows
Even if the energization of the first power amplifying means and the second power amplifying means is made to have an electrical angle larger than 360 / Q degrees, the drive current controlled by the command signal can be supplied to the coil, and the drive current Pulsations and pulsations of generated driving force are significantly reduced, and a high-performance motor with less vibration can be realized. That is, the motor has high power efficiency and small vibration.

Further, when at least one field effect power transistor among the first field effect power transistor and the second field effect power transistor is subjected to high frequency switching operation, for example, the first Q phase It becomes possible to make the signal and the signal of the second Q-phase a current signal which changes substantially smoothly in at least one of the rising slope portion and the falling slope portion, and the driving current to the coil can be obtained. Can be changed easily and smoothly. As a result, the pulsation of the driving current and the pulsation of the generated driving force are significantly reduced, and a high-performance motor with small vibration can be realized.

Further, in response to the result of comparison between the output signal of the current detecting means and the command signal, at least one of the Q field effect power transistors is turned off simultaneously in a pulsed manner, so that the switching operation is performed. There is only one pulse signal.

As a result, it becomes easy to manage the switching timing and the structure of the motor is simplified.

That is, it is possible to realize a motor which has high power efficiency, small vibration, and low cost.

Further, since the heat generation of the field effect type power transistor of the power amplifying means is small, for example, the field effect type power transistor is integrated on a one-chip silicon substrate together with other transistor elements and resistance elements into an integrated circuit. Will also be possible. Therefore, a low-cost motor can be obtained.

These and other configurations and operations will be described in detail in the description of the embodiments.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Several preferred embodiments of the present invention will be described in detail with reference to the accompanying FIGS. << Embodiment 1 >> FIGS. 1 to 8 show a motor according to Embodiment 1 of the present invention. The overall structure is shown in FIG. The moving body 1 is, for example, a rotor provided with a field magnet portion that generates a magnetic flux of a plurality of poles by a magnetic flux generated by a permanent magnet. here,
The field magnet portion of the moving body 1 is shown by a two-pole magnetized permanent magnet. In a modified example, it may have multiple poles or may be composed of a large number of magnetic pole pieces. The three-phase coils 2, 3, 4 are arranged on a stator, which is a fixed body, and are electrically displaced by 120 degrees with respect to the relative relationship with the moving body 1. The three-phase coils 2, 3, and 4 are three-phase drive currents I1 and I.
Magnetic fluxes of three phases are generated by 2 and I3, a driving force is generated by the interaction with the field portion of the moving body 1, and the driving force is given to the moving body 1. The disk 1b is attached to the moving body 1 and rotates together with the moving body 1.

The DC power supply 50, which is a voltage supply unit, has its negative electrode terminal side (-) set to the ground potential and supplies the required DC voltage Vcc and DC current to the positive electrode terminal side (+). To the negative electrode terminal side of the DC power supply 50, the current outflow terminal sides of the three first power amplifiers 11, 12, and 13 are commonly connected via the current detector 21. The first power amplifier 11 includes a first NMOS power transistor 61,
It is configured to include a first power diode 61d reversely connected in parallel to the first NMOS power transistor 61. Here, the NMOS type transistor means a field effect type transistor having an N channel MOS structure.
The current outflow terminal side of the first NMOS power transistor 61 is connected to the negative electrode terminal side of the DC power supply 50 via the current detector 21, and the current inflow terminal side is connected to the power supply terminal of the coil 2. The current inflow terminal side of the first power diode 61d is connected to the current outflow terminal side of the first NMOS type power transistor 61, and the current outflow terminal side is connected to the current inflow terminal side of the first NMOS type power transistor 61. ing. The first power amplifier 11 has a first
The NMOS power transistor 61 and the NMOS transistor 71 form a first field effect power section current mirror circuit, and current-amplify and output the input current signal to the energization control terminal side. Here, the field effect type power part current mirror circuit means a field effect type current mirror circuit using a field effect type power transistor.

First NMOS type power transistor 61
And the cell area ratio of the NMOS transistor 71 to 100 times, and the current amplification factor of the first power current mirror circuit to 100 times when the first NMOS power transistor 61 is half-on operating in the active region. There is.
Here, there are three operating states of the field effect transistor: a full-on state, a half-on state, and an off state. In the half-on state, the field effect transistor is performing the amplifying operation of the active region. The field effect transistor is in the active state or the active state in the full-on state and the half-on state. The first NMOS power transistor 61 is composed of, for example, a field effect transistor having a double diffused N-channel MOS structure, and extends from the current outflow terminal side of the first NMOS power transistor 61 toward the current inflow terminal side. The parasitic diode element is reversely connected in an equivalent circuit. This parasitic diode element is used as the first power diode 61d.

Similarly, the first power amplifier 12 has a first
NMOS power transistor 62 and first NMO
A first reverse connection in parallel with the S-type power transistor 62
The power diode 62d is included. The current outflow terminal side of the first NMOS power transistor 62 is connected to the negative electrode terminal side of the DC power supply 50 via the current detector 21, and the current inflow terminal side is connected to the power supply terminal of the coil 3. The current inflow terminal side of the first power diode 62d is the first NMOS type power transistor 6
2 is connected to the current outflow terminal side, and the current outflow terminal side is the first
Is connected to the current inflow terminal side of the NMOS power transistor 62. The first power amplifier 12 forms a first field effect power section current mirror circuit by the first NMOS type power transistor 62 and the NMOS type transistor 72, and current-amplifies an input current signal to the energization control terminal side. (The cell area ratio is 100 times). The first NMOS power transistor 62 is formed of, for example, a field effect transistor having a double diffused N-channel MOS structure, and the parasitic diode element of the first NMOS power transistor 62 is used as the first power diode 62d. is doing.

Similarly, the first power amplifier 13 has a first
NMOS type power transistor 63 and the first NMO
A first reverse connection in parallel with the S-type power transistor 63
The power diode 63d is included. The current outflow terminal side of the first NMOS power transistor 63 is connected to the negative electrode terminal side of the DC power supply 50 via the current detector 21, and the current inflow terminal side is connected to the power supply terminal of the coil 4. The current inflow terminal side of the first power diode 63d is connected to the first NMOS power transistor 6
3 is connected to the current outflow terminal side, and the current outflow terminal side is the first
Is connected to the current inflow terminal side of the NMOS power transistor 63. The first power amplifier 13 forms a first field effect power section current mirror circuit by the first NMOS type power transistor 63 and the NMOS type transistor 73, and current-amplifies an input current signal to the energization control terminal side. (The cell area ratio is 100 times). The first NMOS power transistor 63 is formed of, for example, a field effect transistor having a double diffused N-channel MOS structure, and the parasitic diode element of the first NMOS power transistor 63 is used as the first power diode 63d. is doing.

Each of the first power section current mirror circuits of the first power amplifiers 11, 12 and 13 current-amplifies and outputs an input current signal to each energization control terminal side.
Control pulse signals Y1, Y2 of the switching controller 22,
Y3 turns on / off the first NMOS type power transistors 61, 62 and 63 of the first power amplifiers 11, 12 and 13 to perform a high frequency switching operation. The first power amplifiers 11, 12, and 13 drive the driving voltages V1, V2, and V3 to the power supply terminals of the coils 2, 3, and 4 by high-frequency switching to supply power to the coils 2, 3, and 4, respectively. The negative currents of the currents I1, I2, and I3 are supplied. This operation will be described later.

To the positive electrode terminal side of the DC power supply 50, the current inflow terminal sides of the three second power amplifiers 15, 16 and 17 are commonly connected. The second power amplifier 15 has a second
NMOS power transistor 65 and second NMO
Second reverse connection in parallel with S-type power transistor 65
The power diode 65d is included. The current inflow terminal side of the second NMOS type power transistor 65 is connected to the positive electrode terminal side of the DC power supply 50, and the current outflow terminal side is connected to the power supply terminal of the coil 2. Second
The power inflow terminal side of the power diode 65d is the second N
It is connected to the current outflow terminal side of the MOS type power transistor 65, and the current outflow terminal side is connected to the current inflow terminal side of the second NMOS type power transistor 65. Second
Power amplifier 15 forms a second field effect type power part current mirror circuit by the second NMOS type power transistor 65 and the NMOS type transistor 75, and current-amplifies and outputs the input current signal to the energization control terminal side. To do.
The current of the second power section current mirror circuit when the cell area ratio of the second NMOS type power transistor 65 and the NMOS type transistor 75 is set to 100 times and the second NMOS type power transistor 65 operates in the active region. The amplification factor is 101 times. The second NMOS power transistor 65 is formed of, for example, a field effect transistor having a double diffusion N-channel MOS structure, and is directed from the current outflow terminal side of the second NMOS power transistor 65 toward the current inflow terminal side. The parasitic diode element is reversely connected in an equivalent circuit. This parasitic diode element is used as the second power diode 65d.

Similarly, the second power amplifier 16 has a second
NMOS power transistor 66 and second NMO
Second reverse connection in parallel with S-type power transistor 66
The power diode 66d is included. The current inflow terminal side of the second NMOS type power transistor 66 is connected to the positive electrode terminal side of the DC power supply 50, and the current outflow terminal side is connected to the power supply terminal of the coil 3. Second
The power inflow terminal side of the power diode 66d is a second N
It is connected to the current outflow terminal side of the MOS type power transistor 66, and the current outflow terminal side is connected to the current inflow terminal side of the second NMOS type power transistor 66. Second
Power amplifier 16 forms a second field effect type power section current mirror circuit by the second NMOS type power transistor 66 and NMOS type transistor 76, current-amplifies and outputs an input current signal to the energization control terminal side. (Cell area ratio is 100 times). The second NMOS power transistor 66 is formed of, for example, a field effect transistor having a double diffusion N-channel MOS structure, and the parasitic diode element of the second NMOS power transistor 66 is used as a second power diode 66d. I'm using it.

Similarly, the second power amplifier 17 has a second
NMOS type power transistor 67 and second NMO
Second reverse connection in parallel with S-type power transistor 67
The power diode 67d is included. The current inflow terminal side of the second NMOS type power transistor 67 is connected to the positive electrode terminal side of the DC power supply 50, and the current outflow terminal side is connected to the power supply terminal of the coil 4. Second
Of the power inflow terminal of the power diode 67d of the second N
It is connected to the current outflow terminal side of the MOS type power transistor 67, and the current outflow terminal side is connected to the current inflow terminal side of the second NMOS type power transistor 67. Second
The second power amplifier 17 forms a second field effect power section current mirror circuit by the second NMOS power transistor 67 and the NMOS transistor 77, current-amplifies and outputs the input current signal to the energization control terminal side. (Cell area ratio is 100 times). The second NMOS type power transistor 67 is constituted by, for example, a field effect transistor having a double diffusion type N channel MOS structure, and a parasitic diode element of the second NMOS type power transistor 67 is used as a second power diode 67d. I'm using it.

Each of the second power section current mirror circuits of the second power amplifiers 15, 16 and 17 current-amplifies and outputs the input current signal to each energization control terminal side, and outputs the coils 2, 3, 4 respectively. Drive currents I1, I2, and I3 on the positive electrode side are supplied. This operation will be described later. As described above, the first power amplifiers 11, 12, and 13 are connected in parallel between the negative electrode terminal side and the positive electrode terminal side of the DC power source 50, and the coils 2, 3, 4 are connected from the negative electrode terminal side of the DC power source 50.
Electronically switching the current path to. Similarly, the second power amplifiers 15, 16 and 17 are connected in parallel between the negative electrode terminal side and the positive electrode terminal side of the DC power supply 50 and are connected from the positive electrode terminal side of the DC power supply 50 to the coils 2, 3, and 4. The current path of is switched electronically. The command signal Ad of the command device 20 is
It is input to the current supplier 30 and the switching controller 22. The command device 20 is composed of, for example, a speed control block that detects the rotational speed of the moving body 1 and controls the speed to a predetermined value. Therefore, the command signal Ad controls the drive current and drive voltage to the coils 2, 3 and 4, and changes the power supplied to the coils.

The current supplier 30 outputs a first supply current signal C1 and a second supply current signal C2 in response to the command signal Ad. FIG. 3 shows a specific configuration of the current supplier 30. The voltage / current conversion circuit 151 outputs a converted current signal Bj proportional to the command signal Ad. Voltage-current conversion circuit 15
The converted current signal Bj of 1 corresponds to the transistors 171, 17
2, 173 and resistors 174, 175, and 176 are supplied to the current mirror circuit, and two current signals proportional to the converted current signal Bj are generated on the collector side of the transistors 172 and 173. The collector current of the transistor 172 is output via the current mirror circuit of the transistors 181 and 182. The collector current Bp1 of the transistor 182 and the first predetermined current Qq1 of the constant current source 183 are added and output as the first supply current signal C1. That is, C1 = Bp1 + Qq1. In addition, the transistor 173
Collector current Bp2 and the second predetermined current Qq2 of the constant current source 184 are added and output as a second supply current signal C2. That is, C2 = Bp2 + Qq2. This allows
The first supply current signal C1 and the second supply current signal C2 are current signals proportional or substantially proportional to the command signal Ad.
Also, the first supply current signal C1 and the second supply current signal C
2 is the current values Qq1 and Qq2 of the constant current sources 183 and 184.
Includes a predetermined bias current due to The current values Qq1 and Qq2 of the constant current sources 183 and 184 may be set as necessary and may be zero.

The switching generator 34 of FIG. 1 outputs three-phase switching current signals D1, D2, D3 that change smoothly. FIG. 2 shows a specific configuration of the switching generator 34. In this example, the switching generator 34 includes a position detecting unit 100 and a switching signal unit 1.
It is composed of 01. The position detection unit 100 is configured to include position detection elements 111 and 112 that are magnetoelectric conversion elements (for example, Hall elements) that detect the magnetic flux generated by the moving body 1. The position detection elements 111 and 112 have a phase difference of 120 degrees electrically, and the two-phase position detection signals Ja1 that change in a smooth sine wave shape as the moving body 1 moves.
And Jb1, and Ja2 and Jb2 are output. Here, Ja1 and Ja2 have a reverse phase relationship (electrically 18
(0 degree phase difference), and Jb1 and Jb2 have an opposite phase relationship.
It should be noted that the signal having the opposite phase is not counted as a new phase number. The position detection signals Ja2 and Jb2 are combined by the resistors 113 and 114 to generate the position detection signal Jc1 of the third phase, and the position detection signals Ja1 and Jb1 are combined by the resistors 115 and 116 to generate the position detection signal Jc2 of the third phase. Create. As a result, the position detector 100 has three-phase position detection signals Ja1 and J that have a phase difference of 120 degrees and change sinusoidally.
b1 and Jc1 (Ja2, Jb2, Jc2) are obtained.
A three-phase position detection signal may be created using three position detection elements.

The switching signal section 101 has a sinusoidal switching current signal D that changes smoothly in response to the three-phase position detection signals.
Create 1, D2, D3. Transistors 122 and 12
3 shunts the current of the constant current source 121 to the collector side in response to the differential voltage between the position detection signals Ja1 and Ja2 of the first phase. The collector current of the transistor 123 is doubled by the current mirror circuit of the transistors 124 and 125 and output from the collector of the transistor 125. The collector current of the transistor 125 is the constant current source 1
It is compared with the current value of 26, and the difference current between the two is output as the switching current signal D1 of the first phase. Therefore, the switching current signal D1 changes smoothly in response to the position detection signal Ja1, the current flows out in the electrical angle 180 ° section (current of positive polarity), and the current flows in the next 180 ° section ( Negative current). Similarly, the switching current signal D2 is the position detection signal Jb.
It changes smoothly in response to 1 and a current flows out in an electrical angle of 180 degrees (positive current) and a current flows in the next 180 degrees (negative current). Similarly, the switching current signal D3 changes smoothly in response to the position detection signal Jc1, a current flows out in an electrical angle of 180 degrees (current of positive polarity), and a current flows in in the next 180 degrees. (Negative current). As a result, the switching current signals D1, D2, D3 become sinusoidal three-phase current signals having a predetermined phase difference.
FIG. 9A shows the waveforms of the three-phase switching current signals D1, D2, D3. Incidentally. The horizontal axis of FIG. 9 represents the rotational movement position of the moving body 1.

The distribution generator 36 of FIG. 1 is the first distributor 3
7 and a second distributor 38. The first distributor 37 has a three-phase switching current signal D of the switching generator 34.
In response to 1, D2, D3, the first supply current signal C1 of the current supplier 30 is substantially distributed to produce three smoothly varying first distribution current signals E1, E2, E3. The second distributor 38 substantially distributes the second supply current signal C2 of the current supplier 30 in response to the three-phase switching current signals D1, D2, D3 of the switching generator 34, and changes smoothly. To generate three-phase second distributed current signals G1, G2, and G3.

FIG. 4 shows a specific configuration of the distribution generator 36. The first separation circuit 216 of the first distributor 37 outputs a first separation signal D1n corresponding to or responsive to the negative side current of the switching current signal D1 of the switching generator 34. The first separation circuit 217 controls the switching current signal D2 of the switching generator 34.
First separation signal D that corresponds to or responds to the negative electrode side current of
2n is output. The first separation circuit 218 outputs a first separation signal D3n corresponding to or responsive to the negative side current of the switching current signal D3 of the switching generator 34. This allows
The first separation circuits 216, 217, 2 of the first distributor 37.
Reference numeral 18 denotes a three-phase first separation signal D1 which corresponds to or responds to the negative polarity side current of the three-phase switching current signals D1, D2, D3.
n, D2n, D3n are obtained. The first multiplication circuit 211 of the first distributor 37 multiplies the first separation signal D1n of the first separation circuit 216 by the first feedback signal Eb of the first feedback circuit 215, and is proportional to the multiplication result. The first distributed current signal E1 is output. Similarly, the first multiplication circuit 212 of the first distributor 37 includes the first separation signal D2n of the first separation circuit 217 and the first feedback signal E of the first feedback circuit 215.
b is multiplied, and the first distribution current signal E proportional to the multiplication result is obtained.
2 is output. Similarly, the first multiplication circuit 213 of the first distributor 37 multiplies the first separation signal D3n of the first separation circuit 218 by the first feedback signal Eb of the first feedback circuit 215 and performs multiplication. The first distribution current signal E3 proportional to the result is output.

The first synthesizing circuit 214 outputs the first synthesizing signal Ea in response to the added and synthesizing value of the three-phase first distribution current signals E1, E2, E3. First feedback circuit 215
Obtains a first feedback signal Eb in response to a difference signal between the first combined signal Ea of the first combining circuit 214 and the first supply current signal C1 of the current supplier 30. As a result, the first multiplication circuits 211, 212, 213 and the first synthesis circuit 21 are
4 and the first feedback circuit 215 form a feedback loop,
The combined signal Ea of is set to a value corresponding to the first supply current signal C1.

The first combined signal Ea corresponds to the added value of the three-phase first distributed current signals E1, E2, E3, and corresponds to the first three-phase signal.
The distributed current signals E1, E2, E3 of
Is proportional to the separated signals D1n, D2n, and D3n. As a result, the three-phase first distribution current signals E1, E2, E3 of the first distributor 37 respond to the negative side currents of the three-phase switching current signals D1, D2, D3 of the switching generator 34. The first supply current signal C1 of the current supply 30 is substantially distributed 3
It becomes the phase current signal. That is, the first distribution current signal E
The magnitudes of 1, E2 and E3 change in proportion to the first supply current signal C1. FIG. 9B shows the waveforms of the three-phase first distributed current signals E1, E2, E3. First distributor 37
Distributes the first supply current signal C1 to one phase or two phases alternately with the rotational movement of the moving body 1, and electrically
Three-phase first distribution current signal E having a phase difference of 20 degrees
It outputs 1, E2 and E3. The first distribution current signals E1, E2, E3 are positive currents (currents flowing out).

The second separation circuit 226 of the second distributor 38.
Outputs a second separation signal D1p corresponding to or responsive to the positive electrode side current of the switching current signal D1 of the switching generator 34. The second separation circuit 227 outputs a second separation signal D2p corresponding to or responsive to the positive side current of the switching current signal D2 of the switching generator 34. The second separation circuit 228 is
The second separation signal D3p corresponding to or responsive to the positive side current of the switching current signal D3 of the switching generator 34 is output. As a result, the second separation circuit 226 of the second distributor 38,
227 and 228 are three-phase switching current signals D1, D2, D
Three-phase second separation signals D1p, D2p, and D3p corresponding to or responding to the positive electrode side current of 3 are obtained.

The second multiplication circuit 221 of the second distributor 38.
Multiplies the second separation signal D1p of the second separation circuit 226 by the second feedback signal Gb of the second feedback circuit 225, and outputs the second distribution current signal G1 proportional to the multiplication result.
Similarly, the second multiplication circuit 222 of the second distributor 38
The second separation signal D2p of the second separation circuit 227 is multiplied by the second feedback signal Gb of the second feedback circuit 225, and the second distribution current signal G2 proportional to the multiplication result is output. Similarly, the second multiplication circuit 223 of the second distributor 38
The second separation signal D3p of the second separation circuit 228 and the second feedback signal Gb of the second feedback circuit 225 are multiplied, and the second distribution current signal G3 proportional to the multiplication result is output.

The second synthesizing circuit 224 outputs the second synthesizing signal Ga in response to the added and synthesizing value of the three-phase second distribution current signals G1, G2 and G3. Second feedback circuit 225
Obtains the second feedback signal Gb in response to the difference signal between the second combined signal Ga of the second combining circuit 224 and the second supply current signal C2 of the current supplier 30. As a result, the second multiplication circuits 221, 222, 223 and the second synthesis circuit 22 are
4 and the second feedback circuit 225 form a feedback loop,
The combined signal Ga is set to a value corresponding to the second supply current signal C2. The second combined signal Ga corresponds to the added value of the three-phase second distributed current signals G1, G2, and G3, and corresponds to the three-phase second
The distributed current signals G1, G2, G3 of
In proportion to the separated signals D1p, D2p, and D3p. As a result, the three-phase second distribution current signals G1, G2, and G3 of the second distributor 38 become the switching current signal D of the switching generator 34.
In response to 1, D2, D3, the second supply current signal C2 of the current supplier 30 is substantially distributed into a three-phase current signal. That is, the magnitudes of the second distributed current signals G1, G2, G3 change in proportion to the second supply current signal C2. FIG. 9C shows the three-phase second distributed current signals G1 and G.
2 and G3 waveforms are shown. The second distributor 38 alternately distributes the second supply current signal C2 into one phase or two phases according to the rotational movement of the moving body 1, and three phases having an electrical phase difference of 120 degrees. Second distributed current signals G1, G2, G3 of
Is output. The second distribution current signals G1, G2, G
3 is actually a negative polarity current (inflow direction current).

Further, the first distributed current signal E1 and the second distributed current signal G1 have a phase difference of 180 degrees, and smoothly change in a complementary manner (E1 and G1 are always zero).
Similarly, the first distributed current signal E2 and the second distributed current signal G2 have a phase difference of 180 degrees and change smoothly in a complementary manner (one of E2 and G2 is always zero). Similarly, the first distribution current signal E3 and the second distribution current signal G3 are 18
It has a phase difference of 0 degree and changes smoothly complementarily (E3
And G3 is always zero on one side). First distributor 3 of FIG.
The seventh distributed current signals E1, E2, E3 are input to the first current amplifiers 41, 42, 43, respectively. First
Current amplifiers 41, 42, and 43 of the first current amplifiers 41, 42, and 43, respectively, amplify the first distributed current signals E1, E2, and E3 by a predetermined number of times to perform first amplification.
To generate amplified current signals F1, F2, and F3.

FIG. 5 shows the first current amplifiers 41, 42, 43.
The specific configuration of is shown. The first current amplifier 41 includes a first stage current mirror circuit including transistors 231, 232, transistors 233, 234 and resistors 235, 23.
1st of the current mirror circuits of the next stage by 6 are connected in cascade
It is composed of an amplifier current mirror circuit. The emitter areas of the transistors 231 and 232 are made equal,
The current amplification factor of the first-stage current mirror circuit is set to one. Further, the emitter area ratio of the transistors 233 and 234 is set to 50 times, and the resistance ratio of the resistors 236 and 235 is set to 50 times.
Double predetermined amplification. Similarly, the first current amplifier 42
Is composed of a first amplifier current mirror circuit including transistors 241, 242, 243, 244 and resistors 245, 246, and performs a predetermined amplification of 50 times with a current amplification factor. Similarly, the first current amplifier 43 includes transistors 251, 252, 253, 254 and resistors 255, 25.
The first amplification unit current mirror circuit according to No. 6 performs a predetermined amplification of 50 times with a current amplification factor. As a result, the first current amplifiers 41, 42, 43 amplify the three-phase first distributed current signals E1, E2, E3 by 50 times, respectively, and generate the three-phase first amplified current signals F1, F2, Output F3.

The second distribution current signals G1, G2, G3 of the second distributor 38 of FIG.
5, 46 and 47 are input. The second current amplifier 45,
46 and 47 are second distribution current signals G1 and G, respectively.
The second amplified current signal H is obtained by amplifying the current G2 and G3 by a predetermined factor.
1, H2, H3 are produced and supplied to the respective second power amplifiers 15, 16, 17 from the high potential point Vu of the high voltage output device 51. The high voltage output device 51 creates a high potential point potential Vu higher than the positive electrode terminal side potential Vcc of the DC power supply 50 by charging and accumulating in the boosting capacitor in response to the high frequency pulse signal. High potential point Vu of high voltage output device 51
Supplies the second amplified current signals H1, H2, H3 to the respective conduction control terminals of the second field effect type power section current mirror circuits of the second power amplifiers 15, 16, 17,
Of the second NMOS power transistor 6 by preventing the output transistors of the current amplifiers 45, 46 and 47 from being saturated.
5, 66, 67 are fully energized.

The second current amplifiers 45, 46, 47 are shown in FIG.
And a specific configuration of the high voltage output device 51. The second current amplifier 45 includes transistors 261, 262 and a resistor 26.
The second amplifying section current mirror circuit is composed of three and two 264. The emitter area ratio of the transistors 261 and 262 is 50 times, and the resistance ratio of the resistors 264 and 263 is 5 times.
The second current amplifier 45 has a current amplification factor of 50
Double predetermined amplification. Similarly, the second current amplifier 46
Are transistors 271, 272 and resistors 273, 274.
The second amplifying section current mirror circuit according to (1), and performs 50 times amplification at the current amplification factor. Similarly, the second current amplifier 47 is composed of a second amplifier current mirror circuit including transistors 281, 282 and resistors 283, 284, and amplifies the current by 50 times.
As a result, the second current amplifiers 45, 46, 47 are
The second distributed current signals G1, G2, G3 of the phase are respectively set to 5
0 times amplification and three-phase second amplified current signals H1, H2,
Outputs H3.

The high voltage output device 51 is a pulse generation circuit 421 which outputs a high frequency pulse signal Pa of about 100 kHz.
A first voltage boosting capacitor 411, a second voltage boosting capacitor 412, a first voltage limiting circuit including diodes 425 to 428, and a second voltage limiting circuit including a diode 429.
The voltage limiting circuit is included. The inverter circuit 4 responds to the pulse signal Pa of the pulse generation circuit 421.
22 digitally changes. Inverter circuit 422
Is "L" (potential on the negative electrode terminal side of the DC power supply 50), the first boosting capacitor 411 is charged via the diode 423. When the inverter circuit 422 changes to “H” (potential on the positive electrode terminal side of the DC power supply 50), the charges accumulated in the first boost capacitor 411 are transferred to the second boost capacitor 412 via the diode 424. , The second boosting capacitor 412 is charged and accumulated. as a result,
The DC power supply 5 is connected to the terminal of the second boosting capacitor 412.
A high potential point potential Vu that is higher than the positive electrode terminal side potential Vcc of 0 is output. The high potential point potential Vu is connected to the second current amplifiers 45, 46 and 47.

If the second boosting capacitor 412 is continuously charged, the voltage Vu at the high potential point becomes very high, which may cause breakdown of the integrated circuit transistor or diode. Therefore, the diodes 425-
A first voltage limiting circuit 428 is provided to limit the high potential point voltage Vu so as not to exceed a predetermined value. The first voltage limiting circuit may be omitted if there is no fear of breakdown of the withstand voltage. Also, the second amplified current signals H1, H2, H
3 acts to discharge the electric charge of the second boosting capacitor 412. When a large current operation such as when the motor is started continues for a long time, the amount of discharge of the second boosting capacitor 412 increases, and the potential Vu at the output voltage point of the high voltage output device 51 may significantly decrease. Therefore, the diode 429
And a high voltage output device 51 is provided.
Of the high-potential point Vu is the positive-electrode-side potential V of the DC power supply 50.
It was restricted so that it would not be significantly smaller than cc. In addition,
In the normal control state where the current level is small, the second voltage limiting circuit does not operate. Further, when the fluctuation of the potential Vu is small, the second voltage limiting circuit may be omitted.

The current detector 21 of FIG. 1 detects the energizing current Ig supplied from the DC power supply 50 and outputs a current detection signal Ag in response to the energizing current Ig. Switching controller 2
2 compares the command signal Ad with the current detection signal Ag, turns on / off the control pulse signals Y1, Y2, Y3 in response to the comparison result, and outputs the first power amplifiers 11, 12, 13 with the first
The NMOS power transistors 61, 62, 63 are subjected to high frequency switching operation. The switching controller 22 and the current detector 21 form a switching operation block.

FIG. 7 shows a specific configuration of the current detector 21 and the switching controller 22. The current detector 21 includes a resistor 3 for current detection inserted in a current supply path of the DC power supply 50.
The current flowing signal Ig of the DC power supply 50 is detected by the voltage drop generated in the resistor 311 and the current detection signal Ag is output. The switching controller 22 includes a switching pulse circuit 33 that obtains a switching control signal W1.
It is configured to include 0. Switching pulse circuit 3
The comparison circuit 331 of 30 obtains a comparison output signal Cr obtained by comparing the command signal Ad and the current detection signal Ag. The trigger generation circuit 332 outputs a high-frequency trigger pulse signal Dp of about 100 kHz, and repeatedly triggers the state holding circuit 333 at predetermined time intervals.

The state holding circuit 333 changes the switching control signal W1 to "Lb" (low potential state) at the rising edge of the trigger parity signal Dp, and changes the switching control signal W1 to "Hb" (at the rising edge of the comparison output signal Cr). High potential). When the switching control signal W1 is "Lb", the control transistors 341, 342, 343 are turned off at the same time, and the control pulse signals Y1, Y2, Y3 are turned off (non-current conduction state).
become. At this time, the first power amplifiers 11, 12, 1
3 operates so as to current-amplify the first amplified current signals F1, F2, F3, respectively, and forms a current path for supplying a negative current to the coils 2, 3, 4. When the switching control signal W1 is "Hb", the control transistors 341, 3
42 and 343 are turned on at the same time, and the control pulse signal Y
1, Y2, Y3 are turned on (current energization state), and the input current to the energization control terminal side of the first power amplifiers 11, 12, 13 is bypassed. Therefore, the first power amplifier 1
The first NMOS type power transistors 61, 62 and 63 of 1, 12, and 13 are all turned off at the same time. In this way, the first power amplifiers 11, 12, and 13 are switching-controlled by the single switching control signal W1 between the energized state and the cutoff state at a high frequency, and the drive voltages V1 and V2 to the coils 2, 3, and 4 are V3 is set to a pulse voltage, and the drive currents I1, I2, and I3 to the coils 2, 3, and 4 are controlled so as to respond to the command signal Ad. This will be described.

The switching control signal W of the state holding circuit 333 is generated by the rising edge of the trigger pulse signal Dp.
1 changes to "Lb", the first distribution current signals E1, E2, E selectively distributed by the first distributor 37
3 and the first amplified current signals F1, F2, F3 in response to the first NM of the first power amplifiers 11, 12, 13.
The OS type power transistor is turned on. For example, considering the case where only the first distributed current signal E1 and the first amplified current signal F1 are selected, the first NMOS type power transistor 6 of the first power amplifier 11 is considered.
1 is energized. The first NMOS type power transistor 61 is fully turned on, and the drive current I is applied to the coil 2.
A current path for supplying the negative electrode side current of 1 is formed. here,
In the full-on state of the field effect transistor, a very small voltage drop operation is performed due to the on resistance between the current inflow terminal side and the current outflow terminal side. The negative side current value of the drive current I1 of the coil 2 gradually increases due to the inductance action of the coil. Therefore, the energizing current Ig supplied from the DC power supply 50 also increases, and the current detection signal Ag of the current detector 21 increases. At the moment when the current detection signal Ag becomes larger than the command signal Ad, the comparison output signal Cr of the comparison circuit 331 generates a rising edge, and the state holding circuit 333.
Switching control signal W1 changes to "Hb".

When the switching control signal W1 becomes "Hb", the control transistors 341, 342 and 343 are turned on. As a result, the first power amplifiers 11, 12, 1
The energization control terminal side of 3 is simultaneously connected to the negative electrode terminal side of the DC power source 50, and the first NMOS type power transistor 6
1, 62 and 63 are all turned off at the same time. Therefore, the energizing current Ig becomes zero. Here, the off state of the field effect transistor is a state in which no transistor current flows from the current inflow terminal side to the current outflow terminal side. At this time, due to the inductance action of the coil 2, the drive voltage V1 on the power supply terminal side increases in a pulsed manner, forming a current path that passes through the second power diode 65d of the second power amplifier 15, and drives the coil 2. Current I
The negative electrode side current of 1 is continuously supplied. As a result, the negative side current value of the drive current I1 of the coil 2 gradually decreases. After a short time, the trigger pulse signal Dp
Then, the next rising edge arrives and the above switching operation is repeated. As a result, the first power amplifier is caused to perform a high frequency switching operation by the trigger pulse signal Dp which is repeatedly generated at predetermined time intervals. Since the high frequency switching operation of about 100 kHz is performed, the high frequency ripple of the coil drive current is very small.

In this way, the energizing current Ig of the DC power source 50 is controlled in a pulse manner to a value in response to the command signal Ad,
The combined supply current to the coils 2, 3, 4 is controlled to a value in response to the command signal Ad. This controls the continuous drive current to the coils 2, 3, 4. The conduction current when the first NMOS power transistor of the first power amplifier is on does not exceed the conduction current Ig of the DC power supply 50. Therefore, the first supply current signal C1 responsive to the command signal Ad is distributed and amplified and supplied to the first power amplifier, so that the first power transistor of the first power amplifier is reliably turned on. You can

Further, since the first distributed current signal is alternately and smoothly distributed to one phase or two phases as the moving body 1 moves, the switching of the current path becomes smooth. For example, consider a case where the first distributed current signals E1 and E2 and the first amplified current signals F1 and F2 are energized. When the switching control signal W1 of the state holding circuit 333 changes to “Lb” due to the rising edge of the trigger pulse signal Dp, the first NMO of the first power amplifier 11 is generated.
S-type power transistor 61 and first power amplifier 12
The first NMOS power transistor 62 is turned on. In response to the first amplified current signal F1, the first NM
The OS type power transistor 61 is turned on (full on state or half on state) and forms a current path for supplying the negative side current of the drive current I1 of the coil 2. First
In response to the amplified current signal F2, the first NMOS power transistor 62 is turned on (full on state or half on state), and forms a current path for supplying the negative side current of the drive current I2 of the coil 3.

First NMOS power transistor 61
At least one of and 62 is in a full-on state. Here, the half-on state of the field effect transistor is a state in which the amplification operation is being performed in the active region. In particular, when the power transistor is operating in the half-on state, the field effect current mirror circuit of the power amplifier current-amplifies the input current signal to the energization control terminal side with a predetermined current amplification factor. Coils 2, 3
The combined current value of the negative electrode side currents of the drive currents I1 and I2 supplied to the DC power supply 50 becomes the conduction current Ig of the DC power supply 50.

The conducting current Ig gradually increases due to the inductance action of the coil. When the current detection signal Ag becomes larger than the command signal Ad, the comparison output signal Cr generates a rising edge and the switching control signal W1 becomes "H".
b ″, and the control transistors 341, 342, 34
3 turns on. As a result, the first power amplifier 11,
The energization control terminal sides of 12 and 13 are simultaneously connected to the negative electrode terminal side of the DC power supply 50, and the first NMOS type power transistors 61, 62 and 63 are all turned off at the same time.
Therefore, the energizing current Ig becomes zero. Due to the inductance action of the coil 2, the drive voltage V1 on the power supply terminal side increases in a pulse manner, and the second power amplifier 15 has a second drive voltage V1.
A current path that passes through the power diode 65d is formed, and the negative side current of the drive current I1 of the coil 2 continues to flow. As a result, the negative side current value of the drive current I1 of the coil 2 gradually decreases. Further, due to the inductance action of the coil 3, the drive voltage V2 on the power supply terminal side increases in a pulsed manner, forming a current path that passes through the second power diode 66d of the second power amplifier 16, and the drive current of the coil 3 is generated. I
Continue to flow the negative electrode side current of 2. As a result, the negative current value of the drive current I2 of the coil 3 gradually decreases. After a short time, the next rising edge of the trigger pulse signal Dp arrives and the above switching operation is repeated. In this way, the first distributed current signals E1 and E2 and the first amplified current signals F1 and F2 are changed in accordance with the moving operation of the moving body 1, and the drive currents I1 and C1 of the coils 2 and 3 are changed.
The current value on the negative electrode side of I2 is changed smoothly. The same applies to the switching operation of the current paths of the other phases. Here, since the three-phase first amplified current signals are changed in proportion to or substantially in proportion to the command signal Ad, a smooth current path switching operation can always be performed even when the command signal Ad changes. it can.

Further, the second distribution current signals G1, G2, G3 and the second distribution current signals selectively distributed by the second distributor 38.
The second NMOS power transistors of the second power amplifiers 15, 16 and 17 are turned on in response to the amplified current signals H1, H2 and H3. Considering, for example, the case where only the second distributed current signal G2 and the second amplified current signal H2 are selected, the second NMOS power transistor 66 of the second power amplifier 16 is turned on. The second NMOS type power transistor 66 is in the full-on state, and forms a current path for supplying the positive current of the drive current I2 to the coil 3. Since the energizing current Ig of the DC power supply 50 and the combined supply current to the coil are controlled to values in response to the command signal Ad, as described above, the positive side current of the drive current I2 of the coil 3 is also the command signal A.
It becomes a value in response to d. Therefore, the second supply current signal C2 that changes in response to the command signal Ad is distributed and amplified.
By supplying the amplified current signal of 1 to the energization control terminal side of the second power amplifier, the second power transistor of the second power amplifier can be surely brought into the full-on state.

Further, since the second distributed current signal is alternately and smoothly distributed to one phase or two phases as the moving body 1 moves, the switching of the current path becomes smooth. For example, consider a case where the second distributed current signals G2 and G3 and the second amplified current signals H2 and H3 are energized. Second
The second NMOS power transistor 66 of the power amplifier 16 and the second NMOS power transistor 67 of the second power amplifier 17 are turned on. In response to the second amplified current signal H2, the second NMOS power transistor 66 is turned on (full on state or half on state) and supplies the positive side current of the drive current I2 of the coil 3. In response to the second amplified current signal H3, the second NMOS power transistor 67 is turned on (full on state or half on state) and supplies the positive side current of the drive current I3 of the coil 4. At least one of the second NMOS type power transistors 66 and 67 is set to the full-on state. In this way, the second distributed current signals G2, G3 and the second amplified current signals H2, H3 are changed in accordance with the moving operation of the moving body 1, and the positive sides of the drive currents I2, I3 of the coils 3, 4 are changed. Change the current value smoothly. The same applies to the switching operation of the current paths of the other phases. Here, since the three-phase second amplified current signal is changed in proportion to or substantially in proportion to the command signal Ad, a smooth current path switching operation can always be performed even when the command signal Ad changes. it can.

The first power amplifiers 11, 12, 1 of FIG.
Third NMOS power transistors 61, 62,
63 and the second N of the second power amplifiers 15, 16 and 17
The MOS type power transistors 65, 66, 67 include the command device 20, the current detector 21, the switching controller 22, the current supply device 30, the switching generator 34, the distribution generator 36, and the first generator.
Current amplifiers 41, 42, 43 and the second current amplifier 4
5, 46, 47 and the semiconductor elements such as required transistors and resistors of the high voltage output device 51 are joined and separated on a single silicon substrate to form an integrated circuit. FIG. 8 shows an example of the structure of the integrated circuit. Required N + on P-type silicon substrate
Various transistors are formed by diffusing layers, N− layers, P + layers, P− layers, and the like. Reference numeral 191 is an example of a double-diffused NMOS transistor, which is the first NMOS.
Type power transistor and a second NMOS type power transistor. The parasitic diode element of this double diffusion NMOS type transistor is used as a first power diode or a second power diode.

Reference numeral 192 is an example of an NPN type bipolar transistor, which is used as a signal amplifying transistor. Reference numeral 193 is an example of a PNP type bipolar transistor, which is used as a signal amplification transistor. Reference numeral 194 is a P-channel and N-channel CMOS
Type field effect transistor, which is used for logic signal processing. In addition, the ground potential (0
The junction is separated by the P layer having the same potential as the silicon substrate connected to V). Junction-separated integrated circuits use a low-cost manufacturing process compared to dielectric-isolated integrated circuits to integrate a large number of power transistor elements and signal transistors on a small single-chip substrate at high density. it can. That is, the integrated circuit can be inexpensively formed. Note that the specific mask layout is a design item, and detailed description thereof will be omitted. Next, the overall operation of the motor shown in FIG. 1 will be described. The switching generator 34 generates three-phase switching current signals D1, D2, D3 that change smoothly, and a distribution generator 36.
To the first distributor 37 and the second distributor 38 of The first distributor 37 includes three-phase first separation signals D1n and D2.
In response to n and D3n, three-phase first distribution current signals E1, E2, E3 proportional to the first supply current signal C1 are output. The first current amplifiers 41, 42, 43 output first amplified current signals F1, F2, F3 obtained by current-amplifying the first distributed current signals E1, E2, E3, respectively, and the first power amplifier 11, It supplies to each energization control terminal side of 12, 13. The first N of the first power amplifiers 11, 12, 13
The MOS type power transistors 61, 62 and 63 perform on / off high frequency switching operation by control pulse signals Y1, Y2 and Y3 in response to the switching control signal W1 of the switching controller 22.

When the switching control signal W1 is "Lb", the first power amplifiers 11, 12, 13 perform current amplification operation on the first amplified current signals F1, F2, F3, respectively, and the three-phase coils 2, 3 are used. Drive currents I1, I2, I
A current path for supplying the negative electrode side current of No. 3 is formed. When the switching control signal W1 is "Hb", all the first NMOS type power transistors 61, 62 and 63 of the first power amplifiers 11, 12 and 13 are turned off. At this time,
The current path for continuously supplying the negative side currents of the drive currents I1, I2, and I3 to the three-phase coils 2, 3, and 4 is the second power diode 65 of the second power amplifiers 15, 16, and 17.
It is formed by d, 66d and 67d. As a result, the drive current to the coil can be changed smoothly even though the first power amplifiers 11, 12, and 13 are performing the high-frequency switching operation. As a result, the switching operation of the current paths by the first power amplifiers 11, 12, 13 can be made smooth.

The current detector 21 detects the energizing current Ig of the DC power supply 50 and detects the current detection signal A in response to the energizing current Ig.
Output g. The switching controller 22 is the commander 20.
Command signal Ad and current detection signal Ag of current detector 21 are compared, and switching control signal W1 is changed in response to the comparison result, and first power amplifier 11, 1
2, 13 first NMOS type power transistors 61,
62 and 63 (and the first power section current mirror circuit) are turned off at the same time. As a result, one or two field effect type power transistors of the first NMOS type power transistors 61, 62 and 63 of the first power amplifiers 11, 12 and 13 respond to the single pulse signal W1. High-frequency switching operation of on and off,
The energization current Ig of the DC power supply 50 and the combined supply current to the coil are controlled to values in response to the command signal Ad. In addition, the current supplier 30, the first distributor 37, and the first current amplifier 4
1, 42, 43 form a first distribution control block, and control the energization section of the first NMOS type power transistors 61, 62, 63 of the first power amplifiers 11, 12, 13. The first distribution control block constitutes the first control means in the claims.

On the other hand, the second distributor 38 responds to the three-phase second separation signals D1p, D2p, and D3p to generate a three-phase second distribution current signal proportional to the second supply current signal C2. G
1, G2, G3 are output. Second current amplifier 45, 4
6 and 47 are second distributed current signals G1, G2,
Second amplified current signals H1, H2, H obtained by current amplification of G3
3 is output and supplied to each energization control terminal side of the second power amplifiers 15, 16 and 17. The first power amplifier 11,
Despite the fact that 12 and 13 are performing high-frequency switching operation of on / off, the second power amplifiers 15 and 16,
Reference numeral 17 amplifies and outputs the second amplified current signals H1, H2, and H3, respectively, and outputs the drive current I to the three-phase coils 2, 3, and 4.
The currents on the positive electrode side of 1, I2 and I3 are supplied. As a result, the current path switching operation by the second power amplifiers 15, 16 and 17 can be made smooth. The current supplier 30, the second distributor 38, and the second current amplifiers 45, 46, 47 are the second
Forming a distribution control block of the second power amplifier 1
The conduction sections of the second NMOS type power transistors 65, 66 and 67 of 5, 16, and 17 are controlled. The second distribution control block constitutes second control means in the claims.

In this way, the first of the three phases that changes smoothly in the rising slope portion and the falling slope portion.
The amplified current signals F1, F2, F3 of the first power amplifier 11, 12, 13 are supplied to the energization control terminal side of the first power amplifiers 11, 12, 13, and the first power amplifier 11, by the control pulse signals Y1, Y2, Y3 of the switching controller 22. The energization control terminal sides of 12 and 13 were switched on and off. As a result, the first NMOS type power transistors 61, 62 and 63 are turned on / off in high frequency switching operation in response to the single switching control signal W1 and the coil 2,
It is possible to smoothly change the negative electrode side currents of the drive currents I1, I2, I3 supplied to 3, 4 respectively.

Also, the three-phase second amplified current signals H1, H2, and H3 that change smoothly in the rising slope portion and the falling slope portion are supplied to the second power amplifier 15,
It was supplied to the power supply control terminals 16 and 17. This allows
The current on the positive electrode side to the coils 2, 3, 4 can be changed smoothly. As a result, the first power amplifiers 11, 1
The driving currents I1, I2, I3 to the coils 2, 3, 4 by the second and the third power amplifiers 15, 16, 17 have a smooth current waveform with very few pulsations. This allows
The pulsation of the driving force generated by the motor is greatly reduced,
A high-performance motor with less noise can be realized.

Further, the three-phase first amplified current signals are changed in proportion to or substantially in proportion to the command signal Ad so that an appropriate input current is always supplied to the energization control terminal side of the first power amplifier. did. As a result, even when the drive current to the coil changes in response to the command signal Ad, a smoothly changing drive current can be supplied to the coil, and a smooth current path switching operation can be realized. Further, the three-phase amplified current signals are changed in proportion to or substantially in proportion to the command signal Ad so that an appropriate input current is always supplied to the energization control terminal side of the second power amplifier. As a result, even when the drive current to the coil changes in response to the command signal Ad, a smoothly changing drive current can be supplied to the coil, and a smooth current path switching operation can be realized. Further, the first distributor 37 and the second distributor 38 operate so that the first distribution current signal and the second distribution current signal of the same phase flow complementarily to each other, so that the first power amplifier of the first power amplifier 1 N
The MOS type power transistor and the second NMOS type power transistor of the second power amplifier also operate complementarily. Therefore, a smoothly and continuously changing drive current in both directions is supplied to the coil, and a short circuit current due to the first power transistor and the second power transistor in the same phase does not occur.

In this embodiment, the first power amplifier
Since the NMOS type power transistor of (1) is turned on and off at high frequency, the power loss of the first power amplifier is small. Second NM of second power amplifier
Since the OS type power transistor is turned on,
The power loss of the second power amplifier is small. Therefore, the motor is very power efficient. Moreover, since the first amplified current signal and the second amplified current signal are changed in response to the command signal Ad, the power loss due to the input current to the first power amplifier and the second power amplifier can be reduced. ing.

Further, in the present embodiment, three three-phase first amplified current signals F1, F2, F3 (first three-phase current signals) that change smoothly in the rising slope portion and the falling slope portion are used. Was supplied to the energization control terminal side of the first power amplifier. Thereby, the first power amplifiers 11, 1
2, 13 first NMOS type power transistors 61,
One or two first NMOSs of 62 and 63
Current I to the coils 2, 3 and 4 while the high frequency switching operation of the power transistor is turned on and off.
The negative electrode side currents of 1, I2 and I3 were changed smoothly. Similarly, three-phase second amplified current signals H1 and H that smoothly change in the rising slope portion and the falling slope portion.
2, H3 (second three-phase current signals) were supplied to the energization control terminals of the three second power amplifiers. As a result, one or two second NMOS type power transistors of the second NMOS type power transistors 65, 66, 67 of the second power amplifiers 15, 16, 17 are turned on while the coil is turned on. Drive current I to 2, 3, 4
The positive electrode side currents of 1, I2 and I3 were changed smoothly.

As a result, the switching operation of the current path can be made smooth, the pulsation of the drive current is reduced, and the pulsation of the generated driving force and the motor vibration are significantly reduced. Further, even when the command signal Ad changes in response to the motor load by changing at least the inclined portion of the first three-phase current signal or the second three-phase current signal in response to the command signal Ad. A smooth current path switching operation can always be realized. The current signal supplied to the energization control terminal side of the power amplifier may be a current signal that changes substantially smoothly. For example, a current that changes its value stepwise in steps or digitally in steps. It may be a signal. In addition, among rising slope part, falling slope part and flat part,
The current path switching operation can be smoothed by supplying a current signal that changes substantially smoothly at least at the rising slope portion and / or the falling slope portion to the energization control terminal side of the power amplifier.

Further, in the present embodiment, the current detector 21 uses the current detection signal Ag in response to the current Ig of the DC power source 50.
Is getting Therefore, the current detection signal A of the current detector 21
g is a combined supply current (driving current I1, I
2, I3 corresponding to the negative side current or the positive side current). The switching controller 22 compares the command signal Ad with the output signal Ag of the current detector 21 and, in response to the comparison result, the first power amplifiers 11, 12, 13
First NMOS type power transistors 61, 62, 6
3 is turned on / off in a pulse-like high frequency switching operation. That is, the switching control signal W1 of the switching controller 22 is changed to "Lb" at the repetition timing of the trigger pulse signal Dp, and in response to the first three-phase current signals F1, F2, F3, The NMOS type power transistor No. 1 is turned on.

At the moment when the output signal Ag of the current detector 21 becomes larger than the command signal Ad, the switching controller 2
2 switching control signal W1 is changed to "Hb",
The first N of the three first power amplifiers 11, 12, 13
The MOS type power transistors 61, 62, 63 are simultaneously turned off. As a result, the command signal Ad is supplied while the negative-side drive current is supplied to the one-phase or two-phase coil.
It is possible to control the energizing current Ig in response to, and to accurately control the generated driving force of the motor to a value corresponding to the command signal Ad. Further, the single pulse signal (switching control signal W1) responding to the result of comparison between the command signal Ad and the output signal Ag of the current detector 21 turns on / off the three first power amplifiers at the same time. I was allowed to. As a result, accurate control of the drive current to the three-phase coil was realized with an extremely simple configuration. That is, the entire configuration becomes extremely simple. Further, since there is only one pulse signal that determines the timing of high frequency switching, the management of the detection timing is simple and the current detection operation and the current control operation are stable. The switching controller 22 and the current detector 21 form a switching operation block that controls the switching operation of the power amplifier.

In this embodiment, the motor structure is suitable for integration into an integrated circuit. Since a power transistor and a power diode formed as a parasitic element thereof are used as power elements, the number of components is small, and these power elements can be integrated on a small chip. Further, the commander 20, the current detector 21, the switching controller 22, the current supplier 30, and the switching generator 3
4, distribution generator 36 (first distributor 37 and second distributor 38), three first current amplifiers 41, 42, 43, 3
The semiconductor elements such as required transistors and resistors of the second current amplifiers 45, 46, 47 and the high voltage output device 51 can be integrated on the same chip as the power transistor.

Further, since the heat generation in each power element is made extremely small, it has a structure suitable for integration into an integrated circuit. That is, the first NMOS power transistor is turned on / off in a high frequency switching operation, and the second N type power transistor is turned on / off.
Since the MOS type power transistor is turned on, the first NMOS type power transistor and the second NM
Power loss and heat generation in the OS type power transistor, the first power diode, and the second power diode are extremely small. Therefore, thermal destruction does not occur even if these power elements are integrated into one chip. In addition, it is not necessary to take measures against heat generation such as a heat sink.

Further, in this embodiment, the operation of the parasitic transistor element formed in the junction isolation portion is prevented, and the structure suitable for integration into an integrated circuit is provided. The integrated circuit using the junction separation technique as shown in FIG. 8 can realize a low-cost IC suitable for high-density integration. However, there is a drawback in that a large number of parasitic transistor elements having a junction isolation portion connected to the negative terminal side (ground potential) of the DC power source as a base terminal are formed. Normally, these parasitic transistors are reverse biased so that they do not operate. However, when the terminal potential of the integrated transistor becomes lower than the ground potential by the forward voltage of the diode, the parasitic transistor operates, and a phenomenon occurs in which current is extracted from other integrated transistors. In an application such as a motor for supplying a large current to a coil having an inductance effect, the operation of the parasitic transistor may significantly disturb the operation of the integrated transistor. In particular, when the power transistor that supplies a current to the coil is subjected to high-frequency switching of on / off, the coil voltage is likely to be pulsed and the parasitic transistor is likely to operate.

On the other hand, in this embodiment, only the first NMOS type power transistor of the first power amplifier is turned on / off in a high frequency switching operation to supply a current to the coil. Since the current outflow terminal side of the first NMOS power transistor is connected to the negative electrode terminal side of the DC power supply, even if a high frequency switching operation is performed, the current inflow terminal side potential and current of the first NMOS power transistor The potential on the outflow terminal side does not fall below the ground potential. Further, the electric potential on the current inflow terminal side of the first NMOS power transistor becomes higher than the electric potential of the positive electrode terminal of the DC power supply 50, but the operation of the parasitic transistor which hinders the operation of the integrated transistor does not occur. Therefore, the first NMO
Even if the S-type power transistor performs high frequency switching, stable circuit operation can be obtained. The second NMOS power transistor of the second power amplifier smoothly switches the current path. Therefore, the second NM
Even when the current path switching operation is performed by the OS type power transistor, the potential of each power supply terminal of the coil is the DC power source 50.
Does not fall below the negative terminal potential.

Therefore, the first NM of the first power amplifier
The second of the OS type power transistor and the second power amplifier
Even if the switching operation of the current path or the high-frequency switching operation by the NMOS type power transistor is performed, the disturbing operation by the parasitic transistor does not occur. As a result, the first NM
Even if the OS type power transistor and the second NMOS type power transistor are integrated with other transistors into a one-chip integrated circuit, the transistors in the integrated circuit can be stably operated. As a result, the circuit part of the motor that electronically switches the current paths to the three-phase coils can be integrated on a single-chip silicon substrate without worrying about the disturbing operation by the parasitic transistor element. become.

Further, in the present embodiment, the first power amplifier is composed of the first field effect type power section current mirror circuit, and the second power amplifier is composed of the second field effect type power section current mirror circuit. The first power amplifiers 11, 12, 13 and the second power amplifiers 15, 1
The variations in the current amplification factors of 6 and 17 were significantly reduced.
In addition, the first three-phase current signals F1, F2, and F3 that smoothly change in response to the switching signal are generated, and among the rising slope portion, the falling slope portion, and the flat portion,
A first three that changes substantially smoothly at least in the rising slope portion and / or the falling slope portion.
The phase current signals F1, F2, F3 were supplied to the energization control terminal sides of the three first power amplifiers 11, 12, 13.

Further, the second three-phase current signals H1, H2, H3 that smoothly change in response to the switching signal are produced.
Among the rising slope portion, the falling slope portion, the flat portion, etc., the second three-phase current signals H1, H2, H3 that change substantially smoothly at least in the rising slope portion and / or the falling slope portion, The power was supplied to the energization control terminal side of the three second power amplifiers 15, 16 and 17. As a result, the three first field-effect power transistors 61, 62, 63 are operated while the first field-effect power transistors 61, 62, 63 of the first power amplifier are switched on and off at high frequencies.
And three second field effect power transistors 6
The switching operation of the current paths by 5, 66 and 67 was smoothly performed. As a result, the pulsation of drive current, motor vibration, and noise were significantly reduced. By integrating the field effect power transistor into an integrated circuit, it is possible to further reduce the variation in the current amplification factor of the field effect power current mirror circuit. There is also an advantage that variations in the combined transmission gain of the first power amplifier and the first distribution control block and the combined transmission gain of the second power amplifier and the second distribution control block are reduced.

Further, in response to the command signal Ad, the first supply current signal C1 and the second supply current signal C of the current supply unit 30 are supplied.
By changing 2, the current signals of the first three phases and the current signals of the second three phases are changed in response to the command signal Ad. Accordingly, at least one first NMOS power transistor among the three first NMOS power transistors performs a high-frequency switching operation in a full-on state and an off state, while smoothly performing a current path switching operation. I was able to make it. Also, three second NMOSs
Among the type power transistors, at least one second NMOS type power transistor could be surely fully turned on, while smoothly switching the current path. With this configuration, the command signal A
The current signal of the first three phases having an appropriate slope portion that changes substantially smoothly, even when a large current is supplied at the time of startup in response to d or a small current is supplied during steady control. The first
Can be supplied to the energization control terminal side of the power amplifier, and can be supplied to the energization control terminal side of the second power amplifier with the second three-phase current signal having an appropriate inclined portion that changes substantially smoothly.

As a result, a driving current with a small pulsation can be supplied to the coil, and the pulsation of the generated driving force becomes extremely small. In order to smoothly switch the current paths, it is important to make the angular width of each of the first three-phase current signals F1, F2, and F3 wider than 120 electrical degrees.
Most preferably, it is 80 degrees or approximately 180 degrees.
However, it is effective even at 150 degrees or more. In order to smoothly switch the current path, the angular width of each of the second three-phase current signals H1, H2, and H3 is 12 electrical degrees.
It is important to make it wider than 0 degree, and it is most preferable to set it to 180 degrees or approximately 180 degrees. But 15
It is effective even at 0 degrees or more.

Further, in this embodiment, the first three-phase current signal F1 and the second three-phase current signal H forming the first phase are used.
Reference numeral 1 denotes an electrical angle having a phase difference of 180 degrees, and flows in a complementary manner. The same applies to the first three-phase current signal F2 forming the second phase and the second three-phase current signal H2, and the first three-phase current signal F3 forming the third phase.
The same applies to the second three-phase current signal H3. This prevents the first power amplifier and the second power amplifier of the same phase from being energized at the same time. As a result, a short circuit current does not occur, so that neither current destruction nor thermal destruction of the power transistor occurs.

In this embodiment, the first power amplifiers 11, 12, 13 and the second power amplifiers 15, 16, 1 are used.
7, command device 20, current detector 21, switching controller 22, current supply device 30, switching generator 34, and distribution generator 3
6 (first distributor 37 and second distributor 38), first current amplifiers 41, 42, 43 and second current amplifiers 45, 4
6, 47 and the high voltage output device 51 form a drive circuit for supplying a drive current to the three-phase loads (coils 2, 3, 4). In addition, the switching generator 34 of the present embodiment is configured to include the position detection unit 100 that obtains a three-phase position detection signal by using two magnetoelectric conversion elements. However, it can be configured by using three magnetoelectric conversion elements. Alternatively, the switching signals D1, D2, D3 may be generated by using the counter electromotive force generated in the coils 2, 3, 4 without using such a detection element.

The first three-phase current signals F1, F2,
F3 or second three-phase current signals H1, H2, H3
May be switched with a substantially temporal inclination in the rising slope portion and the falling slope portion. As a result, the drive currents I1, I2, and I3 also switch the current paths smoothly with a temporal gradient in the rising slope portion and the falling slope portion. Furthermore, it is preferable to continuously change the current value when the polarity of the drive current changes, but the current signals of the first three phases of the same phase and the second three-phase current signals are used.
There is a period in which the phase current signals become zero at the same time, and there may be a time in which the phase drive current becomes zero. However, the conduction angle width of each first NMOS power transistor is set to be larger than 120 degrees in electrical angle (preferably 15 degrees).
The motor vibration is reduced by providing a period in which the two first NMOS type power transistors are simultaneously energized (0 degrees or more). Further, the conduction angle width of each second NMOS type power transistor is set to be larger than 120 degrees in electrical angle (preferably 150 degrees or more) and two second N-type power transistors are provided.
By providing a period in which the MOS type power transistors are simultaneously energized, motor vibration is reduced. At this time, making the conduction angle width of each first NMOS power transistor equal to or substantially equal to 180 degrees,
Most preferred. Further, it is most preferable that the conduction angle width of each second NMOS type power transistor is equal to or substantially equal to 180 degrees.

In the present embodiment, the first power amplifiers 11, 12, 13 and the second power amplifiers 15, 1 are also provided.
6 and 17 are not limited to the configuration shown in FIG. 1, but various modifications are possible. For example, the first power amplifier 11, 1
2 and 13 and second power amplifiers 15, 16 and 17, respectively, instead of the power amplifier 4 having the configuration shown in FIG.
50 may be used. The power amplifier 450 includes a field effect power transistor 451 and a power diode 451.
d, a field effect transistor 452, and a resistor 453, and is configured to include a field effect power section current mirror circuit. In this field effect type current mirror circuit, the control terminal side of the field effect type power transistor 451 is connected (directly or via some element such as a resistor) to the control terminal side of the field effect type transistor 452, and One terminal side of the current path terminal pair of the transistor 452 is connected to one terminal side of the current path terminal pair of the field effect power transistor 451 via the resistor 453, and the other terminal side of the current path terminal pair of the field effect transistor 452 is connected. Is connected (directly or via some element) to the power control terminal side of the power amplifier 450, and the control terminal side of the field effect transistor 452 is connected to the power control terminal side of the power amplifier 452 (directly or via some element). Are configured to be connected. This field effect type power section current mirror circuit has a large current amplification factor even when the input current to the energization control terminal side is small, and has an advantage that the input current to the power amplifier can be made small.

Further, for example, the power amplifier 460 having the structure shown in FIG. 11 may be used. Power amplifier 46
Reference numeral 0 has an NMOS power transistor 461, a power diode 461d, an NMOS transistor 462, and a resistor 463, and is configured to include a field effect power section current mirror circuit. In the field effect power section current mirror circuit, the control terminal side of the field effect power transistor 461 is connected (directly or through some element) to the control terminal side of the field effect transistor 462,
One terminal side of the pair of current path terminals of the field effect transistor 462 is connected to the energization control terminal side of the power amplifier 460 with the resistor 4
A field effect transistor 462 connected through 63.
The other terminal side of the current path terminal pair of is connected to one terminal side of the current path terminal pair of the field effect power transistor 461 (directly or through some element), and the control terminal side of the field effect transistor 462 is connected to It is configured to be connected (directly or via some element) to the energization control terminal side of the power amplifier 460. This field effect type power part current mirror circuit has a predetermined current amplification factor while the input current to the energization control terminal side is small, and when the input current increases, the current amplification factor rapidly increases. This has the advantage that the input current to the power amplifier can be reduced when a large current is supplied to the coil, such as when the motor is started. The NMOS power transistor 451 and the power diode 451d and NM
OS type power transistor 461 and power diode 4
61d can be constituted by a field effect type power transistor having a double diffused N channel MOS structure and its parasitic diode element, and is easily integrated into an integrated circuit.

In the present embodiment, the switching pulse circuit 330 of the switching controller 22 can be modified in various ways. For example, instead of the switching pulse circuit 330, the switching pulse circuit 480 having the configuration shown in FIG. 12 can be used. The comparison circuit 481 of the switching pulse circuit 480 outputs a comparison output signal Cr that compares the command signal Ad and the current detection signal Ag. That is, when the current detection signal Ag is smaller than the command signal Ad, the comparison output signal Cr becomes "Lb", and when the current detection signal Ag becomes larger than the command signal Ad, the comparison output signal C
r changes to “Hb”. The time constant circuit 482 has a rising edge (“L”) of the comparison output signal Cr of the comparison circuit 481.
A switching control signal W1 which becomes "Hb" for a predetermined time width Wp is generated by using (a change time point from "b" to "Hb") as a trigger. This time width Wp is determined by charging and discharging the capacitor 483.

When the switching control signal W1 is "Lb", the control pulse signals Y1, Y2 and Y3 are turned off (non-energized state), and the first power amplifier is turned on in response to the first amplified current signals F1, F2 and F3. 11, 12, and 13 are turned on (full on state or half on state) to form current paths to the coils 2, 3, and 4. When the switching control signal W1 becomes "Hb", the control pulse signals Y1 and Y
2, Y3 are turned on (current-carrying state), and the first NMOS type power transistors 61, 62, 63 of the first power amplifiers 11, 12, 13 are simultaneously turned off.

As a result, when the current detection signal Ag is smaller than the command signal Ad, the switching control signal W1 becomes "L".
b ″ and the first power amplifier is turned on. The energizing current Ig of the DC power supply 50 increases and the current detection signal Ag
At a timing when is larger than the command signal Ad, the comparison output signal Cr changes to “Hb”. The rising edge of the comparison output signal Cr of the comparison circuit 481 triggers the time constant circuit 482, and the switching controller signal W1 becomes "Hb" for the predetermined time width Wp. As a result, the first power amplifiers 11, 12, and 13 are simultaneously turned off during the predetermined time width Wb. The switching control signal W1 changes to "Lb" after a lapse of a predetermined time width Wp after the first power amplifier is turned off, and the first power amplifier is turned on again.
Power amplifier is turned on. In this way, the first NMOS type power transistors 61, 62, 63 of the first power amplifiers 11, 12, 13 perform on / off high frequency switching operation. Further, the current paths to the coils 2, 3, 4 are smoothly switched as the moving body 1 moves.

<Second Embodiment> FIGS. 13 to 15 show a motor according to a second embodiment of the present invention. FIG. 13 shows the overall configuration. In this embodiment, the auxiliary feeder 500, the first combiners 81, 82 and 83, and the second combiners 85, 86 and 87 are further provided in the first embodiment. In other configurations, the same components as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted. Auxiliary feeder 5 of FIG.
00 supplies three-phase first auxiliary current signals F4, F5, F6 and three-phase second auxiliary current signals H4, H5, H6 in response to the output signal of the switching generator 34. FIG. 14 shows a specific configuration of the auxiliary feeder 500. The auxiliary supply device 500 is composed of an auxiliary switching preparation unit 510 and an auxiliary current switching unit 520. The auxiliary switching creation unit 510 receives the three-phase position detection signals Ja1, Jb1, and Jc1 of the switching creation unit 34, and outputs auxiliary switching signals J4 to J9 in response to these position detection signals.

FIG. 15 shows a specific example of the configuration of the auxiliary switching creation section 510. The comparator circuits 541, 542, and 543 of the auxiliary switching creation unit 510 compare the two-phase signals of the three-phase position detection signals Ja1, Jb1, and Jc1, respectively, and the three-phase digital signal Jd corresponding to the comparison result. , J
e and Jf are output. 16 (a) to 16 (c) show the waveform relationships of the digital signals Jd, Je, Jf. These three
The phase digital signals Jd, Je, and Jf are supplied to the inverting circuit 55.
1, 552, 553 and AND circuits 561 to 567 are logically combined to generate auxiliary switching signals J4 to J9.
16D to 16I show the waveform relationships of the auxiliary switching signals J4 to J9. The digital signals Jd, Je, and Jf are "Hb" over an angular width of 180 degrees or approximately 180 degrees, respectively, and "Lb" over the remaining 180 degrees in electrical angle. In addition, digital signals Jd, Je, J
f becomes a three-phase signal having a phase difference of 120 degrees. The auxiliary switching signals J4, J5, and J6 are each 12 electrical degrees.
It becomes "Hb" over an angle width of 0 degree or approximately 120 degrees, and becomes "Lb" over the remaining angle width of 240 degrees. These auxiliary switching signals J4, J5, J6 are three-phase digital signals that change in order. Further, the auxiliary switching signals J7, J8, J9 become "Hb" over an angular width of 120 degrees or approximately 120 degrees in electrical angle,
It becomes "Lb" over the remaining 240 degree angular width. These auxiliary switching signals J7, J8, J9 are three-phase digital signals that change in order.

The auxiliary switching signals J4 to J9 of the auxiliary switching generating section 510 of FIG. 14 are input to the auxiliary current switching section 520. The auxiliary current switching unit 520 includes the three first current sources 52.
1, 522, 523 and three second current sources 525, 52
6,527 and three first switch circuits 531 and 53
2, 533 and three second switch circuits 535, 53
6, 537. First current sources 521, 52
2, 523 and the second current sources 525, 526, 527,
The high voltage output device 51 is connected in a direction to flow out from the high potential point potential Vu. First switch circuits 531 and 53
2, 533 are auxiliary switching signals J of the auxiliary switching creating unit 510.
When 4, J5 and J6 become "Hb", the switch is turned on. Thereby, the first current sources 521, 522, 523
To output three-phase first auxiliary current signals F4, F5, F6 in response to the auxiliary switching signals J4, J5, J6. In addition, the second switch circuits 535, 536, 53
Reference numeral 7 denotes auxiliary switching signals J7, J of the auxiliary switching creating section 510.
8. When J9 becomes "Hb", the switch is turned on. As a result, the currents of the second current sources 525, 526, 527 are output in response to the auxiliary switching signals J7, J8, J9.
The second auxiliary current signals H4, H5, H6 of the phase are produced.
17 (a), (b), and (c) show the first auxiliary current signal F
Waveforms of F4, F5, and F6 are shown in FIGS.
The waveforms of the second auxiliary current signals H4, H5, and H6 are shown in (f).

The first combiner 81 of FIG. 13 is simply composed of nodes, and the first amplified current signal F1 of the first current amplifier 41 and the first auxiliary current signal F4 are added and combined to form the first combined current signal F1. And outputs a combined current signal F1 + F4. First synthesizer 82
Is simply a node, and adds and synthesizes the first amplified current signal F2 of the first current amplifier 42 and the first auxiliary current signal F5 to output the first synthesized current signal F2 + F5. The first combiner 83 is simply composed of nodes, and the first amplified current signal F3 of the first current amplifier 43 and the first auxiliary current signal F6 are added and combined to form a first combined current signal F3 + F6.
Is output. The second combiner 85 is simply composed of nodes, and the second amplified current signal H1 of the second current amplifier 45 and the second auxiliary current signal H4 are added and combined to obtain the second combined current signal H1 + H4. Output. The second combiner 86 is simply composed of nodes, and adds and combines the second amplified current signal H2 of the second current amplifier 46 and the second auxiliary current signal H5,
The second combined current signal H2 + H5 is output. The second combiner 87 is simply composed of nodes, and the second current amplifier 4
7 second amplified current signal H3 and second auxiliary current signal H6
Are added and combined, and a second combined current signal H3 + H6 is output.

FIG. 17G shows the first amplified current signal F1,
The waveforms of F2 and F3 are shown, and the waveforms of the second amplified current signals H1, H2, and H3 are shown in FIG. 17 (h). In addition, FIG.
In (i), the first combined current signals F1 + F4, F2 + F5,
The waveform of F3 + F6 is shown, and the waveforms of the second combined current signals H1 + H4, H2 + H5, and H3 + H6 are shown in FIG. 17 (j). First combined current signals F1 + F4, F2 + F5, F3
+ F6 is a first three-phase current signal that smoothly changes over an angular width (electrical angle) of about 30 degrees in the rising slope portion from zero and the falling slope portion to zero. Similarly, the second combined current signal H1 + H
4, H2 + H5 and H3 + H6 are about 3 at the rising slope portion from zero and the falling slope portion to zero.
The current signal of the second three phases smoothly changes over the angular width of 0 degree (electrical angle).

First combined current signals F1 + F4, F2 + F
5, F3 + F6 are respectively the first power amplifier 11,
The first NMO is supplied to the energization control terminals 12 and 13 side.
The energization of the S-type power transistors 61, 62, 63 is distributed and controlled, and the current paths to the coils 2, 3, 4 are smoothly switched. Actually, while the first NMOS power transistors 61, 62, 63 are controlled by the switching controller 22 to turn on / off high frequency switching operation,
Distribution control of energization to the coils is performed in response to the first combined current signal. Similarly, the second combined current signal H1 + H
4, H2 + H5, H3 + H6 are supplied to the energization control terminal sides of the second power amplifiers 15, 16 and 17, respectively.
Second NMOS power transistors 65, 66, 67
The distribution of the energization of the coils is controlled to smoothly switch the current paths to the coils 2, 3, and 4.

Other configurations and operations are the same as those in the first embodiment described above.
The detailed description is omitted. In this embodiment,
Smooth the three-phase first combined current signals (first three-phase current signals) supplied to the energization control terminal side of the first power amplifier at least at the rising slope portion and / or the falling slope portion. To smooth the current path switching operation by the first NMOS type power transistor, and to supply a smoothly varying drive current to the coil. At this time, by including the first auxiliary current signal in the first combined current signal, the on-resistance of the first NMOS power transistor that predominantly forms the current path is reduced, and the power loss is reduced. Further, the energization control terminal side of the first power amplifier is turned on / off by the control pulse signals Y1, Y2, Y3 of the switching controller, and the first N
High-frequency switching operation was performed on the MOS power transistor to significantly reduce power loss.

Similarly, a three-phase second combined current signal (second third current) supplied to the energization control terminal side of the second power amplifier.
Phase current signal) is smoothly changed at least at the rising slope portion and / or the falling slope portion to smooth the switching operation of the current path by the second NMOS type power transistor, and to smoothly change the driving current. Supplied to the coil. At this time, by including the second auxiliary current signal in the second combined current signal, the on-resistance of the second NMOS power transistor that predominantly forms the current path is reduced, and the power loss is reduced. As a result, the first NMOS type power transistor of the first power amplifier and the second NMOS type of the second power amplifier are
The power loss of the die-type power transistor can be greatly reduced, and the power efficiency of the motor can be greatly improved. Further, pulsation of the drive current to the coil can be reduced, and motor vibration and noise can be significantly reduced.

In the specific configuration of the above-described embodiment, the conduction width of the first combined current signal is 180 degrees or approximately 180 degrees, and the conduction width of the first auxiliary current signal is 120 degrees or approximately 120 degrees. . As a result, the first combined current signal smoothly changes the angular width of 30 degrees or approximately 30 degrees in the rising slope portion and smoothly changes the angular width of 30 degrees or approximately 30 degrees in the falling slope portion. As a result, a smooth current path switching operation and a reduction in power loss due to the on-resistance of the first NMOS power transistor are realized at the same time. In addition, the three-phase first auxiliary current signals F4, F5, F
6 are sequentially switched and supplied, and any one of the first auxiliary current signals is supplied. In addition, 2 in the same period
One or more first auxiliary current signals are prevented from overlapping.

Further, the conduction width of the second combined current signal is set to 18
The current width of the second auxiliary current signal was set to 0 degree or about 180 degrees, and the conduction width of the second auxiliary current signal was set to 120 degrees or about 120 degrees. as a result,
The second combined current signal smoothly changes the angular width of 30 degrees or approximately 30 degrees in the rising slope portion and smoothly changes the angular width of 30 degrees or approximately 30 degrees in the falling slope portion. As a result, the smooth switching operation of the current path and the reduction of the power loss due to the on-resistance of the second NMOS power transistor are realized at the same time. Further, the three-phase second auxiliary current signals H4, H5, and H6 are sequentially switched and supplied, and any one second auxiliary current signal is supplied. In addition, two or more second auxiliary current signals are prevented from overlapping in the same period. However, these angular widths can be changed in a timely manner. The angular width of the first combined current signal and the second combined current signal may be 150 degrees, for example. Further, the angular width of the first auxiliary current signal and the second auxiliary current signal can be different from 120 degrees. Further, also in this embodiment, various advantages similar to those of the above-described first embodiment can be obtained.

<< Third Embodiment >> FIGS. 18 and 19 show a motor according to a third embodiment of the present invention. FIG. 18 shows the overall configuration. In the present embodiment, the output current signal of the auxiliary feeder 500 in the above-described Embodiment 2 is directly supplied to the energization control terminal side of the power amplifier. In other configurations,
The same components as those in the first or second embodiment described above are designated by the same reference numerals, and detailed description thereof is omitted. In FIG. 18, the first power amplifier 611 has the first amplified current signal F of the first current amplifier 41 at the first terminal on the energization control terminal side.
1 is input, the first auxiliary current signal F4 of the auxiliary supply device 500 is input to the second terminal on the energization control terminal side, and the control pulse signal Y1 of the switching controller 22 is input to the third terminal on the energization control terminal side. Has been done.

Similarly, in the first power amplifier 612, the first terminal of the first current amplifier 42 is connected to the first terminal on the energization control terminal side.
The amplified current signal F2 of
The first auxiliary current signal F5 of the auxiliary feeder 500 is input to the terminal, and the control pulse signal Y2 of the switching controller 22 is input to the third terminal on the energization control terminal side. Similarly, the first power amplifier 613 has the first amplified current signal F of the first current amplifier 43 at the first terminal on the energization control terminal side.
3 is input, the first auxiliary current signal F6 of the auxiliary supply device 500 is input to the second terminal on the energization control terminal side, and the control pulse signal Y3 of the switching controller 22 is input to the third terminal on the energization control terminal side. Has been done.

In the second power amplifier 615, the second amplified current signal H1 of the second current amplifier 45 is input to the first terminal on the energization control terminal side and the second terminal on the energization control terminal side is supplemented. The second auxiliary current signal H4 of the supplier 500 is input. Similarly, the second power amplifier 616 has a second terminal of the second current amplifier 46 at the first terminal on the energization control terminal side.
The amplified current signal H2 of
The second auxiliary current signal H5 of the auxiliary feeder 500 is input to the terminal. Similarly, the second power amplifier 617 is
The second amplified current signal H3 of the second current amplifier 47 is input to the first terminal on the energization control terminal side, and the second auxiliary current signal H6 of the auxiliary feeder 500 is input to the second terminal on the energization control terminal side. Has been done.

FIG. 19 shows the first power amplifiers 611 and 61.
2, 613 and second power amplifiers 615, 616, 61
7 shows a power amplifier 620 corresponding to a specific configuration of No. 7. Here, the case where the power amplifier 620 is used as the first power amplifier 611 is shown. The power amplifier 620 includes an NMOS power transistor 621,
The NMOS power transistor 621 includes a power diode 621d reversely connected in parallel. The current inflow terminal side of the power diode 621d is NM
It is connected to the current outflow terminal side of the OS type power transistor 621, and the current outflow terminal side is connected to the current inflow terminal side of the NMOS type power transistor 621. The power amplifier 620 forms a field effect type power section current mirror circuit by the NMOS type power transistor 621 and the NMOS type transistor 622 (the cell area ratio is 1).
00 times).

A resistor 623 is connected between the first terminal on the energization control terminal side of the power amplifier 620 and one terminal side of the current path terminal pair of the NMOS type transistor 622, and the first terminal and the second terminal on the energization control terminal side are connected. A resistor 624 is connected between the terminals, and the third terminal on the energization control terminal side is connected to the control terminal side of the NMOS power transistor 621. As a result, the field effect type power section current mirror circuit of the power amplifier 620 has a predetermined current amplification factor as long as the first amplified current signal F1 to the first terminal on the energization control terminal side is small and has the first current amplification factor. When the amplified current signal F1 becomes large, the current amplification factor rapidly increases. Further, the ON resistance of the NMOS power transistor 621 is reduced by the first auxiliary current signal F4 to the second terminal on the energization control terminal side.
Further, the NMOS type power transistor 621 and the field effect type power section current mirror circuit of the power amplifier 620 perform high frequency switching operation of on / off by the control pulse signal Y1 to the third terminal on the energization control terminal side.

The NMOS power transistor 62
1 is composed of a field effect transistor having a double diffused N-channel MOS structure, for example, and uses a parasitic diode element of the NMOS power transistor 621 as a power diode 621d. The resistor 623 and / or the resistor 624 of the power amplifier 620 are
Even if it is zero, there is no problem in operation. In addition, the first amplified current signal F1 and the first auxiliary current signal F4 are output to the power amplifier 620.
NMOS power transistor 62 synthesized inside the
1 and the power mirror current mirror circuit.

When the power amplifier 620 is used as the first power amplifiers 612 and 613, it has the same configuration as that shown in FIG. When the power amplifier 620 is used as the second power amplifiers 615, 616, 617, the third terminal on the energization control terminal side need not be connected. Other configurations and operations are similar to those of the above-described second embodiment or first embodiment, and detailed description thereof will be omitted.

In this embodiment, at least the three-phase first amplified current signals (first three-phase current signals) supplied to the first terminal on the energization control terminal side of the first power amplifier are at least supplied. Smoothly changing the rising slope portion and / or the falling slope portion to smooth the current path switching operation by the first NMOS power transistor,
A smoothly varying drive current was applied to the coil. Also,
The first terminal is connected to the second terminal on the energization control terminal side of the first power amplifier.
The auxiliary current signal is supplied to reduce the on-resistance of the first NMOS type power transistor that predominantly forms the current path. Here, the first NMOS-type power transistor that predominantly forms a current path means a power transistor that supplies the largest drive current among the three first NMOS-type power transistors. Further, the control pulse signal of the switching controller is supplied to the third terminal on the energization control terminal side of the first power amplifier so that the first NMOS type power transistor is turned on and off at high frequency.

Similarly, at least a rising slope of each of the three-phase second amplified current signals (second three-phase current signals) supplied to the second terminal on the energization control terminal side of the second power amplifier is obtained. Smooth changes were made in the portion and / or the falling slope portion to smooth the current path switching operation by the second NMOS power transistor, and a smoothly changing drive current was supplied to the coil. Also, the second auxiliary current signal is supplied to the second terminal on the energization control terminal side of the second power amplifier to predominantly form the current path.
The ON resistance of the MOS type power transistor is reduced. Here, the second N that predominantly forms the current path
The MOS type power transistor means three second NMOs.
It means a power transistor that supplies the largest drive current among S-type power transistors.

Further, in this embodiment, various advantages similar to those of the above-mentioned embodiments can be obtained. Further, in the present embodiment, the first power amplifiers 611, 612, 613 and the second power amplifiers 615, 616, 617 are not limited to the power amplifier 620 having the configuration shown in FIG. 19, and various modifications are possible. is there. In FIG. 20, the first power amplifier 611,
612 and 613 and the second power amplifiers 615 and 616,
617 shows another configuration of power amplifier 640 that can be used. Here, the case where the power amplifier 640 is used as the first power amplifier 611 is shown. The power amplifier 640 includes an NMOS power transistor 641 and
It is configured to include a power diode 641d reversely connected in parallel to the NMOS power transistor 641. The current inflow terminal side of the power diode 641d is NM
It is connected to the current outflow terminal side of the OS type power transistor 641, and the current outflow terminal side is connected to the current inflow terminal side of the NMOS type power transistor 641. The power amplifier 640 forms a field effect power section current mirror circuit by the NMOS power transistor 641 and the NMOS transistor 642 (the cell area ratio is 1).
00 times).

The first terminal on the energization control terminal side of the power amplifier 640 is connected to one terminal side of the current path terminal pair of the NMOS type transistor 622, and the NMOS type transistor 6 is connected.
A resistor 643 is connected between the other terminal side of the current path terminal pair of No. 22 and one terminal side of the current path terminal pair of the NMOS power transistor 641, and between the first terminal and the second terminal on the energization control terminal side. Is connected to the resistor 644, and the third terminal on the energization control terminal side is connected to the control terminal side of the NMOS power transistor 641. As a result, the field effect type power section current mirror circuit of the power amplifier 640 starts performing a large current amplification operation even when the first amplified current signal F1 to the first terminal on the energization control terminal side is small.

Further, the first terminal to the second terminal on the energization control terminal side is
On-resistance of the NMOS power transistor 641 is reduced by the auxiliary current signal F4. Further, the NMOS type power transistor 641 and the field effect type power section current mirror circuit of the power amplifier 640 perform high frequency on / off switching operation by the control pulse signal Y1 to the third terminal on the energization control terminal side. The NMOS power transistor 641 is formed of, for example, a field effect transistor having a double diffused N-channel MOS structure, and the parasitic diode element of the NMOS power transistor 641 is replaced by the power diode 641.
It is used as d. Note that there is no operational problem even if the resistance 643 and / or the resistance 644 of the power amplifier 640 is zero.

<Embodiment 4> FIGS. 21 and 22 show a motor according to Embodiment 4 of the present invention. FIG. 21 shows the overall configuration. In this embodiment, the first NMOS type power transistor of the first power amplifier and the second NMOS type power transistor of the second power amplifier in the third embodiment are turned on.
A switching controller 700 for performing a high frequency switching operation of OFF is provided. In other configurations,
The same components as those in the first, second, or third embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted.

The switching controller 700 of FIG. 21 responds to the result of comparison between the command signal Ad and the current detection signal Ag of the current detector 21 to generate control pulse signals Y1, Y2, Y3, Y.
4, Y5, Y6 are made and the first power amplifiers 611, 6 are made.
12, 613 and the second power amplifiers 615, 616, 6
17 is turned on and off at high frequency switching operation. The specific configurations of the first power amplifiers 611, 612 and 613 and the second power amplifiers 615, 616 and 617 are the same as those of the power amplifier 620 or FIG.
The power amplifier 640 is similar to the power amplifier 640 in FIG.

FIG. 22 shows a specific structure of the switching controller 700. The comparison circuit 331 of the switching pulse circuit 330 of the switching controller 700 uses the command signal A
A comparison output signal Cr obtained by comparing d with the current detection signal Ag is obtained. The trigger generation circuit 332 outputs a high frequency trigger pulse signal Dp of about 100 kHz. State holding circuit 3
33 changes the switching control signal W1 to "Lb" (low potential state) at the rising edge of the trigger pulse signal Dp, and changes the switching control signal W1 to "Hb" (high potential state) at the rising edge of the comparison output signal Cr. Change. The switching control signal W1 is "L"
b ″, the control transistors 741, 742, 74
3, 744, 745, and 746 are turned off at the same time, and the control pulse signals Y1, Y2, Y3, Y4, Y5, and Y6 are turned off (non-energized state). At this time, the first power amplifiers 611, 612, and 613 current-amplify the first amplified current signals F1, F2, and F3, respectively, and the coils 2, 3, and 4 perform negative current amplification on the drive currents I1, I2, and I3. To form a current path for supplying

In addition, the second power amplifiers 615 and 61
Reference numerals 6 and 617 denote second amplified current signals H1 and H, respectively.
2 and H3 are current-amplified, and drive current I is applied to coils 2, 3, and 4.
A current path for supplying the positive electrode side current of 1, I2, I3 is formed. When the switching control signal W1 is "Hb", the control transistors 741, 742, 743, 744, 74
5, 746 are turned on at the same time, and the control pulse signal Y1,
Y2, Y3, Y4, Y5 and Y6 are turned on (energized state). At this time, the first power amplifiers 611, 612, 6
All 13 first NMOS power transistors are simultaneously turned off, and the second power amplifiers 615, 6
The second NMOS type power transistors 16 and 617 are all turned off at the same time. In this way, the first power amplifiers 611, 612, 613 and the second power amplifiers 615, 616, 617 are high-frequency switching-controlled in the ON state and the OFF state by the single switching control signal W1, and drive to the coil. The current is made to respond to the command signal Ad. This will be described.

The switching control signal W of the state holding circuit 333 is generated by the rising edge of the trigger pulse signal Dp.
When 1 changes to “Lb”, the first amplified current signal F
The first power amplifier in the phase where 1, F2 and F3 are not zero is energized, and the second power amplifier in the phase where the second amplified current signals H1, H2 and H3 are not zero is energized. For example, only the first amplified current signal F1 is selected and the second amplified current signal F1 is selected.
Consider a case where only the amplified current signal H2 of is selected. In response to the first amplified current signal F1, the first power amplifier 6
The first NMOS type power transistor 11 is turned on to form a current path for supplying the negative side current of the drive current I1 of the coil 2. In response to the second amplified current signal H2, the second NMOS type power transistor of the second power amplifier 616 becomes conductive and the drive current I of the coil 3 is reached.
A current path for supplying the positive electrode side current of 2 is formed.

In order to supply a sufficient drive current to the coils 2 and 3, the first NMOS type power transistor of the first power amplifier 611 and the second NMOS type power transistor of the second power amplifier 616 are in a full on state. become. The driving current value of the coils 2 and 3 gradually increases due to the inductance action of the coils. Therefore, the energizing current Ig supplied from the DC power supply 50 increases, and the current detector 2
The current detection signal Ag of 1 becomes large. Current detection signal Ag
Is greater than the command signal Ad, the comparison circuit 33
The comparison output signal Cr of 1 generates a rising edge, and the switching control signal W1 of the state holding circuit 333 is "H".
b ". The switching control signal W1 is" Hb ".
When the control pulse signals Y1 to Y6 are turned on,
Power amplifiers 611, 612, 613 of the first NMO
S-type power transistor and second power amplifier 61
The second NMOS type power transistors 5, 616 and 617 are all turned off at the same time. At this time, due to the inductance action of the coil 2, the drive voltage on the power supply terminal side of the coil 2 is suddenly increased to form a current path that passes through the second power diode of the second power amplifier 615. As a result, the negative electrode side current of the drive current I1 to the coil 2 continues to flow continuously.

Further, due to the inductance action of the coil 3, the drive voltage on the power supply terminal side of the coil 3 is drastically reduced, and a current path passing through the first power diode of the first power amplifier 612 is formed. As a result, the positive electrode side current of the drive current I2 to the coil 3 continues to flow continuously. As a result, the drive current values of the coils 2 and 3 gradually decrease. After a short time, the trigger pulse signal Dp
Then, the next rising edge arrives and the above switching operation is repeated. In this way, the peak value of the energizing current Ig of the DC power supply 50 is controlled to a value in response to the command signal Ad, and the drive current to the coils 2, 3, 4 is controlled. Also,
When the first auxiliary current signal F4 is supplied to the energization control terminal side of the first power amplifier 611, the effect of reducing the on-resistance of the first NMOS type power transistor of the first power amplifier 611 is obtained. is there. In addition, when the second auxiliary current signal H5 is supplied to the energization control terminal side of the second power amplifier 616, the second power amplifier 6
This has the effect of reducing the on-resistance of the 16th second NMOS type power transistor.

Furthermore, since the first amplified current signal is alternately and smoothly distributed to one phase or two phases as the moving body 1 moves, the first power amplifiers 611 and 612,
The switching of the current path by 613 becomes smooth. The high frequency switching operation of the first NMOS type power transistors of the first power amplifiers 611, 612 and 613 is the same as that described above. In addition, the second
Of the second power amplifiers 615 and 61, since the amplified current signal of 1 is smoothly distributed to one phase or two phases alternately.
Switching of the current paths by 6, 617 becomes smooth.

Second power amplifiers 615, 616, 61
The high frequency switching operation of the second NMOS power transistor 7 is the same as that described above. As a result, the drive current changes smoothly, and current pulsation and motor vibration are significantly reduced. In addition, the first amplified current signal F1,
Since F2, F3 and the second amplified current signals H1, H2, H3 are reduced to the minimum necessary values in response to the command signal Ad, a smooth current path switching operation is always performed even when the command signal Ad changes. Can be done. In addition, power loss due to the first amplified current signal and the second amplified current signal can be reduced. Other configurations and operations are similar to those of the above-described first embodiment, second embodiment, or third embodiment, and detailed description thereof will be omitted.

In this embodiment, the first power amplifier
The high-frequency switching operation is performed on the NMOS power transistor and the second NMOS power transistor of the second power amplifier, so that the power loss in these power transistors is significantly reduced. At this time,
Since the first power amplifier and the second power amplifier are turned on / off at the same time in response to the single switching control signal W1, the configuration for performing high frequency switching operation and the configuration for controlling the drive current to the coil can be extremely simplified. . Furthermore, this embodiment can also obtain various advantages similar to those of the above-described first embodiment, second embodiment, or third embodiment.

<Fifth Embodiment> FIGS. 23 to 27 show a motor according to a fifth embodiment of the present invention. FIG. 23 shows the overall configuration. In the fifth embodiment, the second power amplifiers 815, 816, 817 in the fourth embodiment are configured by using the second PMOS type power transistor. Also,
The switching controller 800, the auxiliary supply 810, and the second current amplifiers 845, 846, 847 are modified. In other configurations, the same components as those in the first, second, third or fourth embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 23, the first power amplifier 61
1 is a first current amplifier 4 at the first terminal on the energization control terminal side.
No. 1 first amplified current signal F1 is input, the first auxiliary current signal F4 of the auxiliary feeder 810 is input to the second terminal on the energization control terminal side, and the switching controller is supplied to the third terminal on the energization control terminal side. The control pulse signal Y1 of 800 is input. Similarly, in the first power amplifier 612, the first amplified current signal F2 of the first current amplifier 42 is input to the first terminal on the energization control terminal side, and the auxiliary supply device is supplied to the second terminal on the energization control terminal side. The first auxiliary current signal F5 of 810 is input,
A switching controller 800 is provided at the third terminal on the energization control terminal side.
Control pulse signal Y2 is input. Similarly, the first
In the power amplifier 613, the first amplified current signal F3 of the first current amplifier 43 is input to the first terminal on the energization control terminal side, and the first terminal of the auxiliary feeder 810 is connected to the second terminal on the energization control terminal side. The auxiliary current signal F6 is input, and the control pulse signal Y3 of the switching controller 800 is input to the third terminal on the energization control terminal side.

The aforementioned power amplifier 620 shown in FIG.
Are used as the first power amplifiers 611, 612, and 613. When the power amplifier 620 of FIG. 19 is used as the first power amplifier 611, it has already been described. Further, the first power amplifiers 612 and 613 have the same configuration. In FIG. 23, in the second power amplifier 815, the second amplified current signal H1 of the second current amplifier 845 is input to the first terminal on the energization control terminal side,
The second auxiliary current signal H4 of the auxiliary feeder 810 is input to the second terminal on the energization control terminal side, and the control pulse signal Y4 of the switching controller 800 is input to the third terminal on the energization control terminal side. Similarly, the second power amplifier 816
Is the second current amplifier 84 at the first terminal on the energization control terminal side.
The second amplified current signal H2 of No. 6 is input, the second auxiliary current signal H5 of the auxiliary feeder 810 is input to the second terminal on the energization control terminal side, and the switching controller is input to the third terminal on the energization control terminal side. The control pulse signal Y5 of 800 is input. Similarly, in the second power amplifier 817, the second amplified current signal H3 of the second current amplifier 847 is input to the first terminal on the energization control terminal side, and the auxiliary supply device is input to the second terminal on the energization control terminal side. The second auxiliary current signal H6 of 810 is input, and the switching controller 8 is connected to the third terminal on the energization control terminal side.
The control pulse signal Y6 of 00 is input.

FIG. 27 shows the second power amplifiers 815 and 81.
Power amplifier 90 corresponding to the concrete configuration of 6, 817
Indicates 0. Here, the case where the power amplifier 900 is used as the second power amplifier 815 is shown. The power amplifier 900 is a PMOS power transistor 90.
5 and a power diode 905d reversely connected in parallel to the PMOS power transistor 905. The current inflow terminal side of the power diode 905d is connected to the current outflow terminal side of the PMOS power transistor 905, and the current outflow terminal side is connected to the current inflow terminal side of the PMOS power transistor 905. The power amplifier 900 is a PMOS power transistor 90.
5 and the PMOS transistor 906 form a field effect type power section current mirror circuit (cell area ratio is 100 times). A resistor 907 is connected between the first terminal on the side of the current control terminal of the power amplifier 900 and one terminal side of the current path terminal pair of the PMOS transistor 906, and the resistor 907 is connected between the first and second terminals on the side of the current control terminal. Is connected to the resistor 908, and the third terminal on the energization control terminal side is connected to the control terminal side of the PMOS power transistor 905. As a result, the field effect type current mirror circuit of the power amplifier 900 has a second terminal to the first terminal on the energization control terminal side.
The amplified current signal H1 has a small current amplification factor, and the second amplification current signal H1 has a large amplification factor.

Further, the second terminal to the second terminal on the energization control terminal side is
The auxiliary current signal H4 reduces the ON resistance of the PMOS power transistor 905. Further, the PMOS power transistor 905 and the field effect power current mirror circuit of the power amplifier 900 are turned on / off when the control pulse signal Y4 to the third terminal on the energization control terminal side is turned on / off at high frequency. High frequency switching operation. The PMOS type power transistor 905 is, for example, a double diffused P channel MOS.
PM composed of a field effect transistor having a structure
The parasitic diode element of the OS type power transistor 905 is used as the power diode 905d. Note that there is no operational problem even if the resistance 907 and / or the resistance 908 of the power amplifier 900 is zero. The second current amplifiers 845, 846, 847 in FIG. 23 generate second amplified current signals H1, H2, H3 by current-amplifying the first distributed current signals G1, G2, G3. The second amplified current signals H1, H2, H3 are respectively supplied to the second power amplifier 8
It is supplied to the first terminals of the energization control terminals 15 to 816 and 817.

FIG. 26 shows the second current amplifiers 845 and 84.
6 and 847 show specific configurations. Second current amplifier 8
Reference numeral 45 is composed of a first-stage current mirror circuit including transistors 951 and 952, and a second amplifier current mirror circuit in which the next-stage current mirror circuits including transistors 953 and 954 and resistors 955 and 956 are connected in cascade. The second current amplifier 845 performs a predetermined amplification of 50 times the current amplification factor. Similarly, the second current amplifier 846 includes transistors 961, 962, 963, 96.
4 and resistors 965 and 966, which is a second amplification unit current mirror circuit, and performs a predetermined amplification of 50 times the current amplification factor. Similarly, the second current amplifier 847 includes transistors 971, 972, 973, 974 and a resistor 97.
5, 976 and a second amplifier current mirror circuit, and performs a predetermined amplification of 50 times with a current amplification factor. This allows the second current amplifiers 845, 846, 8
47 amplifies the three-phase second distributed current signals G1, G2, and G3 by 50 times, respectively, and amplifies the three-phase amplified current signals H1 and H3.
2 and H3 are output.

The switching controller 800 of FIG. 23 turns on the first power amplifiers 611, 612, 613 or / and the second power amplifiers 815, 816, 817.
Turn off high-frequency switching operation. FIG. 24 shows an example of a specific configuration of the switching controller 800. Switching pulse circuit 330 of switching controller 800
Has the same configuration as that shown in FIG. 7 and outputs the switching control signal W1. When the setting switch circuit 840 is connected to the Ga side, the setting switch signal S
Since f is “Lb”, the output of the AND circuit 830 becomes “Lb” and the control transistors 835, 836, 8
37 turns off. Therefore, the control pulse signals Y4, Y
5 and Y6 are turned off. Further, in response to the switching control signal W1, the control transistors 831, 832, 8
33 is turned on / off, and control pulse signals Y1, Y2,
Y3 is output on / off. As a result, the first power amplifier 61 responds to the control pulse signals Y1, Y2, Y3.
The first NMOS power transistors 1, 612 and 613 perform high frequency switching operation of on / off. Since the control pulse signals Y4, Y5, Y6 are off, the second power amplifiers 815, 816, 817 are the second power amplifiers.
The energization is distributed and controlled in response to the second amplified current signals H1, H2, and H3 of the current amplifiers 845, 846, and 847 (the high frequency switching operation is not performed).

When the setting switch circuit 840 is connected to the Gb side, the setting switch signal Sf is "H".
b ″, the control transistors 835, 836, and 837 are turned on / off in response to the switching control signal W1. Therefore, the control transistors 831, 832, 833, and 835 are activated in response to the switching control signal W1.
836 and 837 are turned on and off, and the control pulse signal Y
1, Y2, Y3, Y4, Y5, and Y6 are output on / off. As a result, in response to the control pulse signals Y1, Y2, Y3, the first NMOS power transistors of the first power amplifiers 611, 612, 613 perform high-frequency switching operation of on / off, and the control pulse signals Y4, Y5, Y
6 in response to the second power amplifier 815, 816, 81
The second PMOS type power transistor 7 has an ON / OFF high frequency switching operation. Although the connection of the setting switch circuit 840 is fixed to either one,
It may be switched as needed.

The auxiliary supply device 810 of FIG. 23 responds to the output signal of the switching generator 34 to generate a three-phase first auxiliary current signal F.
4, F5, F6 are connected to the first power amplifiers 611, 612,
It is supplied to the energization control terminal side of 613, and in response to the output signal of the switching generator 34, three-phase second auxiliary current signals H4 and H4.
5, H6 to the second power amplifiers 815, 816, 817
Supply to the energization control terminal side of. Auxiliary feeder 81 in FIG.
A specific configuration of 0 is shown. The auxiliary switching creation unit 510 of the auxiliary feeder 810 has the same configuration as that shown in FIG. 14 or FIG. 15 described above, and detailed description thereof will be omitted. The auxiliary current switching unit 850 includes three first current sources 871, 872, 87.
It has three and three second current sources 875, 876, 877 and three first switch circuits 881, 882, 883 and three second switch circuits 885, 886, 887. The first current sources 871, 872, 873 are the DC power supply 5
The second current sources 875, 876, 877 are connected in the direction in which they flow out from the positive electrode terminal side of 0, and the second current sources 875, 876, 877 are connected in the direction in which they flow into the negative electrode terminal side of the DC power supply 50.

First switch circuits 881, 882, 88
3 is the auxiliary switching signals J4, J of the auxiliary switching creating section 510.
When 5 and J6 become "Hb", the switch is turned on and the first
The currents of the current sources 871, 872, 873 are output as three-phase first auxiliary current signals F4, F5, F6. The second switch circuits 885, 886, 887 turn on the switches when the auxiliary switching signals J7, J8, J9 of the auxiliary switching generator 510 become "Hb", and the second current sources 875, 87.
The currents of 6, 877 are applied to the three-phase second auxiliary current signals H4, H
5, and output as H6. First auxiliary current signals F4, F
5, F6 and the first amplified current signals F1, F2, F3 have the same waveform relationship as that shown in FIGS. 17 (a) to (c), (g). In addition, the second auxiliary current signals H4, H
5, H6 and the second amplified current signals H1, H2, H3 have the same waveform relationship as shown in FIGS. 17 (d) to (f) and (h).

Other configurations and operations are the same as those in the first embodiment.
The second embodiment, the third embodiment, and the fourth embodiment are the same as those described above, and detailed description thereof will be omitted. In this embodiment, since the first NMOS type power transistor of the first power amplifier is turned on / off at high frequency switching operation, the power loss of the first power amplifier is small. Further, since the second PMOS type power transistor of the second power amplifier is operated in a full-on operation or a high-frequency switching operation of on / off, the power loss of the second power amplifier is small. Therefore, the motor has high power efficiency. Further, the first amplified current signal and the second amplified current signal are changed in response to the command signal Ad to reduce the power loss due to the input current of the first power amplifier and the second power amplifier. When only three first power amplifiers are subjected to high frequency switching operation, when only three second power amplifiers are subjected to high frequency switching operation, three first power amplifiers and three second power amplifiers are used. In the case where both the amplifiers are subjected to high frequency switching operation, the high frequency switching operation of the three first power amplifiers and the high frequency switching operation of the three second power amplifiers are appropriately switched, and various switching operations are performed. There is a way to do it. These are design items, and detailed description thereof will be omitted.

Further, in this embodiment, the first NMOS power transistor is used for the first power amplifier and the second power amplifier is used for the second power amplifier.
The second PMOS type power transistor is used for the power amplifier of
The configuration for controlling the energization of the PMOS type power transistor has been greatly simplified. That is, the high voltage output device is eliminated, and the voltage source other than the DC power source 50 is unnecessary for driving and controlling the power transistor. As a result, the overall configuration is significantly simplified. Further, in this embodiment, while using the NMOS type power transistor and the PMOS type power transistor having the non-linear voltage amplification gain,
A field effect type power section current mirror circuit is configured to
The variation in the current amplification factor between the power amplifier of No. 2 and the power amplifier of No. 2 was significantly reduced. This made the switching operation of the current path smooth. Further, in the present embodiment, the first amplified current signal (first three-phase current signal) and the second amplified current signal (second three-phase current signal) are changed in response to the command signal Ad. Even when the command signal Ad changes, a smooth current path switching operation is always realized.

Further, in this embodiment, various advantages similar to those of the above-described embodiments can be obtained. Further, in the present embodiment, the first power amplifiers 611, 612 and 613 are not limited to the power amplifier 620 having the configuration shown in FIG.
Various modifications are possible. For example, the power amplifier 640 shown in FIG. 20 is replaced by the first power amplifiers 611, 61.
It can be used as 2, 613. Further, in the present embodiment, the second power amplifiers 815, 816, 817 are not limited to the power amplifier 900 having the configuration shown in FIG. 27, and various modifications are possible. FIG. 28 shows the second power amplifier 8
15 shows another configuration of power amplifier 920 that can be used for 15, 816, 817. Here, the case where the power amplifier 920 is used as the second power amplifier 815 is shown. The power amplifier 920 includes a PMOS power transistor 925 and a power diode 925d reversely connected in parallel to the PMOS power transistor 925. The current inflow terminal side of the power diode 925d is connected to the current outflow terminal side of the PMOS type power transistor 925, and the current outflow terminal side is connected to the current inflow terminal side of the PMOS type power transistor 925.

In the power amplifier 920, a field effect type power section current mirror circuit is formed by a PMOS type power transistor 925 and a PMOS type transistor 926 (cell area ratio is 100 times). The first terminal on the energization control terminal side of the power amplifier 920 is a PMOS transistor 9
26 is connected to one terminal side of the current path terminal pair, and the PMO
A resistor 927 is connected between the other terminal side of the current path terminal pair of the S-type transistor 926 and one terminal side of the current path terminal pair of the PMOS type power transistor 925, and the first terminal and the second terminal on the conduction control terminal side are connected. A resistor 928 is connected between the terminals, and the third terminal on the energization control terminal side is connected to the control terminal of the PMOS power transistor 925. As a result, the field effect type power unit current mirror circuit of the power amplifier 920 performs a considerably large current amplification operation even when the second amplified current signal H1 to the first terminal on the energization control terminal side is small.

Further, the second terminal to the second terminal on the energization control terminal side is
The auxiliary current signal H4 reduces the power loss due to the on-resistance of the PMOS power transistor 925.
Further, the PMOS type power transistor 925 and the field effect type power part current mirror circuit of the power amplifier 920 are turned on / off when the control pulse signal Y4 to the third terminal on the energization control terminal side is turned on / off. High frequency switching operation. The PMOS power transistor 925 is formed of, for example, a field effect transistor having a double diffused P-channel MOS structure, and the parasitic diode element of the PMOS power transistor 925 is used as the power diode 925d. Note that there is no operational problem even if the resistance 927 and / or the resistance 928 of the power amplifier 920 is zero.

Sixth Embodiment FIG. 29 and FIG. 30 show a motor according to a sixth embodiment of the present invention. FIG. 29 shows the overall configuration. In the present embodiment, the off-operation unit 1000 is further provided in the third embodiment described above. In other configurations,
The same components as those in the above-described first, second, third, fourth, or fifth embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 29, the first power amplifier 61
1 is a first current amplifier 4 at the first terminal on the energization control terminal side.
No. 1 first amplified current signal F1 is input, the first auxiliary current signal F4 of the auxiliary supply device 500 is input to the second terminal on the energization control terminal side, and the switching controller is supplied to the third terminal on the energization control terminal side. The control pulse signal Y1 of 22 is input. Similarly, in the first power amplifier 612, the first amplified current signal F2 of the first current amplifier 42 is input to the first terminal on the energization control terminal side, and the auxiliary supply device is input to the second terminal on the energization control terminal side. The first auxiliary current signal F5 of 500 is input,
The control pulse signal Y2 of the switching controller 22 is input to the third terminal on the energization control terminal side. Similarly, in the first power amplifier 613, the first amplified current signal F3 of the first current amplifier 43 is input to the first terminal on the energization control terminal side, and the auxiliary supply device is input to the second terminal on the energization control terminal side. The first auxiliary current signal F6 of 500 is input, and the control pulse signal Y3 of the switching controller 22 is supplied to the third terminal on the energization control terminal side.
Has been entered.

In the second power amplifier 615, the second amplified current signal H1 of the second current amplifier 45 is input to the first terminal on the energization control terminal side and the second terminal on the energization control terminal side is supplemented. The second auxiliary current signal H4 of the supplier 500 is input, and the off-operation unit 1000 is connected to the third terminal on the energization control terminal side.
OFF current signal Z4 is input. Similarly, in the second power amplifier 616, the second amplified current signal H2 of the second current amplifier 46 is input to the first terminal on the energization control terminal side, and the second power amplifier 616 receives the auxiliary supply device on the second terminal on the energization control terminal side. The second auxiliary current signal H5 of 500 is input, and the off-current signal Z5 of the off-operation unit 1000 is input to the third terminal on the energization control terminal side. Similarly, the second power amplifier 617 has the second terminal of the second current amplifier 47 connected to the first terminal on the energization control terminal side.
The amplified current signal H3 of
The second auxiliary current signal H6 of the auxiliary supply device 500 is input to the terminal, and the OFF operation device 100 is connected to the third terminal on the energization control terminal side.
The off current signal Z6 of 0 is input.

Off-current signal Z4 of off-operation unit 1000
At least when the first power amplifier 611 is performing the high frequency switching operation in the energized state, the current is caused to flow out from the energization control terminal side of the second power amplifier 615 of the same phase, and the second power amplifier 615 is turned on. Turn off. When the second power amplifier 615 is in the energized state, the off-current signal Z4 is in a non-signal state (zero current), and the second power amplifier 615 is energized in response to the input current to the energization control terminal side. Controlled. Similarly, the off-current signal Z5 of the off-operation unit 1000 is the same as that of the second power amplifier 61 of the same phase when at least the first power amplifier 612 is performing the high frequency switching operation in the energized state.
A current is caused to flow out from the energization control terminal side of No. 6 to turn off the second power amplifier 616.

When the second power amplifier 616 is in the energized state, the off-current signal Z5 is in the non-signal state (zero current), and the second power amplifier 616 responds to the input current to the energization control terminal side. Then, energization is controlled. Similarly,
The off-current signal Z6 of the off-operation unit 1000 causes a current to flow from the energization control terminal side of the second power amplifier 617 in the same phase when at least the first power amplifier 613 is performing the high-frequency switching operation in the energized state. Let the second
The power amplifier 617 is turned off. Further, when the second power amplifier 617 is in the energized state, the off-current signal Z6 is in a non-signal state (zero current), and the second power amplifier 617 is energized in response to the input current to the energization control terminal side. Controlled.

FIG. 30 shows a specific structure of the off-operation unit 1000. Comparator 1010 of off-operation unit 1000
Compares the output signal Ja1 of the switching generator 34 with a predetermined voltage and, in response to the comparison result, the field effect transistor 1
012 is turned on and off. As a result, the off-current signal Z
4 is output, and the second power amplifier 615 is surely turned off. Similarly, the comparator 1020 compares the output signal Jb1 of the switching generator 34 with a predetermined voltage, and turns on / off the field effect transistor 1022 in response to the comparison result. As a result, the off-current signal Z5 is output,
The second power amplifier 616 is surely turned off. Similarly, the comparator 1030 compares the output signal Jc1 of the switching generator 34 with a predetermined voltage, and turns on / off the field effect transistor 1032 in response to the comparison result. As a result, the off current signal Z6 is output, and the second power amplifier 617 is surely turned off.

Other configurations and operations are the same as those of the above-described third embodiment, second embodiment or first embodiment, and detailed description thereof will be omitted. In this embodiment, when the first power amplifier in the energized state is performing the high frequency switching operation, the second power amplifier of the same phase is turned off by the off signal of the off operation device, so that the drive voltage is Even if a high-frequency pulse voltage having a large amplitude is generated, it is possible to prevent unnecessary current conduction in the second power amplifier. In particular, when the second power amplifier is composed of the field effect type current mirror circuit of the power section, such an unnecessary current is likely to occur due to the characteristic variation of the field effect type power transistor, and it is completely turned off by the off operation device. There is a need to.

In the above-mentioned configuration, only the first power amplifier is operated for high frequency switching.
The present invention is not limited to such a case, and the first power amplifier and the second power amplifier may be subjected to high-frequency switching operation. Further, during the period in which the first amplified current signal becomes zero and the first power amplifier is in the OFF state, the first power amplifier is forcibly turned OFF by a new OFF signal from the OFF operator. Is also good. Also, in this embodiment, various advantages similar to those of the above-described embodiments can be obtained.

Various modifications can be made to the specific configurations of the above-described embodiments. For example, each phase coil may be configured by connecting a plurality of partial coils in series or in parallel. The three-phase coil is not limited to star connection but may be delta connection. Further, generally, a multi-phase motor can be constructed. Further, the field part of the moving body is not limited to that shown in the figure. In general, the magnetic field part can have a multi-pole structure. Further, the field magnet portion configured to supply the magnetic flux that changes with the moving operation of the moving body to the coil can be easily used, and various known configurations are possible. further,
It is not limited to the configuration of the moving body or the magnetic field section. Needless to say, a brushless motor, a permanent magnet field type stepping motor, a reluctance type stepping motor, a hybrid type stepping motor, and various other motors can be configured based on the present invention and are included in the present invention. Furthermore, the moving body is not limited to rotational movement, and may move straight ahead. Moreover, the switching controller, the current detector, the distribution generator, the first current amplifier, the second current amplifier, and the like are not limited to the above-described configurations.
Further, all or some of the functions of the switching controller and other required functions may be digitally executed by the microprocessor.

The distribution generator 36 is not limited to the above-mentioned configuration. FIG. 31 shows a distribution creator 1 having another configuration.
136 is shown. This will be described. Distribution creator 11
36 is a first distributor 1137 and a second distributor 1138.
It is configured to include. The first distributor 1137 distributes the first supply current signal C1 of the current supplier 30 in response to the three-phase switching current signals D1, D2, D3 of the switching generator 34, and the three-phase smoothly changing. The first distribution current signal E of
Create 1, E2, E3. The second distributor 1138 is
Three-phase switching current signals D1, D2, D3 of the switching generator 34
In response to the current, the second supply current signal C2 of the current supply unit 30 is distributed, and the three-phase second distribution current signal G that smoothly changes is distributed.
Create 1, G2, G3.

The first distributor 1137 includes three first input transistors 1201, 1202, 1203 and three first distributor transistors 1205, 1206, 1207.
It is composed by. The energization control terminals of the respective first input transistors 1201, 1202, 1203 and the signal input terminals of the current path terminal pairs are supplied with the three-phase switching current signals D1, D2, D3 of the switching generator 34, respectively. It is connected to the outflow terminal side. The signal output terminals of the current path terminal pairs of the first input transistors 1201, 1202, 1203 are commonly connected. The current signal input terminal sides of the first distribution transistors 1205, 1206, 1207 are commonly connected, and the current supply unit 3 is connected to the common connection terminal side.
The first supply current signal C1 of 0 is input. The first distribution transistors 1205, 1206, and 1207 have three-phase switching current signals D1 and D2 on their respective energization control terminal sides.
D3 is connected to the current inflow / outflow terminal side to which each is supplied.

As a result, the three first distribution transistors 1205, 1206, 1207 have three-phase first distribution current signals E1, E2, E3 from the current signal output terminal side.
Is output. In addition, the first input transistor 1201,
1202, 1203 and the first distribution transistor 120
5, 1206 and 1207 use the same type of transistors. Here, the first input transistor 120
1, 1202, 1203 and the first distribution transistor 12
05, 1206 and 1207 use PNP type bipolar transistors. The energization control terminal of the first input transistor is the base terminal, the signal input terminal of the current path terminal pair is the collector terminal, and the signal output terminal of the current path terminal pair is the emitter terminal. The energization control terminal of the first distribution transistor is the base terminal, the current signal input terminal is the emitter terminal, and the current signal output terminal is the collector terminal.

The second distributor 1138 has three second input transistors 1211, 1212, 1213 and three second distributor transistors 1215, 1216, 1217.
It is composed by. The energization control terminals and the signal input terminals of the current path terminal pairs of the respective second input transistors 1211, 1212, 1213 are current inflows to which the three-phase switching current signals D1, D2, D3 of the switching generator 34 are supplied, respectively. It is connected to the outflow terminal side. The signal output terminals of the current path terminal pairs of the second input transistors 1211, 1212, 1213 are commonly connected. The current signal input terminal sides of the second distribution transistors 1215, 1216, 1217 are commonly connected, and the current supply device 3 is connected to the common connection terminal side.
The second supply current signal C2 of 0 is input. The second distribution transistors 1215, 1216, and 1217 have three-phase switching current signals D1, D2, on their respective energization control terminal sides.
D3 is connected to the current inflow / outflow terminal side to which each is supplied.

As a result, the three second distribution transistors 1215, 1216, 1217 have three-phase second distribution current signals G1, G2, G3 from the current signal output terminal side thereof.
Is output. In addition, the second input transistor 1211,
1212 and 1213 and the second distribution transistor 121
5, 1216 and 1217 use transistors of the same type. Furthermore, the first input transistor 1201,
The transistor types of 1202 and 1203 are different in polarity from the transistor types of the second input transistors 1211, 1212 and 1213. Here, the second input transistors 1211, 1212, 1213 and the second distribution transistors 1215, 1216, 1217.
An NPN type bipolar transistor is used for. The energization control terminal of the second input transistor is the base terminal, the signal input terminal of the current path terminal pair is the collector terminal, and the signal output terminal of the current path terminal pair is the emitter terminal. The energization control terminal of the second distribution transistor is the base terminal, the current signal input terminal is the emitter terminal, and the current signal output terminal is the collector terminal. Further, the reference voltage source 1220 and the transistors 1221 and 1222 form a predetermined voltage supply unit,
First input transistors 1201, 1202, 1203
Of the second input transistors 1211, 1212, and 1213 is supplied with the second DC voltage.

As a result, when the switching current signal D1 is a negative-side current, the first input transistor 1201 is energized and the second input transistor 1211 does not flow. When the switching current signal D1 is a positive-side current, a current is passed through the second input transistor 1211,
No current flows through the first input transistor 1201.
That is, according to the polarity of the switching current signal D1, the first input transistor 1201 and the second input transistor 121
1, a smooth current is supplied complementarily, and no current flows through the first input transistor 1201 and the second input transistor 1211 at the same time. Similarly, the switching current signal D
When 2 is a negative current, the first input transistor 1202
To the second input transistor 1212 when the current is the positive electrode side current. Similarly, when the switching current signal D3 is a negative current, the first input transistor 120
3 is supplied with a current, and the current is supplied to the second input transistor 1213 when the current is the positive electrode side current.

The first distribution transistors 1205, 1206, 1207 of the first distributor 1137 respond to the three-phase currents flowing through the first input transistors 1201, 1202, 1203 to output the first supply current signal C1. The three-phase first distribution current signals E1, E2, and E3 are generated by distributing to the respective current signal output terminals. Therefore, the three-phase first distribution current signals E1, E2, E3 are the three-phase switching current signals D.
It smoothly changes in response to the negative side currents of 1, D2 and D3, and the combined value of the distribution current signals E1, E2 and E3 becomes equal to the first supply current signal C1. Similarly, the second distributor 1
138 second distribution transistors 1215, 1216,
1217 is a second input transistor 1211, 121
In response to the three-phase currents flowing in Nos. 2 and 1213, the second supply current signal C2 is distributed to the respective current signal output terminal sides, and three-phase second distributed current signals G1, G2, G3 are produced. Therefore, the three-phase second distributed current signals G1, G2,
G3 changes smoothly in response to the positive side currents of the three-phase switching current signals D1, D2, D3, and the distribution current signals G1, G
The combined value of 2 and G3 becomes equal to the second supply current signal C2. The waveforms of the three-phase first distributed current signals E1, E2, E3 and the three-phase second distributed current signals G1, G2, G3 are shown in FIG.
It is similar to that shown in. These current signals change smoothly in the rising slope portion and the falling slope portion.

In the integrated circuit, various 1-chip integrated circuit technologies based on well-known semiconductor processes can be used. For example, there are various one-chip integrated circuit technologies in which a double diffusion MOS field effect transistor, a CMOS field effect transistor, and a bipolar transistor can be used alone or in plural kinds. The integrated circuit substrate is used by connecting it to the potential (earth potential) on the negative electrode terminal side of the DC power supply, and the junction separation technology enables high-density integrated circuits. However, an integrated circuit technology in which a transistor and a resistor are formed on one chip by using the dielectric isolation technology may be used. Since the specific transistor arrangement in one chip differs depending on the individual integrated circuit design, detailed description thereof will be omitted. Further, the power diode of the power amplifier can be formed in the integrated circuit together with the power transistor, but it may be externally attached to the integrated circuit if necessary. For example, a Schottky type power diode may be reversely connected in parallel with the power transistor. The first amplification unit current mirror circuit of the first current amplifier and the second amplification unit current mirror circuit of the second current amplifier have nonlinear current amplification characteristics such that the current amplification factor increases as the current increases. May have.

Further, the switching controller controls the switching operation of the power amplifier in response to the result of comparison between the current detection signal and the command signal, thereby realizing highly accurate current control. However, the present invention is not limited to such a configuration, and various modifications are possible. For example, the switching controller may respond to a single switching control signal to cause at least one power amplifier of the first power amplifier and the second power amplifier to perform a switching operation. Also, the first
One or both of the second power amplifier and the second power amplifier may be switched by the switching control signals of a plurality of phases. The current detector may be inserted at the positive electrode terminal side of the DC power supply. Further, the current detector is not limited to the method of directly detecting the supply current of the DC power supply, and various known methods can be applied. For example, a signal that responds to the current flowing through the field effect power transistor may be obtained.

Further, the auxiliary supply device is not limited to the structure for outputting the auxiliary current signal, and the auxiliary voltage signal may be supplied to the energization control terminal side of the power amplifier. The auxiliary signal of the auxiliary supply device can reduce the on-resistance of the field-effect power transistor of the power amplifier, and can reduce the power loss due to the on-resistance without disturbing the smooth switching operation of the current path. Further, the current is not limited to be supplied to the coil in both directions, but may be configured to supply current in one direction, and the current supply in both directions and the current supply in one direction may be switched appropriately. .

Further, the first power amplifier and the second power amplifier are not limited to the configurations shown in the above-mentioned embodiments, and various modifications can be made if the operation substantially in accordance with the gist of the present invention is performed. It is possible. In the above-mentioned form, as a preferable example,
Although the power amplifier having the power section current mirror circuit using the field effect type power transistor has been shown, the present invention is not limited to such a configuration. For example, IGB
T-transistor (Insulated Gate bipolar Transistor)
Alternatively, a COMFET transistor (Conductivity modu
A plated field effect transistor is a composite power transistor having a non-linear voltage amplification characteristic and is used as an on / off switching element because of its large variation in amplification characteristic. However, since the IGBT transistor is a composite field effect power transistor having a field effect transistor on the input side,
A field effect type power section current mirror circuit using a T-transistor can be configured, and a power amplifier having a current amplification characteristic can be configured using an IGBT transistor.

By supplying a current signal that smoothly changes at least at the rising slope portion and / or the falling slope portion to the energization control terminal side of such a power amplifier, the current path can be smoothly switched. Become. Therefore, although the composite field effect power transistor has many drawbacks (the ON voltage is large and the amplification gain variation is large), the present invention can be applied to a power amplifier including the composite field effect power transistor. It is also possible to obtain the various effects shown. Therefore, the field-effect power transistor of the present invention also includes an IGBT transistor or a composite field-effect transistor having a field-effect transistor on the input side. FIG. 32 shows a power amplifier 190 using a composite field effect power transistor 1910 having a field effect transistor on the input side such as an IGBT transistor.
A configuration example of 0 is shown.

In this example, the power amplifier 1900 is connected to the first
Used for the power amplifier 611. By connecting the composite field effect transistor 1910 and the field effect transistor 1911, a field effect type power section current mirror circuit is equivalently configured. As a result, the input current to the energization control terminal side of the power amplifier 1900 is current-amplified, and the drive current is output to the energizing current path of the composite field effect transistor 1910. Power diode 191
Reference numeral 0d denotes a parasitic diode that is reversely connected in parallel to the conducting current path of the composite field effect transistor 1910 in an equivalent circuit manner. In addition, the compound field effect transistor 1 when turned on
910 performs a full-on operation including the bias value of the required voltage. Note that the resistor 1912 and / or 19
13 may be zero.

FIG. 33 shows a power amplifier 19 using a composite field effect power transistor 1960 having a field effect transistor on the input side such as an IGBT transistor.
Another structural example of 50 is shown. By connecting the composite field effect transistor 1960 and the field effect transistor 1961, a field effect type power section current mirror circuit is equivalently configured. As a result, the input current to the energization control terminal side of the power amplifier 1950 is current-amplified, and the drive current is output to the energization current path of the composite field effect transistor 1960. The power diode 1960d is a parasitic diode that is reversely connected in parallel to the conduction current path of the composite field effect transistor 1960 in an equivalent circuit manner. Note that the resistance 1962 and / or 1963 may be zero.

Further, the DC power source 50 shown in the above-mentioned embodiment is used.
Can have various configurations as long as it can supply a DC voltage or a DC current. For example, a battery power supply, a SW regulator power supply, a power supply obtained by diode rectifying an AC voltage on an AC line, or the like is used. Further, by using the technique of the present invention, not only the device for driving the disk rotation but also various motor application devices can be configured. In addition, it goes without saying that various modifications can be made without changing the gist of the present invention and are included in the present invention.

[0150]

In the motor of the present invention, the power amplifier including the field effect type power transistor is turned on and off at a high frequency. This reduced the power loss and heat generation of the power amplifier. Also, the drive current to the coil is controlled in response to the command signal to reduce the pulsation of the drive current. This makes it possible to realize a high-performance motor with high power efficiency and small vibration.

[Brief description of drawings]

FIG. 1 is a diagram showing an overall configuration according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a switching generator 34 according to the first embodiment.

FIG. 3 is a circuit diagram of a current supplier 30 according to the first embodiment.

FIG. 4 is a diagram showing a configuration of a distribution generator 36 according to the first embodiment.

FIG. 5 shows first current amplifiers 41 and 4 in the first embodiment.
2 and 43 circuit diagram.

FIG. 6 shows second current amplifiers 45 and 4 in the first embodiment.
The circuit diagram of 6, 47 and the high voltage output device 51.

FIG. 7 is a circuit diagram of a switching controller 22 and a current detector 21 according to the first embodiment.

FIG. 8 is a partial cross-sectional view of the integrated circuit according to the first embodiment.

FIG. 9 is a diagram showing signal waveforms for explaining the operation of the first embodiment.

FIG. 10 is a diagram showing another configuration of the power amplifier according to the embodiment of the present invention.

FIG. 11 is a diagram showing another configuration of the power amplifier according to the embodiment of the present invention.

FIG. 12 is a diagram showing another configuration of the switching pulse circuit according to the embodiment of the invention.

FIG. 13 is a diagram showing an overall configuration according to a second embodiment of the present invention.

FIG. 14 is a circuit diagram of an auxiliary feeder 500 according to the second embodiment.

FIG. 15 is a circuit diagram of the auxiliary switching creation unit 510 according to the second embodiment.

FIG. 16 is a diagram showing a signal waveform of an auxiliary switching creation unit 510 according to the second embodiment.

FIG. 17 illustrates a first auxiliary current signal and a second auxiliary current signal according to the second embodiment.
FIG. 5 is a diagram showing signal waveforms of the auxiliary current signal, the first amplified current signal, the second amplified current signal, the first combined current signal, and the second combined current signal.

FIG. 18 is a diagram showing an overall configuration according to a third embodiment of the present invention.

FIG. 19 is a circuit diagram of a power amplifier according to the third embodiment.

FIG. 20 is a diagram showing another configuration of the power amplifier according to the embodiment of the present invention.

FIG. 21 is a diagram showing an overall configuration according to a fourth embodiment of the present invention.

FIG. 22 is a switching controller 700 according to the fourth embodiment.
Circuit diagram of.

FIG. 23 is a diagram showing an overall configuration according to a fifth embodiment of the present invention.

FIG. 24 is a switching controller 800 according to the fifth embodiment.
Circuit diagram of.

FIG. 25 is a circuit diagram of an auxiliary feeder 810 according to the fifth embodiment.

FIG. 26 is a second current amplifier 845 according to the fifth embodiment,
The circuit diagram of 846 and 847.

FIG. 27 is a circuit diagram of a second power amplifier according to the fifth embodiment.

FIG. 28 is a diagram showing another configuration of the second power amplifier according to the example of the present invention.

FIG. 29 is a diagram showing an overall configuration according to a sixth embodiment of the present invention.

FIG. 30 is a circuit diagram of an off-operation unit 1000 according to the sixth embodiment.

FIG. 31 is a diagram showing another configuration of the distribution creator according to the embodiment of the present invention.

FIG. 32 is a diagram showing another configuration of the power amplifier according to the example of the present invention.

FIG. 33 is a diagram showing another configuration of the power amplifier according to the embodiment of the present invention.

FIG. 34 is a diagram showing a configuration of a conventional motor.

[Explanation of symbols]

1 moving body 1b disk 2, 3, 4 coil 11, 12, 13, 611, 612, 613 first power amplifier 15, 16, 17, 615, 616, 617, 815,
816, 817 Second power amplifier 20 Commander 21 Current detector 22, 700, 800 Switching controller 30 Current supply 34 Switching creator 36, 1036 Distribution creator 37, 1037 First distributor 38, 1038 Second Distributor 41, 42, 43 First current amplifier 45, 46, 47, 845, 846, 847 Second current amplifier 50 DC power supply 51 High voltage output device 81, 82, 83 First combiner 85, 86 , 87 Second combiner 500, 810 Auxiliary feeder 1000 Off-actuator

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H02P 6/08 H02P 6/10

Claims (14)

(57) [Claims] 1. A moving body, a coil of a plurality of phases, a voltage supply means for supplying a DC voltage, and a current path to one output terminal side of the voltage supply means and one of the coils. Q (where Q is an integer of 3 or more) first power amplifying means each including the field effect type power transistors, and a current to the other output terminal side of the voltage supply means and one of the coils. Q second power amplifying means each including a second field effect type power transistor forming a path, a switching generating means for generating switching signals of a plurality of phases, and a first switching signal responsive to an output signal of the switching generating means. Signal of the Q-phase is generated, and the energization of each of the Q first power amplifying means is performed at an electrical angle of 36 by the signal of the first Q-phase.
First control means for controlling an angle width larger than 0 / Q degree, and a second Q-phase signal generated in response to an output signal of the switching generation means, and the second Q-phase signal is used to generate the signal. The energization of each of the Q second power amplifying means is at an electrical angle of 36.
Second control means for controlling an angular width larger than 0 / Q degrees, at least one of Q first field-effect power transistors and Q second field-effect power transistors And a switching operating means for performing a high frequency switching operation of the field effect type power transistor, wherein the switching operating means obtains a current detection signal in response to a combined supply current to the coils of the plurality of phases. Means, and the output signal of the current detection means and the command signal are compared.
Generated pulse signal, and in response to the pulse signal, Q
Switching to the same <br/> sometimes turned off at least one of Q FET power transistor among the pieces of the first FET power transistors and Q pieces of said second FET power transistor A motor including a control means. 2. The first control means outputs, as the first Q-phase signal, a first Q-phase current signal having an angular width larger than 360 / Q degrees in electrical angle. The motor according to claim 1, wherein the motor is configured to include means for supplying the power control terminals of the first power amplifying means. 3. The first control means uses, as the signal of the first Q-phase, a current amplitude in at least one of a rising slope portion and a falling slope portion.
Or a means for supplying a current signal of a first Q-phase that smoothly changes to the energization control terminal side of the Q first power amplifying means. The motor described in. Wherein said first control means, in response to the command signal is configured to include a means for changing at least a portion of said first Q-phase current signals, according to claim 2 or claim 3 The motor according to any one of 1. 5. The first field effect type power transistor is connected so as to form a current path to the negative output terminal side of the voltage supply means and one of the coils, and the switching operation means includes the Q The motor according to any one of claims 1 to 4, wherein only the first power amplifying means are operated for high frequency switching. 6. The switching operation means creates a single pulse signal in response to a comparison result between the output signal of the current detection means and the command signal, and the at least one Q signal is generated.
The motor according to any one of claims 1 to 5, which is configured to include a unit that causes a plurality of field effect power transistors to perform a high frequency switching operation in response to the single pulse signal. 7. The at least one power amplification means for performing a high frequency switching operation by the switching operation means is configured to include a means for performing a current amplification operation of an input current to the energization control terminal side. The motor according to claim 6. 8. The at least one power amplification means for performing high-frequency switching operation by the switching operation means is configured to include a field effect type power section current mirror circuit using a field effect type power transistor. The motor according to any one of claims 1 to 7. 9. A mobile unit, A three-phase coil, Voltage supply means for supplying a DC voltage, One output terminal side of the voltage supply means and the three-phase coil
Field-effect power forming a current path to one of the
Three first power amplifiers each including a transistor
Dan, The other output terminal side of the voltage supply means and the three-phase coil
Field-effect power forming a current path to one of the
Three second power amplifiers each including a transistor
Dan, A switching creation means for creating switching signals of multiple phases, The first three-phase signal in response to the output signal of the switching creating means.
Signal is generated by the first three-phase signal.
Each energization of the first power amplification means is 12 electrical degrees.
First control means for controlling an angular width larger than 0 degree, The second three-phase signal in response to the output signal of the switching creating means.
Signal is generated and the three signals are generated by the second three-phase signal.
Each of the second power amplification means is energized at an electrical angle of 12
Second control means for controlling the angle width larger than 0 degree; Three said first field effect type power transistors and three
Of the second field effect power transistor of
At least one field-effect power transistor with high frequency
Switching operation means for performing a switching operation,
A motor equipped with The switching operation means supplies the three-phase coil
Current to obtain the current detection signal in response to the combined supply current
The output signal and the command signal of the detection means and the current detection means
Create a compared pulse signal and respond to the pulse signal
And the three first field effect power transistors
Out of the three second field effect power transistors
At least one of three field-effect power transistors
By simultaneously turning off the
One of the three field effect power transistors
One or two field effect power transistors,
High frequency switching operation at the same time in response to the command signal
And a switching control means.
Ta. 10. The first control means is configured to control the first 3
Rising slope and falling slope as the phase signal
On at least one of the Current swing
The three first-phase current signals whose width changes smoothly
For supplying to the energization control terminal side of the first power amplification means of
The motor according to claim 9, wherein the motor is configured to include a step. 11. The first control means includes the command signal.
In response to the at least one of the first three-phase current signals
Includes means for changing the current amplitude in one slope.
The motor according to claim 10, wherein the motor is configured as follows. 12. The first field effect power transistor.
And a three-phase negative voltage output terminal side of the voltage supply means.
Connected to form a current path to one of the coils, The switching operation means includes the three first power sources.
The high-frequency switching operation of only the amplifying means,
The motor according to any one of claims 9 to 11. 13. The three first power amplifying means and the front
At least one of the three second power amplification means
The power amplification means of the
10. The method according to claim 9, comprising means for performing a flow amplification operation.
13. The motor according to any one of claims 12 to 13. 14. The three first power amplifying means and the front
At least one of the three second power amplification means
The power amplification means is a field effect power transistor
Including the used field effect power section current mirror circuit
A configured one of claims 9 to 13.
Motor.