JP2002119082A - Motor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To set a drive voltage to the equivalent level to one voltage of a power supply voltage and to make smooth a drive current supplied to a coil in a motor for electronically switching a current path to the coil with a plurality of phases. SOLUTION: The three-phase motor has a current detector 11 for outputting a signal responding to a conduction current that is supplied by a DC power supply 30, and three first power amplifiers 5-7 have a conduction width of P degrees that are larger than 360/Q degrees in terms of an electrical angle. A conduction control means comprises a waveform formation signal creation means for determining a conduction width of P degrees, a conduction-assisting signal creation means for outputting a conduction auxiliary signal that is outputted only at a section that is less than P degrees, and command equipment 13 for controlling the conduction of the first power amplifier in response to both of the waveform formation signal and the conduction auxiliary signal. The waveform formation signal changes an output signal level in response to the output signal of the current detector 11, and a command signal for controlling the supply of power to coils 2-4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor for supplying a current to a multi-phase coil load by electronically switching the current through a plurality of transistors.

[0002]

2. Description of the Related Art FIG. 20 shows a conventional motor, and its operation will be briefly described. The rotor 501 has a magnetic field portion made of a permanent magnet. In response to the rotation of the rotor 501, the position detector 505 outputs two sets of three-phase voltage signals L1, L2, L3 and L3.
4, L5 and L6. The first distributor 506 generates three-phase lower energization control signals UL1, UL2, and UL3 in response to the voltage signals L1, L2, and L3, and controls energization of the lower NPN power transistors 508, 509, and 510. . The second distributor 507 includes voltage signals L4, L5, L
6, the three-phase upper energization control signals UH1, UH2,
UH3 is generated to control the energization of the upper PNP power transistors 511, 512, and 513. Thus, the current paths to the three-phase coils 502, 503, and 504 are controlled to open and close.

[0003]

However, the above-described conventional configuration has the following various problems.

In the conventional configuration, in order to reduce the vibration generated by the motor, an NPN type power transistor 5 is used.
08, 509, 510 and PNP-type power transistors 511, 512, 513 control the voltage between the emitter and the collector in an analog manner, and the coils 502, 503,
A smooth drive current is supplied to 504. In order to stabilize the operation of the motor, the supply voltage to the three-phase coils 502, 503, and 504 is set so that any one of the three phases always fixes one voltage level of the DC power supply 530 during rotation of the motor. Had to be controlled.

For this reason, the upper energization control signals UH1, UH
2 and UH3 are connected to lower energization control signals UL1, UL2 and UL3.
Or lower enough than the lower energization control signal UL1,
UL2 and UL3 are set to upper-side energization control signals UH1, UH2, U
It was much larger than H3. However, since the difference between the upper energization control signals UH1, UH2, UH3 and the lower energization control signals UL1, UL2, UL3 is large, the coil 50
It is difficult to make the positive-side current and the negative-side current of the drive current supplied to 2,503,504 the same waveform, and it was not possible to obtain a smooth continuous drive current waveform.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to control the supply voltage to a plurality of phase coils so that any one of the phases is at one terminal voltage level of a DC power supply.
An object of the present invention is to provide a motor that can supply a current to a coil in a smooth and continuous waveform.

[0007]

According to the present invention, there is provided a motor having a moving body, a multi-phase coil, a DC power supply serving as a power supply source, one terminal of the DC power supply, and the coil. Q (Q is a positive number equal to or more than 3) first power amplifying means each including a first power transistor forming a current path, and a current path between the other terminal side of the DC power supply means and the coil Q second power amplifying means each including a second power transistor forming the first power amplifying means, energization controlling means for controlling energization of the first power amplifying means and the second power amplifying means, and Current detection means for outputting a signal corresponding to the supplied current to be supplied,
The Q first power amplifying units each have a conduction width of P degrees greater than 360 / Q degrees in electrical angle, and the conduction control unit determines a conduction width of P degrees. Generating means, energizing auxiliary signal generating means for outputting an energizing auxiliary signal that is output only for the section less than P degrees, and the first power amplifying means in response to both the waveform forming signal and the energizing auxiliary signal. Drive command means for controlling the energization of the power supply, and wherein the waveform forming signal changes an output signal level in response to an output signal of the current detection means and a command signal for controlling power supply to the coil. Let it.

With such a configuration, any one of the first power amplifying means is always in a full-on state by the energization auxiliary signal. Further, the level of the energization auxiliary signal hardly affects the drive current waveform. Therefore, by making the energization auxiliary signal sufficiently large, it is possible to always fix any one of the phases of the supply voltage to the Q-phase coil to one terminal voltage level of the DC power supply means. Can be made into a smooth continuous waveform by the waveform forming signal. As a result, the pulsation of the drive current accompanying the switching of the current path is significantly reduced, and a high-performance motor with small vibration can be realized.

Other configurations and operations will be described in detail in the embodiments.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a preferred embodiment of a motor according to the present invention will be described with reference to the accompanying drawings.

(Embodiment 1) A motor according to Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 1 is a circuit configuration diagram showing the overall configuration of the motor according to the first embodiment. The moving body 1 is, for example, a rotor to which a magnetic field portion that generates a plurality of magnetic field fluxes by a magnetic flux generated by a permanent magnet is attached. The three-phase coils 2, 3, 4 are arranged on a stator, which is a fixed body, and are arranged so as to be shifted by an electrical angle of 120 degrees relative to the moving body 1. The three-phase coils 2, 3, and 4 are driven by three-phase drive currents I1, I
2 and I3, generate a three-phase magnetic flux, generate a driving force by interaction with the moving body 1, and give the driving force to the moving body 1.

A DC power supply 30 as a power supply source has a negative terminal (-) at a ground potential and supplies a required DC voltage Vcc to a positive terminal (+). The drive current outflow terminals of the three first power amplifiers 5, 6, and 7 are commonly connected to the negative terminal side of the DC power supply 30 via the current detector 11, and the drive current inflow of the first power amplifier is performed. The terminal side is connected to the power supply terminal side of the coils 2, 3, and 4, respectively. The drive current inflow terminals of the three second power amplifiers 8, 9, and 10 are commonly connected to the positive terminal of the DC power supply 30, and the drive current outflow terminals of the second power amplifier are connected to the coils 2, 3 respectively. , 4 are connected to the power supply terminals.

FIG. 2 shows the configuration of the first power amplifiers 5, 6, 7 and the second power amplifiers 8, 9, 10. The first power amplifier 5 includes a first NMOS power transistor 101 and a first NMOS power transistor 101.
Power diode 101d and NM reversely connected to
A power section current mirror circuit is constituted by the OS type transistor 102. The chip area ratio between the first NMOS power transistor 101 and the NMOS transistor 102 is 200 times. The first power amplifier 5 amplifies the input signal P1, which is a current signal, by a factor of 200 and supplies a negative current of the drive current I1.

Similarly, the first power amplifier 6 includes a first NMOS type power transistor 105 and a first NMO
A first power diode 106d reversely connected to the S-type power transistor 105 and the NMOS-type transistor 10
6 together form a power section current mirror circuit. The first power amplifier 6 converts the input signal P2, which is a current signal, to 2
The current is amplified by a factor of 00 to supply the negative current of the drive current I2. Similarly, the first power amplifier 7 has a first NMO
The S-type power transistor 109, the first power diode 109d reversely connected to the first NMOS type power transistor 109, and the NMOS type transistor 110 constitute a power section current mirror circuit. The first power amplifier 7 current-amplifies the input signal P3, which is a current signal, by 200 times and supplies a negative current of the drive current I3.

The second power amplifier 8 includes a second NMOS
A power section current mirror circuit is constituted by the power transistor 113, the second power diode 113d reversely connected to the second NMOS power transistor 113, the NMOS transistor 114, and the resistor 115.
Second NMOS power transistor 113 and NMOS
The chip area ratio of the type transistor 114 is 200 times. The second power amplifier 8 current-amplifies the input signal Q1, which is a current signal, and supplies the negative current of the drive current I1.

Similarly, the second power amplifier 9 includes a second NMOS power transistor 117 and a second NMO
The second power diode 117d reversely connected to the S-type power transistor 117 and the NMOS-type transistor 11
8 and a resistor 119 constitute a power section current mirror circuit. The second power amplifier 9 current-amplifies the input signal Q2, which is a current signal, and supplies the negative current of the drive current I2. Similarly, the second power amplifier 10 has a second NM
The OS power transistor 121, the second power diode 117d reversely connected to the second NMOS power transistor 121, the NMOS transistor 118, and the resistor 119 constitute a power section current mirror circuit. The second power amplifier 9 receives an input signal Q which is a current signal.
2 is amplified to supply the negative current of the drive current I2. The current amplification operation of the second power amplifiers 8, 9, and 10 will be described later.

As described above, the first power amplifiers 5, 6,
7 is connected in parallel to the negative terminal side of the DC power supply 30 and the respective power supply terminals of the coils 2, 3, 4, and electrically connects a current path from the negative terminal side of the DC power supply 30 to the coils 2, 3, 4. Has been switched to. Similarly, the second power amplifying means 8, 9,
Reference numeral 10 denotes a positive electrode terminal side of the DC power supply 30 and coils 2, 3, and 4.
DC power supply 30 connected in parallel to each power supply terminal
The current paths from the positive terminal side to the coils 2, 3, and 4 are electronically switched.

Referring to FIG. 3, the second power amplifier 8,
The current amplification operations 9 and 10 will be described. FIG. 3A shows a power section current mirror circuit of the second power amplifier 8. The power section current mirror circuit includes a resistor 115, an input transistor 114, and a power transistor 113. The chip area ratio between the power transistor 113 and the input transistor 114 is 200 times. The power section current mirror amplifies the input current Ic1 to obtain a current Ic1.
c2 is output.

FIG. 3B is a graph showing the current amplification characteristics of the power section current mirror circuit of the power amplifier 8. The horizontal axis of the graph is the input current Ic1, and the vertical axis is the output current Ic2.
Is shown. In a range in which both transistors 113 and 114 operate in the active region (region A), transistor 113
And a current amplification operation 200 times as large as the chip area ratio of the transistor 114. As the input current Ic1 increases, the potential difference between both ends of the resistor 115 increases, and the transistor 1
14 operates in the saturation region (region B). In region B, the current amplification operation becomes non-linear, and the current amplification factor is 20
It becomes 0 or more. The operation of the second power amplifiers 9 and 10 is the same.

The command signal Ad from the command device 13 shown in FIG. The command device 13 is constituted by, for example, a speed control circuit that detects the rotational movement speed of the moving body 1 and controls the speed to the initial position.

The current supplier 12 outputs a command signal Ad and a first supply current signal C1 and a second supply current signal C2 responsive to the current detection signal Ag from the position detector 11.
FIG. 4 shows the configuration of the position detector 11 and the current supplier 12.

The current detector 11 is constituted by a current detecting resistor 140 inserted in a current supply path on the negative side of the DC power supply 30, and detects a conduction current Ig supplied by the DC power supply 30 by a voltage drop generated in the resistor 140. And conducting current Ig
In response to the current detection signal Ag.

In the operational amplifier 141 of the current supplier 12, a command signal Ad is input to a non-inverting input terminal, and a current detection signal Ag is input to an inverting terminal. The voltage-current conversion converter 142 outputs a converted current signal Bj proportional to the output voltage of the operational amplifier 141. The converted current signal Bj is supplied to a current mirror circuit including the transistors 143, 144, and 145, and generates a current signal proportional to the converted current signal Bj on the collector side of the transistors 144 and 145. The collector current of the transistor 145 is output as a first supply current signal C2 (a negative current signal).
The collector current of transistor 144 is
The current is supplied to a current mirror circuit composed of 46 and 147, and the collector current of the transistor 147 is output as a second supply current signal C1 (a positive current signal).

The first supply current signal C1 is supplied to the distribution generator 15 shown in FIG. 1, and the first distribution current signals E1, E2, E
It is distributed to three. First distribution current signals E1, E2, E3
Is amplified by the first current amplifiers 24, 25, 26 by a predetermined factor, and further amplified by the first power amplifiers 5, 6, 7
The current is amplified by a factor of 00 and supplied to the coils 2, 3, and 4 as the negative side current of the drive currents I1, I2, and I3. As described above, when the first supply current signal C1 increases, the negative currents of the drive currents I1, I2, and I3 increase, and when the current value of the first supply current signal C1 decreases, the drive currents I1 and I3 decrease. I
2, the negative electrode side current of I3 decreases.

Here, as shown in FIG. 4, the operational amplifier 141 of the current supplier 12 has the command signal Ad input to the non-inverting input terminal and the current detection signal Ag input to the inverting terminal. That is, if the current detection signal is larger than the command signal Ad, the output voltage of the operational amplifier 141 decreases,
The current value of the first supply current signal C1 decreases, and the drive current I
The current values on the negative electrode side of 1, I2 and I3 also decrease. If the current detection signal is smaller than the command signal Ad, the operational amplifier 14
1 increases, the current value of the first supply current signal C1 increases, and as a result, the current values on the negative side of the drive currents I1, I2, I3 also increase.

By the negative feedback operation as described above, the total current on the negative side of the drive currents I1, I2 and I3 is changed to the command signal Ad.
Is controlled to a value in response to. According to the configuration of the coil of the present embodiment, the sum of the negative-side currents and the sum of the positive-side currents of the drive currents I1, I2, and I3 are the same.
Similarly, the sum of the positive electrode side currents of I2 and I3 is the command signal Ad.
Is controlled to a value in response to.

The switching generator 14 shown in FIG. 1 is a three-phase switching signal D1, D2, D3 having a sine wave shape that changes smoothly.
And three-phase position detection signals Ja1, Jb1, and Jc1. FIG. 5 shows the configuration of the switching creator 14. The switching generator 14 includes a position detection unit 160 and a switching signal unit 1
61.

The position detecting section 160 includes position detecting elements 162, 163, and 164, each of which is a magneto-electric conversion element (for example, a Hall element) for detecting a magnetic flux generated by the moving body 1. Each of the position detection elements 162, 163, and 164 has a phase difference of 120 degrees in electrical angle. The position detection elements 162, 163, and 164 respectively output two-phase position detection signals Ja1 and Ja2, Jb1 and Jb2, and Jc1 and Jc2 that change in a smooth sinusoidal shape with the movement of the moving body 1. Here, Ja1 and Ja2 are in an opposite phase relationship (a phase difference of 180 degrees in electrical angle). Similarly, Jb1 and Jb
2. Jc1 and Jc2 are in opposite phases. It should be noted that the signal of the opposite phase is not counted in the new phase number. Position detection signals Ja1, J
The waveforms of b1 and Jc1 are shown in FIG.

The switching signal unit 161 generates sinusoidal three-phase switching signals D1, D2, and D3 that smoothly change in response to the three-phase position detection signals. Constant current source 16
6, 167, 168, 169, 170, 171 supply the same value of constant current. The transistors 172 and 173 are 1
In response to the potential difference between the phase position detection signals Ja1 and Ja2, the current of the constant current source 166 is diverted to the collector. The collector current of transistor 173 is
179 is supplied to the current mirror circuit. From the collector of the transistor 179, the transistor 173
Is output twice the collector current of the constant current source 16
7, and the difference current between the two is output as the first-phase switching signal D1.

Accordingly, the switching signal D1 smoothly changes in response to the position detection signal Ja1, and a current flows out in a 180-degree electrical angle section (positive current), and a current flows in a next 180-degree section. (Negative current). Similarly, the switching signal D2 of the second phase changes smoothly in response to the position detection signal Jb1, and a current flows out in a 180-degree electrical angle section (positive current), and a current flows in the next 180-degree section. Flows in (negative current). The switching signal D3 of the third phase changes smoothly in response to the position detection signal Jc1, and changes by 1 electrical angle.
In the 80-degree section, current flows out (positive current), and the next 18
In the 0-degree section, a current flows (a negative current). FIG. 7A shows the waveforms of the switching signals D1, D2, and D3.

The distribution creator 15 shown in FIG.
6 and the second distributor 17. The first distributor 16 receives the three-phase switching signal D of the switching generator 15.
The first supply current signal C1 of the current supply 12 is distributed in response to the first, first, and second supply current signals E1, E2, and E3. The second distributor 17 receives the three-phase switching signal D of the switching generator 15.
The second supply current signal C2 of the current supply 12 is distributed in response to 1, D2, and D3 to generate smoothly distributed three-phase second distribution current signals G1, G2, and G3. A first distribution current signal E1, E2, E3 and a second distribution current signal G1,
G2 and G3 are drive currents I1 and I1 for the coils 2, 3 and 4,
2 and I3. The drive current waveform will be described later.

FIG. 8 shows the configuration of the distribution creator 15. First
Of the three-phase switching signal D1, D2, D3
Are supplied with a current control terminal and a current outflow terminal on the side of the current inflow and outflow terminals, respectively, and the three first input transistors 203, 204 and 205 to which the current inflow terminals are commonly connected.
The current supply control terminals are connected to the current outflow terminals to which the switching signals D1, D2, and D3 are supplied, and the first supply current signal C1 (positive current signal) is connected to the commonly connected current inflow terminals. Is input, and the three-phase first
Distribution current signals E1, E2, E3 (current signals of positive polarity)
Of the first distribution transistors 212 and 21
3,214. The first input transistors 203, 204, 205 and the first distribution transistors 212, 213, 214 use the same type of PNP bipolar transistor.

Similarly, the second distributor 17 has a current control terminal and a current inflow terminal connected to the current inflow and outflow terminals to which the three-phase switching signals D1, D2, and D3 are supplied, and a current outflow terminal. Three commonly connected second input transistors 200, 201, 202 and switching signals D1, D
2, a current supply control terminal is connected to each current outflow terminal side to which D3 is supplied, and a second supply current signal C2 (a negative current signal) is input to a commonly connected current outflow terminal side, and current inflow is performed. From the terminal side, three-phase second distributed current signals G1, G
2, three second distribution transistors 209, 210 and 211 for outputting G3 (a current signal of negative polarity). Also, the second input transistors 200, 20
1, 202 and the second distribution transistors 209, 210,
211 uses the same type of NPN bipolar transistor.

Reference power supply 208, transistors 206 and 2
Reference numeral 07 forms a predetermined voltage supply unit, and supplies a DC voltage to the common connection terminals of the first input transistors 203, 204, 205 and the common connection terminals of the second input transistors 200, 201, 202.

Thus, when the switching signal D1 is a positive current, a current flows through the second input transistor 200 (current does not flow through the first input transistor 203), and when the switching signal D1 is a negative current, the first input transistor 203 flows. Input transistor 2
03 (the second input transistor 200
Current does not flow through). That is, a current is supplied complementarily to the first input transistor 203 and the second input transistor 200 according to the polarity of the switching signal D1. As a result, current does not flow through the first input transistor 203 and the second input transistor 200 at the same time. Similarly, when the switching signal D2 has a positive polarity current, a current flows through the second input transistor 201, and when the switching signal D2 has a negative polarity current, a current flows through the first input transistor 204.
When the switching signal D3 has a positive current, a current flows through the second input transistor 202, and when the switching signal D3 has a negative current, a current flows through the first input transistor 205.

The first distribution transistors 212, 213 and 214 of the first distributor 16 are connected to the first input transistor 2
In response to the three-phase currents flowing through the current supply terminals 03, 204, and 205, the first supply current signal C1 (current signal of positive polarity) is distributed to the respective current outflow terminals, and the three-phase first distribution current signal E1 , E2, E3 (positive current signals). Therefore, the three-phase first distribution current signals E1, E2, E3 are 3
In response to the negative polarity currents of the phase switching signals D1, D2, and D3, the voltage changes smoothly, and the three-phase first distribution current signals E1,
The composite value of E2 and E3 is equal to the first supply current signal C1. FIG. 7B shows first distribution current signals E1, E2,
The waveform of E3 is shown. The first distributor 16 alternately distributes the first supply current signal C1 into one phase or two phases according to the movement of the moving body 1, and outputs the three-phase first signals having a phase difference of 120 ° in electrical angle. It outputs distribution current signals E1, E2, E3.

Similarly, the second distribution transistors 209, 210, and 211 of the second distributor 17 respond to the three-phase current flowing through the second input transistors 200, 201, and 202 to generate the second supply current signal. C2 (negative current signal) is distributed to the respective current inflow terminals to generate three-phase second distributed current signals G1, G2, G3 (negative current signal). Therefore, the three-phase second distribution current signals G1, G2,
G3 changes smoothly in response to the positive polarity currents of the three-phase switching signals D1, D2, D3, and the composite value of the three-phase second distribution current signals G1, G2, G3 is the second supply current signal C2.
Is equal to FIG. 7C shows the second distribution current signal G
1 shows waveforms of G1, G2, and G3. The second distributor 17 is
Are distributed alternately in one or two phases in accordance with the movement of the moving body 1, and the three-phase second distributed current signals G1, G2, G3 having a phase difference of 120 ° in electrical angle.
Is output.

The energization assist timing generator 18 outputs the three-phase position detection signals Ja1, Jb1, J of the switching generator 14.
c1 is input to generate energization auxiliary timing signals K1, K2, and K3 that provide timing for supplying the energization auxiliary signal. FIG. 9 shows the configuration of the energization assist timing generator 18. The three-phase position detection signals Ja1, Jb1, Jc1 are input to comparators 240, 241, 242. The comparators 240, 241, 242 have two input terminals,
Two phases of the three-phase position detection signals Ja1, Jb1, and Jc1 are input, and the respective comparison results are input to the logic unit 243. The logic unit 243 outputs three-phase energization auxiliary timing signals K1, K2, and K from the output signal of the comparator.
Produce 3.

FIG. 6B shows an energization auxiliary timing signal K
1 shows waveforms of K1, K2, and K3. As described above, the energization assisting timing signal K1 is a digital signal which becomes H level when the position detection signal Ja1 becomes larger than the other position detection signals Jb1 and Jc1. Similarly, the power-supply auxiliary timing signal K2 is a digital signal which becomes H level when the position detection signal Jb1 becomes larger than other position detection signals. The energization assist timing signal K3 is a digital signal which becomes H level when the position detection signal Jc1 becomes larger than other position detection signals. Energization auxiliary timing signals K1, K2, K
Reference numeral 3 denotes an H-level section in which the electrical angle is 120 °, and is a three-phase signal having a phase difference of 120 °.

The energizing auxiliary current supplier 19 shown in FIG. 1 responds to the energizing auxiliary timing signals K1, K2, K3 output from the energizing auxiliary timing generator to generate three-phase energizing auxiliary current signals M1, M2 as current signals. , M3.

FIG. 10 shows the configuration of the current-carrying auxiliary current supplier 19. The energizing auxiliary current supplier 19 is provided with switch means 260,
261 and 262 and constant current sources 263, 264 and 265. Each of the switch means 260, 261, and 262 has two connection terminals and one connection control terminal.
When the input signal of the connection control terminal is at the H level, the two connection terminals are short-circuited, and when the input signal of the connection control terminal is at the L level, the two connection terminals are open.

One of the connection terminals of the switch means 260, 261, 262 is connected to a constant current source 263, 264, 2 respectively.
65, the common terminal is connected to the negative terminal side of the DC power supply 30.
Output terminals of M2 and M3. Switch means 260, 2
Three-phase energization auxiliary timing signals K1, K2, and K3 are input to the connection control terminals 61 and 262, respectively.

Therefore, the energization auxiliary timing signal K1 is set to H
At the time of the level, the connection terminals of the switch means 260 are short-circuited, and the current value of the constant current source 263 is output as the conduction auxiliary current signal M1 (current signal of negative polarity). When the energization assist timing signal K1 is at the L level, the switch means 2
The connection between the 60 connection terminals is open, and no current is supplied to the conduction auxiliary current signal M1.

Similarly, the energization auxiliary timing signal K2 is set to H
At the time of the level, the conduction auxiliary current signal M2 is supplied to the constant current source 264.
Current value is the conduction auxiliary current signal M2 (negative current signal)
When the energization auxiliary timing signal K2 is at L level, no current is supplied to the energization auxiliary current signal M2.

Similarly, the energization auxiliary timing signal K3 is set to H
At the time of the level, the conduction auxiliary current signal M3 is supplied to the constant current source 265.
Is the current value of the conduction auxiliary current signal M3 (current signal of negative polarity)
When the energization auxiliary timing signal K3 is at the L level, no current is supplied to the energization auxiliary current signal M3. FIG. 7D shows the energization auxiliary current signals M1, M2, M3.
3 shows the waveforms of FIG.

The energizing auxiliary current signals M1, M2, M3 of FIG.
Are supplied with the second distribution current signals G1 and G, respectively.
2 and G3 are connected at connection points 21, 22, and 23. Since the energization auxiliary current signals M1, M2, and M3 and the second distribution current signals G1, G2, and G3 are both negative-polarity current signals, they are added at the connection points 21, 22, and 23, respectively, and a three-phase combined current signal is provided. H1, H2, and H3.
That is, the connection points 21, 22, and 23 are connected to the energization auxiliary current signal M
1, M2, M3 and the second distributed current signals G1, G2, G3
Act as a synthesizer that synthesizes FIG. 7E shows the waveform of the combined current signal H1. The combined current signal H1 has a waveform obtained by adding a trapezoidal second distribution current signal G1 having a conduction section of 180 ° in electrical angle and a rectangular waveform conduction auxiliary current signal M1 having a conduction section of 120 ° in electrical angle. Become. The combined current signals H2 and H3 also have similar waveforms shifted by 120 degrees in electrical angle.

FIG. 11A shows the first distribution current signal E
1 shows waveforms of E1, E2, and E3 and composite current signals H1, H2, and H3. Thus, the first distribution current signals E1, E2, E
3 and the combined current signals H1, H2, H3 are 180 ° in electrical angle.
Is a three-phase signal having a current-carrying section. Further, the first distribution current signal E1 and the composite current signal H1 have a phase difference of 180 ° in electrical angle and change complementarily (one of E1 and H1 is always zero). Similarly, the first distribution current signal E2 and the composite current signal H2 have a phase difference of 180 ° in electrical angle and change complementarily. Similarly, the first distribution current signal E3 and the composite current signal H3 have a phase difference of 180 ° in electrical angle and change complementarily.

The three-phase first distribution current signals E1, E of FIG.
2, E3 are first current amplifiers 24, 25, 2 respectively.
6 is input. First current amplifiers 24, 25, 26
Are three-phase first distributed current signals E1, E2, E
3 is amplified by a predetermined factor, and the three-phase first drive command signal P is amplified.
1, P2, P3, and the first power amplifier 5,
6 and 7. Three-phase composite current signals H1, H2, H
3 is input to the second current amplifiers 27, 28 and 29, respectively. The second current amplifiers 27, 28, and 29 respectively amplify the three-phase combined current signals H1, H2, and H3 by a predetermined number of times, and three-phase second drive command signals Q1, Q2, and Q3.
And supplies it from the high-potential output device 20 to the second power amplifiers 8, 9, and 10. The high-potential output device 20 has a function of generating a potential higher than the input potential, such as a charge pump. By supplying the second drive command signals Q1, Q2, and Q3 from the high potential point Vu of the high potential output device 20, it becomes possible to saturate the second NMOS power transistor at a low operating voltage.

Next, waveforms of the driving currents I1, I2 and I3 will be described with reference to FIGS. First power amplifier 5,
As shown in FIG. 2, reference numerals 6 and 7 each include a current mirror circuit having a mirror ratio of 200.
P2 and P3 are amplified by a factor of 200 to obtain drive currents I1 and
A current on the negative electrode side of I2, I3 is supplied. The first drive command signals P1, P2, and P3 are first distributed current signals E1, E
2, E3 are amplified by the first current amplifiers 24, 25, 26 by a predetermined factor. Therefore, the driving current I
The currents on the negative side of 1, 1, 2 and I3 are obtained by amplifying the first distribution current signals E1, E2 and E3 by a predetermined number of times.
As shown in FIG. 11B, the driving current waveforms on the negative side of the driving currents I1, I2 and I3 are trapezoidal. As previously mentioned,
The drive current I 1,
The sum of I2 and I3 is controlled to a value responsive to the command signal Ad. In the example of FIG. 11, the sum of the drive currents I1, I2, and I3 is controlled to the current value Is. Therefore, the driving current I
The currents on the negative electrode side of I1, I2 and I3 have a trapezoidal waveform whose maximum current value is Is.

The second power amplifiers 8, 9 and 10 amplify the second drive command signals Q1, Q2 and Q3 by a predetermined number of times and supply the positive side currents of the drive currents I1, I2 and I3. The second drive command signals Q1, Q2, Q3 are combined current signals H
1, H2 and H3 are amplified by the second current amplifiers 27, 28 and 29 by a predetermined number of times, and have waveforms similar to the composite current signals H1, H2 and H3. Here, FIG.
Drive currents I1, I2, T1
The positive electrode side current waveform of I3 will be described. In the sections T1 and T2, the power amplifiers 8, 9, and 10 of the second power amplifiers 8, 9, and 10
9 is a section where the selective energization is performed, and the section T3 is the second section.
Of the power amplifiers 9 among the power amplifiers 8, 9, and 10
Only the phase is a section in which selective energization is performed.

The drive current waveform in the sections T1 and T2 will be described. As shown in FIG. 3A, the second power amplifiers 8, 9, and 10 are composed of current mirrors including resistors. As shown in FIG. 3B, the amplification characteristics of the second power amplifiers 8, 9, and 10 operate as a current mirror having a mirror ratio of 200 in the region A, and the second power amplifier in the region B. The second, eighth, and tenth power transistors operate in the saturation region, and perform a non-linear amplification operation with a current amplification factor of 200 times or more. In the present embodiment, in a section where the conduction auxiliary current signals M1, M2, and M3 are not added to the combined current signals H1, H2, and H3,
The operation area of the second power amplifiers 8, 9, and 10 is the area A in FIG. 3 and is designed to perform a 200-fold current mirror operation.

On the other hand, the energization auxiliary current signals M1, M2, M3
Of the composite current signal H
1, H2, H3, and the auxiliary power current signals M1, M2, M3 are added to the second power amplifiers 8, 9,.
The operation region 10 is the region B in FIG. 3, and the second power transistors of the second power amplifiers 8, 9, and 10 operate in the saturation region, and the current amplification factor is 200 times or more. Therefore, in the section T1 of FIG. 11, the second power amplifier 8 attempts to amplify the second drive command signal Q1 by 200 times to supply the positive side current of the drive current I1. The second power transistor operates in the saturation region, and attempts to supply a very large positive current of the drive current I2.

However, as described above, the drive currents I 1, I 2, I 2
The total current of No. 3 is controlled to Is. In this condition,
The second power amplifier 8 converts the second drive command signal Q1 to 20
The second power amplifier 9 performs a current amplification operation of 0 times to supply the positive current of the drive current I1. The second power amplifier 9 subtracts the current obtained by subtracting the positive current of the drive current I1 from the current value Is to the positive current of the drive current I2. Supply as current.

In the section T2, the second power amplifier 8
The second power transistor of the power amplifier 8 operates in the saturation region, and tries to supply a very large positive current of the drive current I1. The second power amplifier 9 amplifies the second drive command signal Q2 by a factor of 200 to drive current I2
To supply the positive electrode side current. Also in the section T2, since the total current of the drive currents I1, I2, and I3 is controlled to Is, the second power amplifier 9 outputs the second drive command signal Q
2 performs a current amplification operation of 200 times to supply the positive current of the drive current I2, and the second power amplifier 8 outputs the current value Is
A current obtained by subtracting the positive current of the drive current I2 from the current is supplied as the positive current of the drive current I1.

As described above, the second power amplifier 8,
Sections T1 and T in which two phases 9 and 10 are simultaneously selected
In 2, the power amplifiers of the phases to which the current-carrying auxiliary current signals M1, M2, and M3 are not added perform the current amplification operation, and supply the positive currents of the drive currents I1, I2, and I3. The power amplifier of the phase to which the current-carrying auxiliary current signals M1, M2, and M3 are added has a total current value Is of a value corresponding to the command signal Ad.
From the drive currents I1, I2, and I3 supplied by the phases to which the energization auxiliary current signals M1, M2, and M3 are not added. Therefore, the current values of the conduction auxiliary current signals M1, M2, and M3 do not affect the drive current waveform.

Furthermore, in the present embodiment, the second drive command signals Q1, Q2,
Q3 is designed to be at the same level as the first drive command signals P1, P2, P3. The mirror ratio of the second power amplifier in the linear region and the mirror ratio of the first power amplifier are also 200 times. Therefore, the sections T1 and T2
In this case, the driving currents I1, I2, and I3 have a continuous waveform, similarly to the current waveform on the negative electrode side.

In the section T3, the drive command signal Q2 input to the second power amplifier 9 is added with the conduction auxiliary current signal M2. Therefore, the second power transistor of the second power amplifier 9 operates in the saturation region, and tries to supply a very large positive current of the drive current I2. However, the total current of the drive currents I1, I2 and I3 is equal to the current value Is.
Therefore, the positive current of the drive current I2 also becomes the constant current Is. As described above, even in the section T3, the current values of the energization auxiliary current signals M1, M2, and M3 do not affect the drive current waveform.

As a result of the continuous operation, the drive currents I1, I2 and I3 have a continuous and smooth waveform as shown in FIG. As described above, the first distribution current signal E
, E2, E3 and the second distributed current signals G1, G2, G3
Functions as a waveform forming signal that determines the waveforms of the drive currents I1, I2, and I3, and the conduction auxiliary current signals M1, M2, and M3 do not affect the drive current waveform.

Next, the driving voltages of the three-phase coils 2, 3, and 4 will be described. In section S1 of FIG. 11, the combined current signal H1
Is added to the current-carrying auxiliary current signal M1. Therefore, the second power transistor of the second power amplifier 8 that is selectively energized operates in the saturation region. On the other hand, the first power transistors of the first power amplifiers 6 and 7 and the power transistors of the second power amplifiers 9 and 10 which are selectively energized operate in the active region. Energizing auxiliary current signal M
Since 1, M2 and M3 are sufficiently large, the second power transistors of the second power amplifiers 8, 9 and 10 operate in a saturation region at a sufficiently low operating voltage. In this state, the drive voltage supplied by second power amplifier 8 is at the voltage level on the positive terminal side of DC power supply 30 (the voltage obtained by subtracting the operating voltage of the power transistor from the voltage on the positive terminal side). The first power transistors of the first power amplifiers 6 and 7 and the second power transistors of the second power amplifiers 9 and 10 perform an analog operation and supply an analog voltage for supplying a predetermined drive current.

Similarly, in the section S2, the second power transistor of the second power amplifier 9 operates in the saturation region, and supplies a drive voltage having a voltage level on the positive terminal side of the positive power supply 30 of the DC power supply 30. The first power transistors of the first power amplifiers 5 and 7 and the second power transistors of the second power amplifiers 8 and 10 which are selectively energized perform an analog operation to supply a predetermined drive current. Supply analog voltage.

Similarly, in the section S3, the second power transistor of the second power amplifier 10 operates in the saturation region,
A drive voltage of a voltage level on the positive terminal side of the positive power supply 30 of the DC power supply 30 is supplied. The first power transistors and the second power transistors of the other first power amplifiers 5 and 6 which are selectively energized.
The second power transistors of the power amplifiers 8 and 9 perform an analog operation and supply an analog voltage for supplying a predetermined drive current.

As described above, the second power amplifier 8,
The drive voltages of the phases to which the 9, 9 auxiliary current signals M1, M2, M3 are supplied become the voltage level on the positive terminal side of the DC power supply 30. Here, the three-phase conduction auxiliary current signal M
Since the energizing section of 1, M2, and M3 has an electrical angle of 120 °, the energizing auxiliary current signal is always supplied to any phase of the electrical angle of 360 °. Therefore, in all the sections, the drive voltage of any one of the second power amplifiers 8, 9, and 10 always becomes the voltage level on the positive terminal side of the DC power supply 30.

As described above, the three-phase drive voltage is
, The motor operates stably. Thus, the energization auxiliary current signal M
Reference numerals 1, M2, and M3 serve to set the drive voltage of the phase to which the current-carrying auxiliary current signal is supplied to the voltage level on the positive terminal side of the DC power supply 30. Moreover, as described above, the driving current I
It does not affect the waveforms of I1, I2 and I3. In FIG. 3A, the resistor inserted in the power section current mirror functions to cause the power transistor to operate in a saturation region at a sufficiently low operation voltage even when the current-supplying current signals M1, M2, and M3 are small. . Therefore, the current values of the energization auxiliary current signals M1, M2, M3 can be reduced.

In the present embodiment, the drive voltage of the second power transistor is controlled to be the voltage level on the positive electrode side of the DC power supply 30 by the energization auxiliary timing signals K1, K2, K3. Operation becomes stable.
Further, the energization assist signals M1, M2, and M3 do not affect the drive current waveform. Therefore, a smooth and continuous drive current waveform can be realized. As a result, the pulsation of the drive current is significantly reduced, and a high-performance motor with less vibration is obtained. Further, the current-carrying auxiliary signals M1 and M2 are supplied by resistors inserted into the power section current mirror circuit of the second power transistor.
2 and M3 can be reduced. Therefore, an efficient motor is obtained.

(Embodiment 2) FIGS. 12 to 16 show a motor according to Embodiment 2 of the present invention. FIG. 12 shows the overall configuration. This embodiment is different from the first embodiment described above in that the auxiliary current supply device 19 and the signal combiners 21, 22, 22 are provided.
23, section limiter 40, potential switch generator 4
1, 42 and 43 are added. Further, the structures of the second power amplifiers 8x, 9x, and 10x are different. In other configurations, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description is omitted.

In the present embodiment, the second distribution current signal G
The limited distribution current signals Gx1, Gx2, Gx3 whose signal output sections are limited by the section limiter 40 are output to 1, G2, and G3. The first distribution current signals E1, E2, E3 and the limited distribution current signals Gx1, Gx2, Gx3 are the driving current I
Waveform forming signals for determining the waveforms of I1, I2 and I3.
The limited distribution current signals Gx1, Gx2, Gx3 are amplified by predetermined times by the second current amplifiers 27, 28, 29 to become drive command signals Qx1, Qx2, Qx3. The energizing auxiliary timing signals K1, K2, K3 output from the energizing auxiliary timing generator 18 are
1, 42, and 43, and an energization auxiliary timing signal K
Potential switch signals Ks1, K in response to 1, K2, K3
s2 and Ks3 are output. The second power amplifier 8x,
9x, 10x are the second drive command signals Qx1, Qx2, Q
x3 and the potential switch signals Ks1, Ks2, Ks3 are input.

FIG. 13 shows the configuration of the first power amplifiers 5, 6, 7 and the second power amplifiers 8x, 9x, 10x.
The first power amplifiers 5, 6, and 7 are the same as those of the first embodiment.
And the detailed description is omitted. The second power amplifier 8x has a configuration in which a resistor 116 is added to the second power amplifier 8 of the first embodiment.
One terminal of the resistor 116, the second NMOS power transistor 113 and the NMOS transistor 11
4 are commonly connected to an electric current control terminal to form a potential switch signal input terminal. One terminal of the resistor 115 and one terminal of the resistor 116 are connected in common to form a current amplification input terminal. The second drive command signal Qx1 is input to the current amplification input terminal, and the potential switch signal Ks1 is input to the potential switch signal input terminal. The operation of the second power amplifier 8x will be briefly described.

The potential switch signal Ks1 is a signal having two states, that is, an H level output from the potential switch generator 41 and a no-signal state. Potential switch generator 41, 4
Structures 2 and 43 will be described later. When the potential switch signal Ks1 is in a non-signal state, the second power amplifier 8x
Is the second power amplifier 8 in the first embodiment.
A power section current mirror circuit which is operationally equivalent to the above has the current amplification characteristic shown in FIG. 3B of the first embodiment. In the present embodiment, the second drive command signal Qx
Even if 1 is the rated maximum value, it is designed so as to fall within the range of the area A in FIG. Therefore, the second power amplifier 9x amplifies the second drive command signal Qx1 by 200 times and supplies the positive current of the drive current I1.

When the potential switch signal Ks1 is at the H level, the voltage output from the high potential point Vu is input to the conduction control terminal of the second power transistor of the second power amplifier 8x. Regardless of the signal level, the power transistor operates in a saturation region at a sufficiently low operating voltage. The resistors 123 and 124 function to limit the current value of the potential switch signal Ks1. Thus, the power amplifier 8 when the potential switch signal Ks1 is at the H level
x performs the same operation as the power amplifier 8 when the energization auxiliary current signal M1 is output in the first embodiment.

The second power amplifier 9x of FIG. 13 is the same as the second power amplifier 9 of the first embodiment except that a resistor 120
Has been added. One terminal of the resistor 120, the second NMOS power transistor 117 and the N
The conduction control terminal of the MOS transistor 118 is commonly connected to form a potential switch signal input terminal. One terminal of the resistor 119 and one terminal of the resistor 120 are connected in common to form a current amplification input terminal. The second drive command signal Qx2 is inputted to the current amplification input terminal, and the potential switch signal Ks2 is inputted to the potential switch signal input terminal.
Is entered.

Similarly, the second power amplifier 10x is connected to the second power amplifier 10 of the first embodiment by a resistor 1
24 is added. One terminal of the resistor 124 and the second NMOS power transistor 121
And the conduction control terminal of the NMOS transistor 122 are connected in common to form a potential switch signal input terminal.
One terminal of the resistor 123 and one terminal of the resistor 124 are commonly connected to form a current amplification input terminal. The second drive command signal Qx3 is input to the current amplification input terminal, and the potential switch signal Ks3 is input to the potential switch signal input terminal. Second power amplifier 9x, 1
The operation of 0x is the same as that of the second power amplifier 8x.

FIG. 14 shows the distribution creator 15 and the section limiter 40.
Is shown. The distribution creator 15 is the same as that of the first embodiment.
Since the configuration is the same as that described above, the description is omitted. Section limiter 40
Is a limited distribution current signal to which a second distribution current signal G1, G2, G3, which is an output signal from the second distributor 17, and an energization auxiliary timing signal K1, K2, K3 are input, and an output section is limited. Gx1, Gx2, and Gx3 are output.
The section limiter 40 includes switch means 215, 216, 217
It is composed of

The switch means 215 has an input connection terminal 215
a, a first output connection terminal 215b, a second output connection terminal 215c, and a connection control terminal. An energization auxiliary timing signal K1 is input to the connection control terminal. When the connection control terminal is at the H level, the input connection terminal 215a and the second output connection terminal 215c are connected. Connection control terminal is L
At the time of the level, the input connection terminal 215a and the first output connection terminal 215b are connected. Therefore, in the section where the second distribution current signal G1 is output, when the energization auxiliary timing signal K1 is at the L level, the second distribution current signal G1 is output as the limited distribution current signal Gx1, and the energization auxiliary timing signal K1 is output. At the time of the H level, the second distribution current signal G1 flows to the positive terminal side of the DC power supply 30, so that no current flows to the limited distribution current signal Gx1.

The configuration and operation of the switch means 216 and 217 are the same. When the energization auxiliary timing signal K2 is at the L level, the second distribution current signal G2 is output as the limited distribution current signal Gx2, and the energization auxiliary timing signal K2 is output. When the signal is at the H level, no current flows through the limited distribution current signal Gx2. When the energization auxiliary timing signal K3 is at the L level, the second distribution current signal G3 is output as the limited distribution current signal Gx3, and when the energization auxiliary timing signal K2 is at the H level, no current flows through the limited distribution current signal Gx3.

FIG. 15 shows limited distribution current signals Gx1 and Gx.
2 shows the relationship between Gx3 and other main signals. Like this
The limited distribution current signal Gx1 is output only during a section excluding the section in which the conduction assist timing signal K1 is at the H level (120 degrees in electrical angle) from the section in which the second distribution current signal G1 is conducted (180 degrees in electrical angle). You. Similarly, limited distribution current signal G
x2 is output only during a section obtained by excluding the section in which the conduction assisting timing signal K2 is at the H level (120 degrees in electrical angle) from the section in which the second distributed current signal G2 is supplied (180 degrees in electrical angle). The limited distribution current signal Gx3 starts from the conduction section of the second distribution current signal G3 (180 ° in electrical angle) to the section in which the conduction auxiliary timing signal K3 is at the H level (120 electrical degrees).
°) is output only during the interval.

FIG. 16 shows potential switch generators 41, 42,
43 shows the configuration of FIG. Potential switch generators 41, 42, 4
Reference numeral 3 includes switch means 400, 401, and 402. The switch means 400, 401, and 402 respectively provide energization assist timing signals K1, K2, and K to connection control terminals.
3, and one of the two connection terminals is commonly connected to a high potential point Vu. The other of the connection terminals is a signal output terminal for the potential switch signals Ks1, Ks2, and Ks3.

The switch means 400, 401, 402
When the connection control terminal is at the H level, the two connection terminals are short-circuited, and when the connection control terminal is at the L level, the two connection terminals are opened. That is, the potential switch signals Ks1, Ks2,
Ks3 is turned on (potential level equivalent to the high potential point Vu) when the energization auxiliary timing signals K1, K2, K3 are at H level, and the energization auxiliary timing signals K1, K2, K3
Is off (no signal state) when is at the L level. As described above, the potential switch signals Ks1, Ks2, Ks3 are turned on / off in response to the energization assist timing signals K1, K2, K3. The potential switch signal is input to potential switch signal input terminals of the second power amplifiers 8x, 9x, and 10x.

Next, the waveforms of the drive currents I1, I2 and I3 and the drive voltage will be described. Energization auxiliary timing signal K
When 1 is at the H level, the potential switch signal Ks1 is turned on (a potential level equivalent to the high potential point Vu), and the second power transistor 113 of the second power amplifier 8x operates in a saturation region at a sufficiently low operating voltage. I do. Accordingly, this state is the same as the operation of the second power amplifier 8 when the energizing auxiliary current signal M1 is output in the first embodiment. Further, the potential switch signal Ks is turned on when the energization auxiliary timing signal K1 is at the H level,
The energization auxiliary signal M1 in the first embodiment is output when the energization auxiliary timing signal K1 is at the H level.

As described above, when the energization auxiliary timing signal K1 is at the H level, the second power amplifier 8x of the present embodiment and the second power amplifier 8x of the first embodiment described above are used.
Performs the same operation. When the energization assist timing signal K1 is at the L level, the switch signal Ks1 is in a non-signal state, and the second power amplifier 8x is a power section current mirror circuit equivalent to the power amplifier 8 of the first embodiment described above. The current is amplified to supply a current on the positive side of the drive current I1.

As described above, the operation of the second power amplifier 8x of the present embodiment is the same as the operation of the second power amplifier 8 of the first embodiment. Similarly, the operations of the other second power amplifiers 9x and 10x are the same as the operations of the second power amplifiers 9 and 10 of the first embodiment. Therefore, the drive currents I1, I2, and I3 have a continuous and smooth trapezoidal waveform as in the first embodiment.
Further, the drive voltage of the second power transistor is changed by the DC power supply 3 according to the energization auxiliary timing signals K1, K2, K3.
The operation of setting the voltage level to 0 on the positive electrode side is the same as that in the first embodiment.

In this embodiment, the potential switch signal Ks
When 1, Ks2 and Ks3 are on, the limited distribution signal Gx
1, Gx2 and Gx3 are not output. As previously mentioned,
When the potential switch signal input terminals of the second power amplifiers 8x, 9x, and 10x have a high potential, the second power amplifiers 8x, 9x, and 10x have the same potential regardless of the presence or absence of a current signal at the current amplification input terminals.
x, 9x, 10x second power transistors 113,
117 and 121 perform the saturation region operation at a sufficiently low operation voltage. Therefore, the potential switch signals Ks1, Ks2, Ks
3 is on, the second power amplifiers 8x, 9x, 10
The input of the current signal to the current amplification input terminal of x is unnecessary. Therefore, by making the section of the second distribution current signal G1, G2, G3 into limited distribution current signals Gx1, Gx2, Gx3 by the section limiter 40, unnecessary distribution current signals G1, G2, G3 are unnecessary. The current is cut.
Further, the second power transistors 113, 117, and 121 of the second power amplifiers 8x, 9x, and 10x are operated in a saturation region by the resistors 116, 120, and 124 inserted in the second power amplifiers 8x, 9x, and 10x. The current required for this is suppressed. Therefore, power loss can be reduced.

Other configurations and operations are the same as those in the first embodiment, and a detailed description will be omitted. Further, in the present embodiment, various advantages similar to those of the above-described first embodiment can be obtained.

(Embodiment 3) FIGS. 17 to 19 show a motor according to Embodiment 2 of the present invention. FIG. 17 shows the overall configuration. This embodiment is different from the first embodiment described above in that the auxiliary current supply device 19 and the signal combiners 21, 22, 22 are provided.
23, there is no operation switching signal generator 45, 46, 47
Has been added. Further, the second power amplifiers 8y and 9
The structures of y and 10y are different. In other configurations, the same components as those in the first embodiment are denoted by the same reference numerals,
Detailed description is omitted.

In this embodiment, the first distribution current signal E
The currents 1, E2, and E3 are amplified by the first current amplifiers 24, 25, and 26 by a predetermined number and input to the first power amplifiers 5, 6, and 7. The second distribution current signals G1, G2, G3 are amplified by a predetermined number of times by the second current amplifiers 27, 28, 29 to become second drive command signals Qy1, Qy2, Qy3, and the second power amplifiers 8y, 9y. , 10y. The first distribution current signals E1, E2, E2 and the second distribution current signals G1, G2, G3 are the driving currents I1, I2, I3.
Is a waveform forming signal that determines the waveform of The energization auxiliary timing signals K1, K2, K3 output from the energization auxiliary timing generator 18 are operation switching signal generators 41, 4
2, 43, and the energization auxiliary timing signals K1, K
2, K3, the operation switching signals Kv1, Kv2,
Kv3 is output. The second power amplifiers 8y, 9y,
10y receives the second drive command signals Qy1, Qy2, Qy3 and the operation switching signals Kv1, Kv2, Kv3.

FIG. 18 shows the configuration of the first power amplifiers 5, 6, 7 and the second power amplifiers 8y, 9y, 10y.
The first power amplifiers 5, 6, and 7 are the same as those of the first embodiment.
And the detailed description is omitted. The second power amplifier 8y has a configuration in which an NMOS transistor 128 is inserted instead of the resistor 115 of the second power amplifier 8 of the first embodiment. The conduction control terminal of the NMOS transistor 128 forms an operation switching signal input terminal of the second power amplifier 8y. N
The conduction control terminal of the MOS power transistor 113 and N
Energization control terminal of MOS transistor 114 and NMOS
The current inflow terminal of the type transistor 128 is commonly connected to form a current amplification input terminal. The second drive command signal Qy1 is input to the current amplification input terminal, and the operation switching signal Kv1 is input to the operation switching signal input terminal. The operation of the second power amplifier 8y will be briefly described.

The operation switching signal Ks1 is a signal output from the operation switching signal generator 41 and having two states of H level and L level. Operation switching signal generator 4
The configurations of 1, 42 and 43 will be described later. When the operation switching signal Kv1 is at the H level, the NMOS transistor 128 is turned on, and the second power amplifier 8y
Is a power part current mirror circuit composed of the power transistor 113 and the NMOS type transistor 114 and having a mirror ratio of 200, amplifies the input current signal of the current amplification input terminal by 200 times and supplies the positive current of the drive current I1 I do.

As described above, the power amplifier 8y when the operation switching signal Ks is at the H level performs the same operation as the power amplifier 8 when the energization auxiliary signal M1 is not output in the first embodiment. When the operation switching signal Kv1 is at the L level, the NMOS transistor 128 is turned off, and the drive command signal Qy1 is directly input to the conduction control terminal of the power transistor 113. Since the drive command signal Qy1 is output from the high potential point Vu, when the drive command signal Qy1 is input, the conduction control terminal of the power transistor 113 has the same potential as the high potential point Vu, and the power transistor 113 The saturation region operation is performed at a sufficiently low operation voltage. As described above, when the operation switching signal Ks1 is at the L level, the power amplifier 8y
The same operation as the power amplifier 8 when the energization auxiliary current signal M1 is output in the first embodiment described above is performed.

The second power amplifier 9y of FIG. 18 is the same as the resistor 119 of the second power amplifier 9 of the first embodiment.
Is replaced by an NMOS transistor 129. The conduction control terminal of the NMOS transistor 129 forms an operation switching signal input terminal of the second power amplifier 9y. The conduction control terminal of the NMOS power transistor 117, the conduction control terminal of the NMOS transistor 118, and the NMOS transistor 129.
Are connected in common with each other to form a current amplification input terminal. The second drive command signal Qy2 is input to the current amplification input terminal, and the operation switching signal input terminal is
The operation switching signal Kv2 is input.

Similarly, the second power amplifier 10y is connected to the resistor 1 of the second power amplifier 10 of the first embodiment.
An NMOS transistor 130 is inserted in place of 23. NMOS transistor 130
Forms an operation switching signal input terminal of the second power amplifier 10y. The conduction control terminal of the NMOS power transistor 121, the conduction control terminal of the NMOS transistor 122, and the current inflow terminal of the NMOS transistor 130 are commonly connected to form a current amplification input terminal. The second drive command signal Qy3 is input to the current amplification input terminal, and the operation switching signal Kv3 is input to the operation switching signal input terminal. Second
The operation of the power amplifiers 9y and 10y is the same as that of the second power amplifier 8y.

FIG. 19 shows operation switching signal generators 45 and 4.
6 and 47 are shown. Operation switching signal generator 45,
Reference numerals 46 and 47 each include switch means 433, 434 and 435 and resistors 430, 431 and 432. The energization assist timing signals K1, K2, and K3 are input to connection control terminals of the switch means 433, 434, and 435, respectively. One of the two connection terminals of the switch means 433, 434, 435 is commonly connected to the high potential point Vu via the resistors 430, 431, 432. The other of the connection terminals is commonly connected to the negative terminal side of the DC power supply 30. The connection control terminals of the switch means 433, 434, 435 and the respective connection points of the resistors 430, 431, 432 serve as signal output terminals of the operation switching signals Kv1, Kv2, Kv3.

The switch means 433, 434, 435 are
When the connection control terminal is at the H level, the two connection terminals are short-circuited, and when the connection control terminal is at the L level, the two connection terminals are opened. Therefore, the switch means 433, 434, 435
When the connection terminal is short-circuited, the operation switching signal Kv
The voltages of 1, Kv2, and Kv3 are at L level (potential equivalent to the negative terminal of the DC power supply 30). Switch means 433, 4
When the connection terminals 34 and 435 are opened, the resistance 43
Since they are pulled up by 0, 431, and 432, the voltages of the operation switching signals Kv1, Kv2, and Kv3 become H level (potential equivalent to the high potential point Vu).

Next, the waveforms of the drive currents I1, I2 and I3 and the drive voltage will be described. Energization auxiliary timing signal K
When 1 is at the H level, the operation switching signal Kv1 is at the L level (potential equivalent to the negative terminal of the DC power supply 30), and the transistor 128 of the second power amplifier 8y is turned off. Since the output timings of the energization auxiliary timing signals K1, K2, and K3 and the second distribution current signals G1, G2, and G3 are the same as those in the first embodiment, when the energization auxiliary timing signal K1 is at the H level, the distribution current The signal G1 is output. Therefore, the power transistor 113 of the second power amplifier 8y performs the saturation region operation at a sufficiently low operation voltage by the drive command signal Qy1. Therefore, this state is the same as the operation of the second power amplifier 8 when the energizing auxiliary current signal M1 is output in the first embodiment.

As described above, when the energization auxiliary timing signal K1 is at the H level, the second power amplifier 8
y and the second power amplifier 8 of the first embodiment operate in the same manner. When the energization assist timing signal K1 is at the L level, the operation switching signal Kv1 is at the H level (equivalent potential to the high potential point Vu), and the second power amplifier 8y
Transistor 128 is turned on. The second power amplifier 8y amplifies the drive command signal Qy1 by 200 times and supplies a positive current of the drive current I1. A drive command signal Qy1 when the energization assist timing signal K1 is at L level;
The drive command signal Q1 when the power supply assist timing signal K1 of the first embodiment is at the L level has the same waveform as the drive command signal Q1. Therefore, even when the energization assist timing signal K1 is at the L level, the second power amplifier 8y of the present embodiment and the above-described second power amplifier 8 of the first embodiment operate in the same manner.

As described above, the operation of the second power amplifier 8y of the present embodiment is the same as the operation of the second power amplifier 8 of the first embodiment. Similarly, the operations of the other second power amplifiers 9y and 10y are the same as those of the second power amplifiers 9 and 10 of the first embodiment. Therefore, the drive currents I1, I2, and I3 have a continuous and smooth trapezoidal waveform as in the first embodiment.
Further, the drive voltage of the second power transistor is changed by the DC power supply 3 according to the energization auxiliary timing signals K1, K2, K3.
The operation of setting the voltage level to 0 on the positive electrode side is the same as that in the first embodiment.

In this embodiment, the operation switching signal Kv
When 1, Kv2 and Kv3 are at the L level, the second power transistors 128, 129 and 130 are turned off, and the current path is cut off. Therefore, the power transistor 113,
The current required for operating the transistors 117 and 121 in the saturation region becomes very small. Therefore, power loss can be reduced.

The other configurations and operations are the same as those in the first embodiment, and a detailed description will be omitted. Further, in the present embodiment, various advantages similar to those of the above-described first embodiment can be obtained.

Although the first to third embodiments have been described in detail above, various modifications can be made to the specific configurations of the first, second, and third embodiments. It is. For example, the coils of each phase may be configured by connecting a plurality of coils in series or in parallel. Further, the number of phases of the coil is not limited to three, and may be Q (a positive number of 3 or more).

The moving body is not limited to the rotational movement, but may move straight. The number of magnetic poles of the moving body is not limited to two poles, but may be multi-poles, or magnetic teeth may be used.

Further, the configuration of the switching generator is not limited to three position detecting elements, but may be one or three or more position detectors. Further, the switching creator is configured to include the position detection unit using the magnetoelectric conversion element. However, the switching creator is not limited to such a case. For example, the switching signal may be generated using a back electromotive voltage generated in the coil.

In each of the above-described embodiments, the width of the drive current is 180 ° in electrical angle.
It is not limited to 80 °. In the case of a Q (positive number of 3 or more) phase coil, any number of coils may be used as long as the electrical angle is 360 ° / Q or more. In addition, the energization width of the energization assist signal is not limited to 120 electrical degrees.

Further, the power amplifier may be constituted by a device other than the NMOS power transistor. For example, a bipolar transistor may be used. For example, NM in FIG.
The OS-type power transistor 113 and the NMOS-type transistor 114 may be constituted by bipolar transistors.

The power diode of the power amplifier may be provided externally. The configuration of the power amplifier is not limited to the configuration described in the first to third embodiments. For example, the resistor inserted in the power amplifier of the first embodiment may not be provided, and any configuration of a power amplifier having a current amplification function may be used. A current amplifier having a non-linear amplification characteristic may be used.

In addition, various modifications are possible without changing the gist of the present invention, and it goes without saying that the present invention is included in the present invention.

[0104]

According to the motor of the present invention, the first power amplifying means in the Q-phase motor has an electric angle of 360
/ Q degrees, a conduction width of P degrees greater than / Q degrees, the conduction control means includes a waveform forming signal generating means for determining the P degrees conduction width, and a conduction auxiliary signal output only in a section less than P degrees. And a drive commanding means for controlling the energization of the first power amplifying means in response to both the waveform forming signal and the energization auxiliary signal. As a result, one of the first power amplifying units is always in a full-on state by the energization auxiliary signal.
Any phase of the supply voltage to the coil can always be fixed to one terminal voltage level of the DC power supply means, and the operation of the motor is stabilized. Furthermore, since the energization auxiliary signal does not affect the waveform of the driving current, the driving current has a smooth continuous waveform by the waveform forming signal, and a high-performance motor with small vibration can be realized.

[Brief description of the drawings]

FIG. 1 is a diagram showing an overall configuration according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of first power amplifiers 5, 6, 7 and second power amplifiers 8, 9, 10 shown in FIG.

FIG. 3 shows second power amplifiers 8, 9, and 10 shown in FIG.
Showing characteristics of current amplification factor

FIG. 4 shows a current detector 11 and a current supplier 12 shown in FIG.
Circuit diagram of

FIG. 5 is a circuit diagram of the switching generator 14 shown in FIG. 1;

FIG. 6A shows a position detection signal J according to the first embodiment.
Waveform diagrams (a) of a1, Ja2 and Ja3 are waveform diagrams of energization assisting timing signals K1, K2 and K3 in the first embodiment.

FIG. 7A shows a switching signal D according to the first embodiment;
1, (b) is a waveform diagram of the first distributed current signals E1, E2, and E3, (c) is a waveform diagram of the second distributed current signals G1, G2, and G3 (d). The waveform diagram (e) of the energization auxiliary current signals M1, M2, M3 is the same as the composite current signal H
Waveform diagram of 1

8 is a circuit diagram of the distribution creator 15 shown in FIG.

9 is a circuit diagram of an energization auxiliary timing generator 18 shown in FIG.

FIG. 10 is a circuit diagram of a conduction auxiliary current supply unit 19 shown in FIG.

11A is a diagram illustrating first distribution current signals E1, E2, and E3 and composite current signals H1, H2, and H according to the first embodiment; FIG.
3 is a waveform diagram of the drive currents I1, I2, and I3.

FIG. 12 is a diagram showing an overall configuration according to a second embodiment.

FIG. 13 shows first power amplifiers 5, 6, shown in FIG.
7 and the circuit diagram of the second power amplifiers 8x, 9x, 10x

14 is a circuit diagram of the distribution creator 15 and the section limiter 40 shown in FIG.

15A is a waveform diagram of the switching signals D1, D2 and D3 in the second embodiment, FIG. 15B is a waveform diagram of the first distributed current signals E1, E2 and E3, and FIG. The waveform diagram (d) of the distribution current signals G1, G2, and G3 is the waveform diagram of the energization auxiliary timing signals K1, K2, and K3, and the waveform diagram (e) is the waveform diagram of the limited distribution current signals Gx1, Gx2, and Gx3.

FIG. 16 shows the potential switch generators 41 and 4 shown in FIG.
Circuit diagram of 2,43

FIG. 17 is a diagram showing an overall configuration according to a third embodiment.

FIG. 18 shows the first power amplifiers 5, 6, shown in FIG.
7 and the circuit diagram of the second power amplifiers 8y, 9y and 10y

19 is an operation switching signal generator 4 shown in FIG.
Circuit diagram of 5, 46, 47

FIG. 20 is a diagram showing a configuration of a conventional motor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Moving body 2,3,4 Coil 5,6,7 First power amplifier 8,9,10 Second power amplifier 11 Current detector 12 Current supply 13 Commander 14 Switching generator 15 Distribution generator 18 Energization Auxiliary timing generator 19 Energizing auxiliary current supplier 20 High potential output unit 21, 22, 23 Signal synthesizer 24, 25, 26 First current amplifier 27, 28, 29 Second current amplifier

Claims (10)

[Claims] A first power transistor which forms a current path between the moving body, a multi-phase coil, a DC power supply serving as a power supply source, and one terminal of the DC power supply and the coil. Q (Q is a positive number of 3 or more) including first power amplifying means, and Q power including second power transistors forming a current path between the other terminal of the DC power supply means and the coil. A second power amplifying means, an energization control means for controlling energization of the first power amplifying means and the second power amplifying means, and a current for outputting a signal corresponding to an energizing current supplied by the DC power supply means Detecting means, wherein each of the Q first power amplifying means has a conduction width of P degrees larger than 360 / Q degrees in electrical angle, and the conduction control means has a conduction degree of P degrees. Create waveform forming signal to determine width A stage, energizing the auxiliary signal generating means for outputting an energization auxiliary signal output by the P of less than the interval, in response to both of said waveform formation signal and the energizing auxiliary signal,
Drive command means for controlling energization of the first power amplifying means, wherein the waveform forming signal is responsive to an output signal of the current detection means and a command signal for controlling power supply to the coil. A motor characterized by changing the output signal level by changing the output signal level. 2. An energizing section of P degrees of said first power amplifying means is defined as a section of less than P / 2 degrees from the start of energizing,
When a section less than P / 2 degrees until the end of energization is divided into a second section, and a section excluding the first section and the second section is divided into a third section, the waveform forming signal is at least the third section. 1
2. The motor according to claim 1, wherein the power supply auxiliary signal is output only during an interval of less than P degrees including the third interval, the output being performed in a second interval and the second interval. 3. 3. The waveform forming signal generating means includes a switching generating means for outputting a switching signal of a plurality of phases, a current detecting means and a current for outputting a supply current signal whose current value changes in response to the command signal. Supply means, and distribution control means for obtaining a Q-phase distribution current signal by alternately controlling the distribution of the supply current signal to one phase or two phases in response to an output signal of the switching creation means. The motor according to claim 1 or 2, wherein the motor is provided. 4. A waveform forming signal generating means for outputting a waveform forming signal output in the P-degree energizing section, and a waveform forming signal generating means for outputting the waveform forming signal in the P-degree energizing section. 4. The apparatus according to claim 1, further comprising a section limiting means for limiting only a first section of less than P / 2 from the start of energization and a second section of less than P / 2 degrees from the end of energization. 5. A motor according to any one of the preceding claims. 5. The energization auxiliary signal, wherein the energization auxiliary signal is a current signal in response to an output signal of the energization auxiliary timing generator, the energization auxiliary signal generator determining an output timing of the energization auxiliary signal. The drive command means combines the waveform forming signal and the conduction assist signal to output a combined current signal, and multiplies the combined current signal by a predetermined number. Current amplification means for outputting an amplified current signal obtained by current amplification, wherein the first power amplification means and the second power amplification means
5. The power amplifier according to claim 1, wherein one or both of the power amplifiers supplies a drive current for the coil in response to an amplified current signal output from the current amplifier.
The motor according to item 1. 6. One or both of the first power amplifying means and the second power amplifying means, a current amplification input terminal for current amplifying an input signal, and a power amplifying terminal for the power transistor based on an input signal potential. A drive amplifier for outputting a current signal obtained by amplifying the waveform forming signal by a predetermined factor, and a potential switch signal corresponding to the energization auxiliary signal; The motor according to any one of claims 1 to 4, further comprising a potential switch creating unit. 7. One or both of said first power amplifying means and said second power amplifying means is a power section current mirror comprising said power transistor, an input transistor, and a resistor, and The transistor and the current outflow terminal of the input transistor are connected in common, the power transistor and the conduction control terminal of the input transistor are connected in common, and the resistance between the commonly connected conduction control terminal and the current inflow terminal of the input transistor is equal to the resistance. 7. The motor according to claim 6, wherein the current input terminals of the input transistors form a current amplification input terminal, and the commonly connected conduction control terminals form a potential switch signal input terminal. . 8. One or both of the first power amplifying means and the second power amplifying means has an energization signal input terminal and an operation switching terminal, and responds to an operation switching signal input to the operation switching terminal. A switching operation between a current amplification operation of an input signal of the energization signal input terminal and an operation of turning on the power transistor when a signal is input to the signal input terminal. The motor according to claim 1, wherein the motor changes in response to a signal. 9. One or both of said first power amplifying means and said second power amplifying means is a power section current mirror comprising said power transistor, an input transistor and a switch means, The power transistor and the current outflow terminal of the input transistor are commonly connected, the power transistor and the conduction control terminal of the input transistor are commonly connected to form the conduction signal input terminal, and the conduction signal input terminal and the input transistor 9. The motor according to claim 8, wherein a current inflow terminal is connected via the switch means, and a connection control terminal of the switch means forms the operation switching terminal. 10. The energization assist signal has an electrical angle of 360 / Q.
The motor according to any one of claims 1 to 9, wherein the motor output is performed in a range of degrees.