JP3435520B2 - Charge pump circuit and PLL circuit using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop (PLL) circuit used for mobile communication, for example, and more particularly to a charge pump circuit for locking up the PLL circuit at high speed.

[0002]

2. Description of the Related Art In recent years, with the remarkable progress of mobile communication technology as seen in the widespread use of automobile telephones, cordless telephones, etc., a phase-locked loop circuit for controlling the frequency, which is provided inside the communication equipment, operates at a higher speed. Came to be requested.

FIG. 5 is a block diagram showing the configuration of a basic PLL circuit. Explaining the operation of the circuit of the figure, the phase of the output signal 27 of the voltage controlled oscillator 25 and the reference signal 26 from the reference signal source 21 is compared by the phase comparator 22.
The resulting phase error signal is the charge pump unit 23.
Is converted into a current by the loop filter section 24, the noise component is removed by the loop filter section 24, and then applied to the voltage controlled oscillator 25 as a control input. This PLL circuit is a feedback loop formed by the above operation, and the phase comparator 2
When the phase of the reference signal 26 input to 2 and the phase of the output signal 27 of the voltage controlled oscillator 25 match, the PLL circuit is in a lock state, and at this time, the charge pump current becomes zero in principle.

FIG. 6 is a circuit diagram showing an example of a conventional charge pump section 23 in the PLL circuit of FIG. As shown in the figure, this charge pump unit has one end connected to the first input terminal and the other end connected to the base of the PNP transistor 30, and one end connected to the second input terminal. A resistor 28 'whose end is connected to the base of the NPN transistor 30', a resistor 29 connected between the base of the PNP transistor 30 and the power supply Vcc, and NP
It has a resistor 29 'connected between the base of N-transistor 30' and ground. PNP transistor 3
The emitter of 0 is connected to the power supply Vcc, the emitter of the NPN transistor 30 'is grounded, the collectors of both transistors are connected to each other, and the output of the charge pump unit 23 is taken out. With the configuration as described above, the charge pump unit 23 has a role of converting a voltage proportional to the phase error output from the phase comparator 22 into a current and supplying the current to the loop filter unit 24 of the next stage.

It should be noted that the transistors 30, 30 'are turned on.
Turning off the first input terminal and the second input terminal of the charge pump circuit.
Is switched according to the polarity (positive / negative) of the voltage (phase error signal of the phase comparator 22) applied to the input terminal of the transistor 30, and when the charge pump circuit is not operated, the base voltage of the transistor 30 is at the high level and the transistor 30 ' When the base voltage is set to the low level and the positive current is supplied to the loop filter unit 24, the base voltage of the transistor 30 is set to the low level, and when the negative current is supplied, the transistor 3 is set.
The base voltage of 0'is set to the high level.

By the way, in order to speed up the response of the PLL circuit, the charge pump section is composed of a plurality of charge pump circuits connected in parallel, and when the PLL circuit is locked up at a high speed, A lock-up method has been proposed in which the phase error is eliminated in a short time by forcibly increasing the output current of the. FIG. 7 shows an example of a conventional charge pump unit adopting such a high-speed lockup method. Charge pump unit 2 of FIG.
A PLL 3 outputs a large charge pump current through a switch 33 in parallel with a first charge pump circuit 31 for controlling the PLL circuit to lock up at a normal speed (normal lockup mode). A second charge pump circuit 32 for controlling the circuit to lock up at a high speed (high speed lockup mode) is provided. In the high-speed lockup mode, the switch 33 is closed so that the second charge pump circuit 32 is driven in addition to the first charge pump circuit 31, and when the normal lockup mode is switched, the switch 33 is turned on. Open to stop the second charge pump circuit 32 and drive only the first charge pump circuit 31.

FIG. 8 is a graph showing how the charge pump current and the controlled oscillation frequency change without time when the above high-speed lockup method is not used. From this graph, it can be seen that the oscillation frequency of the voltage controlled oscillator 25 draws a single exponential curve and approaches the target value. On the other hand, FIG. 9 is a graph showing a temporal change between the charge pump current and the controlled oscillation frequency in the case where the high-speed lockup method as described in FIG. 7 is used. From the graph of FIG. 9, the oscillation frequency of the voltage controlled oscillator 25 rises more rapidly than in the case of FIG. 8 during the high-speed lockup mode period (that is, the period when the charge pump current is large) 34, and reaches the target frequency. You can see it arrives quickly.

[0008]

However, as can be seen from the graph of the oscillation frequency of FIG. 9, in the charge pump section 23 of FIG. 7, when the high speed lockup mode is switched to the normal lockup mode, the charge is not charged. Since the pump current sharply decreases, there is a problem that the oscillation frequency of the voltage controlled oscillator 25 is once swung back as shown in the graph of FIG. 9 at the beginning of the normal lockup mode period 35. In other words, the oscillation frequency of the voltage controlled oscillator 25 rises toward the target frequency in a short time in the high speed mode, but is swayed back at the instant when the lockup mode is switched to, that is, drastically lowered. After that, it gradually changes so as to approach the target frequency.

Such swinging back can reduce the fluctuation of the oscillation frequency of the voltage controlled oscillator 25 to some extent by lengthening the period 34 in the high-speed lockup mode and adjusting the current value in this period 34. However, circuit design and adjustment are troublesome, and it is still difficult to completely eliminate frequency fluctuations.

The present invention has been made to solve the above problems, and is capable of suppressing fluctuations in the oscillation frequency of a voltage controlled oscillator without complicated work such as fine adjustment of the charge pump current value. An object is to provide a circuit and a PLL circuit using the circuit.

[0011]

In order to achieve the above object, a charge pump circuit according to a first invention of the present application is a capacitor connected to an input terminal and the capacitor.
A differential circuit having a resistor connected in series to the
Equipped with a transistor whose input electrode is connected to the output end of the path
A charge pump circuit that outputs a charge pump current when the transistor is in an ON state,
Differentiate the voltage applied to the terminals by the differentiating circuit.
Causes the transistor to change from on to off
The charge pump current is gradually reduced exponentially
It is characterized by being configured .

In one embodiment of the first invention of this application, a charge pump circuit includes a first differentiating circuit connected to a first input terminal and a second differentiating circuit connected to a second input terminal.
Differentiating circuit, a first transistor having an input electrode connected to the output terminal of the first differentiating circuit, and an input electrode connected to the output terminal of the second differentiating circuit, and connected in series with the first transistor. And a second transistor connected to.

In the PLL circuit according to the second aspect of the present application, the charge pump unit includes a plurality of charge pump circuits that generate different charge pump current values, and at least one of the charge pump circuits is provided. To
The charge pump circuit according to the first invention of this application is used.

[0014]

[Action] By providing the differentiating circuit at the input side of the charge pump circuit according to a first invention of this application, a sudden change in the input voltage, the change in exponential defined by the time constant of the differentiating circuit To turn off the transistor
The abrupt fluctuation of the charge pump current when changing to is alleviated.

In the PLL circuit according to the second invention of this application, by using the charge pump circuit according to the first invention as at least one charge pump circuit of the charge pump section , the input voltage to the charge pump circuit is increased.
The abrupt change in pressure is converted into an exponential change defined by the time constant of the differentiating circuit, which causes a transient in the charge pump circuit.
The charge pump voltage as the system changes from on to off.
Since the rapid fluctuation of the flow is alleviated , the oscillation frequency of the voltage controlled oscillator is not changed unnecessarily.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments of the present invention will be described below with reference to FIGS.
Will be described with reference to.

FIG. 1 is a circuit diagram showing a first embodiment of a charge pump circuit according to the present invention. The charge pump circuit 10 in FIG. 1 is substantially different from the charge pump circuit 23 shown in FIG. 6 in that a capacitor is inserted between an input terminal and a resistor to form a differentiating circuit. That is, in FIG. 1, one end of the capacitor 1 is connected to the first input terminal, and the other end of the capacitor 1 is connected to the power supply Vcc via the resistors 2 and 3 connected in series.
The connection point between the resistor 2 and the resistor 3 is connected to the PNP via the resistor 4.
It is connected to the base of transistor 5 and the emitter of PNP transistor 5 is connected to power supply Vcc. Similarly, one end of the capacitor 1'is connected to the second input terminal, and the other end of the capacitor 1'is grounded via the resistors 2'and 3'connected in series. The connection point between the resistor 2'and the resistor 3'is connected to the base of the NPN transistor 5'through the resistor 4 ', and the emitter of the NPN transistor 5 is grounded. Thus, the capacitor 1, the resistor 2 and the resistor 3 constitute the first differentiating circuit 6, and the capacitor 1'and the resistor 2 '
And a resistor 3'constitute a second differentiating circuit 6 '. P
The collectors of the NP transistor 5 and the NPN transistor 5'are connected to each other, and the output current is taken out from the connection point.

FIG. 2 is a graph for explaining the operation of the charge pump circuit 10 of FIG. 1, in which (a) shows the on / off state in which the voltage is input to the bases of the transistors 5 and 5 '. b) shows the absolute value 8 of the charge pump current output corresponding to each of them. here,
The polarity (positive / negative) of the charge pump current depends on the transistor 5
Is positive, and the transistor 5'is negative.
As shown in (a), when the on / off state 7 changes stepwise from on to off, the charge pump circuit 1
As shown in (b), 0 outputs a charge pump current whose absolute value 8 smoothly decreases exponentially to zero by the action of the differentiating circuits 6 and 6 '.

Therefore, the charge pump circuit 10 of FIG.
Is used as the charge pump circuit 32 for high-speed lockup in the charge pump section 23 shown in FIG. 7, the charge pump circuit 10 has the characteristics shown in FIG. Even when the input current to the charge pump section decreases stepwise when switching from the normal to lockup mode, the charge pump current output from the charge pump section is an exponent from the large current in the fast lockup mode. Since the current smoothly decreases in a functional manner in the normal lock-up mode, the oscillation frequency of the voltage controlled oscillator does not suddenly change.

FIG. 3 shows the operation when the charge pump circuit 10 of FIG. 1 and two ordinary charge pump circuits are connected in parallel. Fast lockup mode period T
During the period, a large charge pump current is supplied to the voltage controlled oscillator to cause the oscillation frequency of the voltage controlled oscillator to rise rapidly toward the target frequency as shown in waveform 9. Next, when the high-speed lockup mode is switched to the normal lockup mode, the input current to the charge pump unit decreases in a stepwise manner. The charge pump current is an exponential time constant of the differential circuits 6 and 6 '. Since it smoothly decreases functionally and eventually becomes the charge pump current in the normal lockup mode, the oscillation frequency of the voltage controlled oscillator smoothly transitions to the target frequency as shown by the waveform 9 '. In this way, the charge pump current from the charge pump unit changes smoothly, so that it is possible to effectively suppress the influence on the oscillation frequency of the voltage controlled oscillator when the charge pump is switched.

FIG. 4 shows a second embodiment of the charge pump circuit according to the first invention of this application. In this embodiment, the charge pump circuit 10 of FIG.
Although the resistors 4 and 4'are omitted, similar to the circuit shown in FIG. 1, the function of differentiating the input current and outputting the charge pump current that smoothly decreases can be obtained.

In the above description of the embodiments, the charge pump unit has two charge pump circuits, one for high-speed lockup and one for normal lockup, but the present invention is not limited to this, and the PLL circuit is different. The charge pump unit may be composed of three or more charge pump circuits for locking up at a speed.

[0023]

As is apparent from the detailed description of the present invention with reference to some embodiments, the charge pump circuit according to the present invention includes the differentiating circuit on the input side. Even if the input current changes stepwise, the current output from the charge pump circuit is converted into a smooth exponential change defined by the time constant of the differentiating circuit. Therefore, when this charge pump circuit is used to lock up the PLL circuit at high speed, even if the input current to the charge pump circuit changes stepwise, the charge pump current output therefrom changes exponentially. Therefore, it is possible to suppress the fluctuation of the oscillation frequency of the voltage controlled oscillator, which is a particular effect.

[Brief description of drawings]

FIG. 1 is a diagram showing a first embodiment of a charge pump circuit according to the present invention.

FIG. 2 is a diagram for explaining the operation of the charge pump circuit of FIG.

FIG. 3 is a diagram for explaining the operation of changing the charge pump current and the oscillation frequency of the voltage controlled oscillator when the charge pump circuit of FIG. 1 is used for high-speed lockup.

FIG. 4 is a diagram showing a second embodiment of the charge pump circuit according to the present invention.

FIG. 5 is a block diagram showing the configuration of a basic PLL circuit.

6 is a circuit diagram showing an example of a conventional charge pump unit in the PLL circuit of FIG.

7 is a diagram showing a configuration of a conventional charge pump unit for locking up the PLL circuit of FIG. 5 at high speed.

FIG. 8 is a diagram for explaining a normal lockup operation of the PLL circuit of FIG.

9 is a diagram showing changes in the charge pump current and the oscillation frequency of the voltage-controlled oscillator when the high-speed lockup mode is switched to the normal lockup mode in the PLL circuit using the charge pump unit of FIG. 7. .

[Explanation of symbols]

1.1 ': Capacitor, 2.2', 3, 3 ', 4 ...
4 ': resistor, 5.5': transistor, 6.6 ':
Differentiation circuit, 10: Charge pump circuit

Claims (3)

(57) [Claims] 1. A capacitor connected to an input terminal, and
Differentiating circuit having a resistor connected in series to the capacitor
And a transformer whose input electrode is connected to the output terminal of the differentiating circuit.
And a charge pump circuit that outputs a charge pump current when the transistor is in an on state.
The voltage applied to the input terminal by the differentiating circuit.
By differentiating the
Exponential function of the charge pump current when changing to
A charge pump circuit characterized in that the charge pump circuit is configured to gradually decrease . 2. The charge pump circuit according to claim 1, further comprising a first differentiating circuit connected to the first input terminal,
A second differentiating circuit connected to a second input terminal, a first transistor having an input electrode connected to the output terminal of the first differentiating circuit, and an input electrode connected to the output terminal of the second differentiating circuit. And a second transistor connected in series with the first transistor. 3. A PLL circuit configured to control an oscillation frequency of a voltage controlled oscillator by a charge pump current output from a charge pump unit, wherein the charge pump unit generates a plurality of charge pump current values different from each other. A PLL circuit comprising a charge pump circuit, wherein at least one of the charge pump circuits is the charge pump circuit according to claim 1.