JP3408766B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [0001] [0001] The present invention relates to a liquid crystal display device.
In particular, a block formed on the side of the active matrix substrate
The present invention relates to a structure technology of a light shielding layer such as a rack matrix. [0002] 2. Description of the Related Art Typical flat panel displays
In the liquid crystal display device shown in FIG.
As shown, a data line (source line) for supplying an image signal
502a, 502b... And a gate for transmitting a scanning signal.
Are arranged in a grid pattern.
., Each pixel region 501aa, 501ab.
The formed transparent substrate on one side and the common electrode 533 are formed.
Liquid crystal between the other transparent substrate 530 (opposite substrate)
540 are enclosed, and the common electrode 533 and each pixel area
The pixel electrodes 515506 of 501aa, 501ab,...
And a thin film transistor (TFT) 508 therebetween.
By controlling the applied potential, the pixel regions 501aa, 501
ab... to change the alignment state of the liquid crystal
You. In such a liquid crystal display device, for example,
29, the data line 502a and the pixel electrode 506
Leakage of light from the gap (shown by arrow A)
There is a problem that the position is lowered. In addition,
Due to the influence of the electric field between the data line 502a and the pixel electrode 506.
Domain region where the alignment state of liquid crystal is disturbed
The region is generated inside the outer edge of the pixel electrode 506,
There is also the problem that display quality is reduced due to the
You. For this reason, in order to increase the vividness of the display for each pixel,
The other transparent substrate 530 on which the common electrode 533 is formed
In addition, light-shielding black corresponds to the boundary area between pixel areas.
A matrix 531 is formed, and a boundary area between the pixel areas is formed.
So that the black matrix 531 is positioned
The bright substrates 509 and 530 face each other to ensure the display quality.
ing. Here, the boundary area between each search area and the black
If there is a misalignment with Trix 531
Of the black matrix 531
The margin is given to the width and the above-mentioned misalignment occurs.
Preventing. [0003] However, the liquid crystal display
For display devices, large screens and high quality display
In a situation where
The width of the check matrix is expanded to have a margin
This means that the aperture ratio in the pixel area (the surface of the displayable area)
Product ratio) and hinder display quality improvement.
There is a problem. Therefore, the present inventor has proposed a matrix array.
A black matrix is also formed on the transparent substrate side with
The boundary area between pixel areas and the
Black matrix to prevent misalignment with the
Proposes that the width of the box can be set to the minimum necessary width
Is what you do. In line with this proposal, the inventor of the present application
30 and FIG. 31 as comparative examples.
1 is a liquid crystal display device shown in FIG. In these figures, the transparent substrate
The data lines 502a, 502b,.
. And the gate lines 503a, 503b.
Are arranged so that each pixel area 501aa, 501ab.
Each of these pixel regions 501aa,
Black matrix along the boundary area of 501ab ...
517 is formed. Where the black matrix
517, for example, in the pixel region 501bb,
Source 504, gate to which data line 502a is conductively connected
A gate electrode 505 and a pixel to which the line 503a is conductively connected;
The electrode 506 is constituted by a drain 507 that is conductively connected.
The interlayer insulating films 513 and 51 are provided on the surface side of the TFT 508 thus formed.
5, the data line 502a and the gate
Insulated from both line 503a and pixel electrode 506
It is in the state that was done. In a liquid crystal display device having such a configuration,
In other words, a mark unnecessary for the width of the black matrix 517
Even if no gin is provided, each pixel area and black matrix
517 can be aligned with high accuracy,
The aperture ratio of the device is not sacrificed. However,
This liquid crystal display device has the following new problems
There is. The black matrix 517 has any potential
Is not applied and is in a floating state,
Depending on the operation state of the liquid crystal display device, the black matrix
The potential of the pixel 517 fluctuates.
Exists between the pole 506 and the common electrode of the transparent substrate on the other side.
The alignment of the liquid crystal is disturbed and the display quality is reduced.
I will. In addition, any of the pixel regions 501aa and 501ab
Are also common.
Therefore, for example, the black matrix 517
501bb pixel electrode 506, data lines 502a and 50b
2b or gate line 503a, 503b, etc.
In such a case, the display of the entire liquid crystal display device becomes defective. [0004] SUMMARY OF THE INVENTION The present invention provides two
Image defined by two data lines and two gate lines
A pixel region and the gate line and the data in the pixel region.
Transistor connected to line and connected to said transistor
Along with the two data lines.
ConductivityA light-shielding layer is arranged respectively, and the two
Placed along one of the data linesConductive
sexThe width of the light shielding layer is arranged along the other data lineGuidance
ElectricalThicker than the width of the light shielding layer, andThe conductive light-shielding layer is
While being formed on the pixel electrode, the conductive light-shielding layer and
Pattern the outer edge with the pixel electrode using the same mask.
DoSaidConductivityThe outer edge of the light-shielding layer is
It is characterized by being coincident with the outer edge. According to the present invention, two data lines and two data lines are provided on a substrate.
And a pixel region defined by the gate lines of
The pixel area is formed along the two data lines.
A light-shielding layer, and the light-shielding layer covers the two data lines.
The width of the light shielding layer arranged along one of the data lines is
Thicker than the width of the light shielding layer arranged along the other data line
It is characterized by that. [0006] [0007] [0008] [0009] [0010] [0011] [0012] [0013] [0014] [0015] [0016] [0017] [0018] (Embodiment 1) FIG. 1 shows an embodiment of the present invention.
Part of the matrix array of the liquid crystal display device according to the first embodiment
FIG. 2 is a cross-sectional view taken along the line II.
You. In the liquid crystal display device of the present embodiment, as shown in FIG.
As shown, the vertical data lines 102a, 102b,.
(Signal line) and horizontal gate lines 103a, 103
b ... (scanning lines) are arranged in a grid pattern and between them
The pixel regions 101aa, 101ab, 101ac, 1
.. Are defined. Hereinafter, the pixel area 101bb (first pixel area)
The structure will be described with reference to (area) as an example. Where the pixel
The region 101bb includes pixel regions 101ab, 101ba,
101cb and 101bc (second pixel area) are adjacent
The data line 102a is connected to the pixel area 101bb.
The source 104 and the gate line 103b are electrically connected.
Gate electrode 105 and pixel electrode 106
The TFT 107 is constituted by the drain 107 which follows.
ing. Here, the pixel electrode 106 is made of a transparent material made of ITO.
A bright electrode, covering substantially the entire surface of the pixel area 101bb.
It is formed. The sectional structure of the TFT 108 is shown in FIG.
As described above, the transparent substrate 109 supporting the entire liquid crystal display device
A polycrystalline silicon layer 110 is formed on the surface side of
The polycrystalline silicon layer 110 includes an intrinsic polycrystalline silicon.
N-type impurities except for the channel region 111 which is a
Phosphorus as a material is introduced, and the sauce 104 and the drain are introduced.
In 107 is formed. Here, the introduction of phosphorus
The gate electrode formed on the surface side of the polycrystalline silicon layer 110
Using the gate electrode 105 on the extreme oxide film 112 as a mask
By utilizing ion implantation, the source 104 and
Drain 107 is performed so that it is self-aligned.
You. On the front side of this TFT 108, a silicon oxide film
And a lower interlayer insulating film 113 made of
Has a first connection hole 113a and a second connection hole 113b.
It is open. Through the first connection hole 113a,
And a low-resistance metal layer such as an aluminum layer or
The data line 102a made of an alloy layer containing aluminum is
It is conductively connected to the source 104. On the other hand, the second connection hole
The pixel electrode 106 is connected to the drain 107
Is conductively connected to Further, in this liquid crystal display device, the transparency is
An upper interlayer insulating film 115 on the surface side of the bright substrate 109;
A light-blocking and conductive clip formed on the surface
It has a ROM layer 116bb (conductive light-shielding layer). here,
The chrome layer 116bb has a T
A position diagonal to the area where the FTl08 is formed, that is, the pixel area
Area 101bb and pixel areas 101ab, 101ac, 10
1bc at the end in contact with the upper interlayer insulating film
Conduction to the pixel electrode 106 through the connection hole 115a
Connected. Further, the chrome layer 116bb is
The edge 116x is the pixel region 101bb and the pixel region 101a
b, 101ba, 101cb, border area with 101bc
Area, that is, the data lines 102a and 102b and the gate
Lines 103a and 103b.
Data lines 102a and 102b and gate lines
103a and 103b via an interlayer insulating film 113115
And are insulated and separated. Further, the chrome layer 116
The conductive light-shielding layer such as bb is applied to any pixel region.
Are formed in the same way, but all of them
It is in a state of being insulated and separated from the ROM layer. For example,
Outer edge 116x of the chrome layer 116bb and the chrome layer 116a
b, 116ba, 116cb, outer edge 11 of 116bc
6x means the data lines 102a and 102b and the gate line
In a state of being insulated and separated just above 103a and 103b
is there. Therefore, any chromium layer, for example, chrome layer
116bb is a pixel area 101ab, 101ba, 101
Each of the cb and 101cc pixel electrodes is insulated and separated
, The same pixel region 10
A potential may be applied from the 1bb pixel electrode 106.
However, no potential is applied from the pixel electrodes in other pixel areas.
Is in a bad state. In addition, substantially the entire front surface side of the data line 102a is
The body is composed of an interlayer insulating film 115 and chromium layers 116bb, 116
ba is covered with the end of the data line 102a.
The applied potential has an effect on the liquid crystal on the surface side.
It is not so. The chrome layer 116bb
Has a large overlapping area on the side of the gate line 103a in the previous stage.
The chrome layer 116bb is formed on the pixel electrode 1
06, it forms a storage capacitor
In state. In this embodiment, in addition to the matrix array,
Substrate 10 on which black matrix 116 is also formed
9 and the other on which the color filter and the common electrode are formed
The liquid crystal is sealed between the transparent substrate (not shown) on the side,
A liquid crystal display device is configured. Then, the data line 102
a, 102b... and gate lines 103a, 103b
... with common electrodes and each
By controlling the potential generated between the pixel electrode 106 and the
Change the alignment state of liquid crystal in each area to display information
Has become. Here, in the conventional liquid crystal display device,
The transparent substrate on which the common electrode is formed
A black matrix corresponding to the boundary area of the pixel area is
However, in the liquid crystal display device of this example,
ROM dust, for example, chrome layer 116bb
It is formed in the boundary area between 1bb and the surrounding pixel area
Utilizing that, each chrome layer 116bb, 116ab,
116ba, 116cb, 116cc ... black
A common electrode was formed for use as a matrix
A black matrix must be formed on the transparent substrate side.
No need. Therefore, two transparent substrates are paired as in the related art.
Orientation, the boundary area of each pixel area and the black mat
Doesn't matter the accuracy of alignment with Rix 116
In this case, the width of the black matrix 116 is
Field regions, that is, the data lines 102a, 102b,...
And the width of the gate lines 103a, 103b, etc.
And can be set to the minimum width. Therefore, liquid crystal display devices
The aperture ratio can be improved. The chrome layer 116bb is connected to the data line 1
02a, 102b, gate lines 103a, 103b and
Adjacent pixel areas 101ab, 101ba, 101c
b, one of which is insulated from the pixel electrode 101bc
Therefore, the pixel electrode 106 of the same pixel region 101bb is electrically conductive.
Because of the connection, the potential of the chrome layer 116bb
Regardless of the operation state of the display device, the pixel electrode 106 is always
In this state, the same potential as that of the above is applied. Hence the chrome layer
The potential of 116 bb in the pixel region 101 bb
Of liquid crystal existing between the elementary electrode 106 and the common electrode
Since the state is not disturbed, high display quality can be obtained. Ma
In addition, the black matrix 116 includes a pixel region 101bb.
Chromium layer 1 electrically independent for each pixel area
16bb ...
For example, in the pixel region 101bb, the chrome layer 116bb
And the data line 102a are in a short-circuit state,
Only the area 101bb cannot be displayed, that is, its influence
Is a point defect on the display.
High reliability. (Embodiment 2) FIG. 3 shows Embodiment 2 of the present invention.
Plane showing a part of a matrix array of such a liquid crystal display device
FIG. 4 is a sectional view taken along line II-II.
Here, each part corresponds to the liquid crystal display device according to the first embodiment.
Parts having the same functions are given the same reference
The detailed description of is omitted. In the liquid crystal display device according to this embodiment,
, The vertical data lines 102a, 102b. ...
And the horizontal gate lines 103a, 103b,...
Each pixel region 101a which is wired and formed in a grid pattern and defined.
a, 101ab, 101ac, 101ba, 101bb
.. Among the pixel regions 101bb (first
In the pixel area), the TF
Tl08 has been formed, and a silicon
A lower interlayer insulating film 113 made of a silicon oxide film is deposited.
ing. Then, the data is passed through the first connection hole 113a.
The power line 102 a is conductively connected to the source 104. Further
In addition, an upper interlayer insulating film 115 is also formed on the surface side thereof.
The first and upper interlayer insulating films 11
Through a connection hole 115a penetrating through 3115, the light shielding property and
And conductive chrome layer 116bb (conductive
Layer) is conductively connected to the drain 107. And de
Pixel electrode 1 to which a potential is to be applied via the rain 107
06 is formed on the surface side of the upper interlayer insulating film 115.
It is conductively connected to the chrome layer 116bb. Where
The memory layer 116bb has the outer edge 11
6x is a pixel area 101bb and a pixel area adjacent thereto
101ab, 101ba 101cb, 101cb (second
Pixel region), that is, the data line 102
a, 102b and gate lines 103a, 103b
Are formed just above the area.
Data lines 102a and 102b and gate lines 103a,
Insulated from 103b by interlayer insulating film 113115
It is in the state that was done. In addition, like the chrome layer 116bb
A conductive opaque layer is a chrome layer 11 in any pixel area.
6ab, 116ba ...
The shifted chrome layer is also insulated from the chrome layer in the adjacent pixel area
In a separated state. For example, the chrome layer 116bb
Are the pixel regions 101ab, 101ba, 101bc, 1
01cb insulated from each pixel electrode 106
You. For this reason, the same pixel region
The potential is applied only through the 101bb pixel electrode 106.
In a state of being Then, the front side of the data line 102a
Are the interlayer insulating film 115 and the chromium layers 116bb, 11
Covered by the end of 6ba and applied to data line 102a
The applied potential may affect the liquid crystal on the surface side
Not to be. In the liquid crystal display device having such a configuration,
Also, as in the liquid crystal display device according to the first embodiment, the transparent substrate 1
09, in addition to the matrix array, each pixel area
The black matrix 116 corresponds to the boundary area of the region.
The width of the black matrix 116 is required.
Since the width can be set to the minimum required, the LCD
High aperture ratio. The chrome layer 116bb is the same
It is conductively connected only to the pixel electrode 106 in the pixel region 101bb.
Irrespective of the operation state of the liquid crystal display device,
The same potential as the potential of the pixel electrode 106 is applied to the ROM layer 116bb.
Is applied, and the potential of the chrome layer 116bb is
Of the liquid crystal existing between the pixel electrode 106 and the common electrode.
It does not disturb the alignment state. Also, any chrome layer
Since each pixel area is electrically independent, one pixel area
In the region 101bb, the chromium layer and the data line are short.
The effect is limited to display point defects
Therefore, the reliability of the liquid crystal display device remains high. (Embodiment 3) FIG. 5 shows Embodiment 3 of the present invention.
Plane showing a part of a matrix array of such a liquid crystal display device
FIG. 6 is a sectional view taken along line III-III.
You. Here, each part of the liquid crystal display device according to the first embodiment was
The parts having the corresponding functions are denoted by the same reference numerals.
A detailed description of these will be omitted. In the liquid crystal display device according to this embodiment,
Also, for example, the pixel region 101bb (first pixel region)
In the same manner as in Example 1, the surface of the transparent substrate 109
The data line 102a is connected to the TFT 108 formed on the side.
Through the connection hole 113a of the lower interlayer insulating film 113.
While the pixel electrode 106 is conductively connected to the source 104.
Conducted to the drain 107 via the upper interlayer insulating film 113b
Electrical connection is established. The pixel electrode 106 has an upper layer side.
Chromium layer 116 formed on the surface side of interlayer insulating film 115
bb is conductively connected via the connection hole 115a. In this example, the chrome layer 116bb is
Of the data line 102a and the gate line 1
03a, the adjacent pixel areas 101ba, 101b
It extends to the inside of cb. On the other hand, the pixel region 10
Boundary between pixel regions 101bc and 101ab in 1bb
The chromium layer 116bb is formed on the boundary region side.
The chrome layer 116bb is L-shaped on the adjacent border area
Is presented. Then, the image in the pixel region 101bb is
The pixel region 101 is located on the boundary region side with the element region 101bc.
The end of the chrome layer 116bc formed on the bc is a data line.
102b, to the inside of the pixel area 101bb.
It is stretched. Also, the pixels in the pixel region 101bb
The pixel region 101a is located on the boundary region side with the region 101ab.
The end of the chrome layer 116ab formed on the gate line 1b
Extend beyond 03b to inside pixel area 101bb
Have been. As a result, the pixel area 101bb itself
The chrome layer 116bb formed corresponding to the body
Formed corresponding to the pixel regions 101bc and 101ab
Formed by the chrome layers 116bc and 116ab
It is in the state that was done. In this embodiment, these chromium layers 116
bb, 116bc, 116ab,...
1bb ...
Chrome layers 116bb...
Used as 16. For this reason, in the liquid crystal display device of this embodiment,
As in Example 1, the aperture ratio of the liquid crystal display device was increased.
And the black matrix 116
The liquid crystal is not in the floating state,
Don't do it. Further, the black matrix 116
Chrome layers 116bb, 116b electrically independent for each region
c, 116ab ...
One of the layers 116bb, 116bc, 116ab...
The effect of the short circuit in the pixel area is limited to a point defect in display. Further, in the present embodiment, the first embodiment and
Unlike the liquid crystal display device of the second embodiment, the chrome layer 116b
The ends of b, 116bc, 116ab...
.. And the gate lines 103a,
103b... Are arranged close to each other over a wide area
Not in. Therefore, the black matrix 116 is formed.
Chrome layer 11 with normal accuracy
6bb, 116bc, 116ab...
They do not short circuit each other. Further, pixel area 1
06 is formed on the surface of the interlayer insulating film 113 and has a chromium layer.
116bb, 116bc, 116ab ... are interlayer insulation
It is formed on the surface of the film 115. That is, the pixel area
Region 106 and a chrome layer 116bb in an adjacent pixel region,
Are formed on different layers.
Are short-circuited even if they are placed close to each other.
There is no problem. Therefore, each pixel area is electrically independent.
Chrome layer 116bb, 116bc, 116ab ...
Easy formation of the black matrix 116
Can be. In the third embodiment, adjacent pixels
Of the boundary area with the adjacent area
Chromium layers 116bb, 116bc as an electric light shielding layer,
116ab ..., this chrome layer and the other two
The chrome layer of the adjacent pixel area on one border area side
Pixel area is divided from each adjacent pixel area
FIG. 7 shows a modification of the third embodiment.
As described above, the black matrix 116 is
To the two opposing boundary areas
Chromium layers 118ab, 118bc as an electric light shielding layer,
.. 119ab, 119bc... For each adjacent pixel region.
It may be formed by changing the direction to which it belongs. this
In the case, each chrome layer 118ab, 118bc, 119
ab, 119bc... are indicated by “→” in the figure, respectively.
Pixel areas 101aa, 101ab, 101ac
.. Are electrically connected to the pixel electrodes. Here, each element constituting the liquid crystal display device is
The shape, structure, material, etc. of the liquid crystal display
Should be set to predetermined conditions depending on the size, application, etc.
It is of a nature and without limitation. In any of the embodiments, the black
Using a chrome layer for the conductive light-shielding layer that composes the matrix
However, there is no limitation on the material,
Material, such as titanium or aluminum
Metal layer, silicon layer, molybdenum silicide or tungsten
Use of silicide compounds such as silicide
Can also be. (Embodiment 4) FIG. 8 shows Embodiment 4 of the present invention.
Of the active matrix substrate used in such a liquid crystal display device
FIG. 9 is a schematic plan view showing a part thereof, and FIG.
FIG. In the liquid crystal display device of this embodiment, Embodiment 1
In the same manner as the liquid crystal display device according to
2a, 202b (signal line) and horizontal gate
.. (Scan lines) are arranged in a grid pattern.
And each pixel area 201aa, 201a
b, 201ac... are defined, and
Taking the element region 201bb (first pixel region) as an example,
The structure of will be described. Here, the counter substrate 230 shown in FIG.
Color filter to enable color display
232, common electrode 233 and counter substrate side alignment film 234
Are formed. The counter substrate 230 has a pair
A substrate-side black matrix 231 is formed.
However, in the liquid crystal display device of this example, as described later,
Black matrix on the active matrix substrate side
Are formed, and the opposite substrate-side black matrix 23 is formed.
1 is a black matrix on the side of the active matrix substrate.
It is provided for the purpose of complementing the market. As shown in FIG. 8, the pixel region 201bb
(First pixel region) includes pixel regions 201ab and 201b.
a, 201cb, 201bc (second pixel area) are adjacent
In the pixel region 201bb, the data line 2
02a is conductively connected to the source 204 and the gate line 203b
Gate electrode 205 and pixel electrode 206 which are conductively connected
Are conductively connected to each other to form a TFT 208
Is configured. Here, the pixel electrode 206 is electrically conductive.
Transparent electrode made of ITO and light-transmitting material
And is formed over substantially the entire surface of the pixel region 201bb
And its ends are connected to the data lines 202a, 202b and
And the gate lines 203a, 203b
Has been extended. Then, any pixel electrode 206 is in front of it.
It has a large overlapping area on the side of the step gate line 203a.
You. The sectional structure of the TFT 208 is shown in FIG.
As described above, the transparent substrate 209 supporting the entire liquid crystal display device
A polycrystalline silicon layer 210 is formed on the surface side of
The polycrystalline silicon layer 210 includes an intrinsic polycrystalline silicon.
N-type impurities except for the channel region 211 which is a
Source 204 and dray
207 is formed. The front side of this TFT 208
The lower interlayer insulating film 213 made of a silicon oxide film
Are piled up, and the first connection hole 213a is opened.
Through the first connection hole 213a.
Data line 202a made of an aluminum layer is electrically connected to the source 204.
Connected. Further, in the liquid crystal display device of this embodiment,
An upper interlayer insulating film is formed on the surface of the lower interlayer insulating film 213.
215 are formed, and the upper interlayer insulating film 215 is formed.
And a second connection hole 215 in the lower interlayer insulating film 213.
a is open. Then, the second connection hole 215a is
The pixel electrode 206 is conductively connected to the drain 207 through
I have. Here, the pixel electrode 206 is provided in the pixel region 201bb.
And pixel regions 201ab, 201ba,
01bc, 201cb, at the outer end thereof
The edge 206x is connected to the data lines 202a and 202b and the gate.
It is formed so as to be located directly above the lines 203a and 203b.
ing. In the liquid crystal display device of this embodiment, the upper
The pixel electrode 206 on the surface side of the layer-side interlayer insulating film 215
Molybdenum with light-shielding and conductive properties
The silicide layer 216bb (conductive light-shielding layer) is formed
The molybdenum silicide layer 216bb is
Region 201bb and its adjacent pixel region 201a
b, 201ba, 201cb, border area with 201bc
, The outer edges 216x of the data lines 202a,
02b and immediately above the gate lines 203a and 203b
And the outer edge of the pixel electrode 206
Coincides with edge 206x. Where molybdenum silisa
The conductive light-shielding layer such as the guide layer 216bb
The pixel region is formed in the same manner, but the adjacent pixel region
201ab, 201ba, 201cb, 201bc
Misaligned molybdenum silicide layers 216ab, 216b
a, 216 cb, 216 bc
The ribden silicide layer 216bb is connected to the data line 202.
a, 202b and immediately above the gate lines 203a, 203b
It is in a state of insulation separation at the position. Therefore, molybdenum
The silicide layer 216bb is formed in the same pixel region 201bb.
Even when a potential is applied from the pixel electrode 206,
In a state where no electric potential is applied from the pixel electrodes in other pixel areas
is there. In addition, substantially the entire front side of the data line 202a is a layer
Inter-layer insulating film 215, molybdenum silicide layer 216bb,
216 ba and the end of the pixel electrode 206
The potential applied to the data line 202a
Has no effect on the liquid crystal on the surface side
It has become. With such a configuration, the transparent substrate 209
The active matrix formed on the surface side of the
The electrode 206 and the molybdenum silicide layer 216bb
With the alignment side 220 formed on the front side,
Liquid crystal is filled in between 30 and 30 by utilizing the orientation of liquid crystal.
Can be displayed. In the liquid crystal display device having such a configuration,
Are the molybdenum silicide layers 216bb, 216a
b, 216ba...
Data lines and gate lines
If so, a black matrix is placed on the side of the counter substrate 230.
Not required, or if data lines or gate lines
If it does not have a light shielding property, the counter substrate side bra shown in FIG.
Just form complementary like the matrix 231
Alignment when facing two transparent substrates
Considering accuracy, black matrix 216 or facing
Unnecessarily widening the width of the substrate-side black matrix 231
Need not be. Here, each molybdenum silicide layer 21
6bb, 216ab... Correspond to the pixel regions 201bb, 20
1ab ‥, which is formed on the front side of the transparent substrate 209
The accuracy of the positional relationship is high because
2a, 202b... And gate lines 203a, 203
It can be set to the minimum width according to the width such as b
Thus, the aperture ratio of the liquid crystal display device can be increased. Ma
In addition, the potential of the molybdenum silicide layer 216bb is always
The same potential as that of the pixel electrode 206 is being applied.
Therefore, the potential of the molybdenum silicide layer 216bb is
High display quality can be obtained because the orientation state is not disturbed.
You. In addition, the pixel electrode 206 and the black mask
If any of Trix 216 acts as an electrode,
The outer peripheral area of the element electrode 206 and the black matrix 216
These voltages can be matched with the outer
The alignment of the liquid crystal is disturbed by the potential wrap around
Area (reverse tilt domain area)
It can be reliably covered with Trix 216. In addition,
The rack matrix 216 is electrically independent for each pixel area
Of the molybdenum silicide layers 216bb.
Therefore, for example, the pixel region 201
bb, the molybdenum silicide layer 216bb and the
Even if the data line 202a is short-circuited,
Since only the point defect of 201bb is detected,
High reliability. Further, as the definition of the liquid crystal display device becomes higher,
Since the pixel region 201bb is miniaturized,
The display capacitance in the region 201bb decreases,
Configure high TFT 208 to reduce leakage current
Also, the display voltage decreases during the non-selection period of the gate line 203b.
However, the display holding characteristics tend to be low. Only
However, in the liquid crystal display device of the present example, the pixel electrode 2
06 is located above the previous gate line 203a,
A charge storage capacitor is formed between them. For this reason,
During the selection period of the pixel region 201bb, the previous gate line 2
03a is a non-selection period, and a reference potential is applied to the gate line 203a.
Is applied to the charge storage capacitor,
Is stored in the pixel region 201bb to hold the liquid crystal applied voltage.
It can also improve the performance. Next, the region shown in FIGS.
Of the liquid crystal display device of this example with reference to the left area of
A part of the fabrication method will be described. FIGS. 10A to 10C show the book
FIG. 7 is a process cross-sectional view showing a part of the method for manufacturing the example liquid crystal display device.
is there. Here, as shown in FIG.
In the process until the TFT 208 is formed on the substrate 209
For this, well-known methods can be adopted.
Is omitted, but after forming the TFT 208, first,
A layer-side interlayer insulating film 213 is formed. Next, the first connection
A hole 213a is formed, and a
Data line 202a, and connect the data line 202a to a TFT.
A conductive connection is made to the source 204 at 208. Next, the lower side
An upper interlayer insulating film 215 is formed on the surface of the interlayer insulating film 213.
After the formation, a second contact is made to this upper interlayer insulating film 215.
A connection hole 215a is formed. Next, a molybdenum silicide layer is deposited.
After that, as shown in FIG.
Then, a molybdenum silicide layer 216a is formed.
In this state, the molybdenum silicide layer 216a
Corresponds to the pattern constituting the black matrix 216.
It is not in the state patterned by. Next, the molybdenum silicide layer 216a
After the ITO layer 206a is formed on the surface side of
The TO layer 206a is patterned, as shown in FIG.
As described above, the pixel electrode 206 is formed. Then the pixel
The mask used for patterning the electrode 206 is
The pixel electrode 206 itself can be used as a mask
To pattern the molybdenum silicide layer 216a
The molybdenum that should constitute the black matrix 216
A silicide layer 216bb is formed. Thus, the pixel
The electrode 206 and the molybdenum silicide layer 216bb
In the patterning process for the lower layer,
The outer edge of the upper layer or the putter of the upper layer
Patterning using the mask used for
U. As a result, the outer edge 206 of the pixel electrode 206
x and the outer edge 216x of the molybdenum silicide layer 216bb
And all of them are located immediately above the data line 202a.
Structure. In addition, about the following process, a well-known process
Since the process can be adopted, the description is omitted. As described above, the liquid crystal display device according to this embodiment
According to the manufacturing method, the pixel electrode 206 is formed by patterning.
When molybdenum silicide layer is
216a and the lower side is protected. For this reason,
A chlorine-based etchant is used to pattern the ITO layer 206a.
When chanting is used, the upper interlayer insulating film 215
Even if there are pits, etc.
A data line 202a composed of a certain aluminum layer is damaged.
Never be. Therefore, the data line 202a is disconnected.
Does not occur, improving the reliability of the liquid crystal display device.
You. Note that the region shown in FIGS.
Of these, the process cross-sectional view shown in the right area
This is a modified example. That is, as shown in FIG.
In the inside of the second connection hole 215a, molybdenum silicide
The layer 216a is left. Therefore, FIG.
As shown in (c), after forming the pixel electrode 206,
The pixel electrode 206 made of an ITO layer is molybdenum
Drain made of silicon through silicide layer 216bb
Since the conductive connection is made to the
When the pole 206 and the drain region 107 are directly connected,
Compared to the case, the contact resistance there can also be reduced,
The display quality can be improved. It should be noted that the left region and the left region in FIGS.
And formed by the manufacturing method shown on either side of the right area
In the active matrix substrate as well, the pixel region 206 is black.
The structure on the upper layer side of the matrix 216
The pixel region 206 and the black matrix 216
It is also possible to adopt a structure in which the upper limit relation is reversed. (Embodiment 5) FIG. 11 shows Embodiment 5 of the present invention.
Matrix substrate used in a liquid crystal display device according to the present invention
FIG. 12 is a schematic plan view showing a part of
FIG. Here, the embodiment shown in FIGS.
It has a function corresponding to each part of the liquid crystal display device according to Example 4.
The same reference numerals are used for the parts that
Is omitted. In the liquid crystal display device of this embodiment, the pixel region
201bb (first pixel area) includes a pixel area 201a
b, 201ba, 201cb, 201bc (the second pixel
Areas) are adjacent. Here, the pixel region 201bb
Are the source 204, the gate electrode 205 and the drain 2
07 constitutes a TFT 208.
On the front side of the FT 208, a lower layer made of a silicon oxide film
A side interlayer insulating film 213 is deposited. This lower layer
The insulating film 213 has a first connection hole 213a and a second contact hole 213a.
The connection hole 213b is opened, and the first connection hole 21
3a, a data line 202 made of an aluminum layer
a is conductively connected to the source 204, and the second connection hole 213b
The pixel electrode 206 made of an ITO layer is drained through
207 is conductively connected. Here, the pixel electrode 206 is connected to the pixel region 20.
1bb and the pixel regions 201ab and 201 adjacent thereto.
ba, 201bc, and 201cb.
And its outer edge 206x is connected to the data line 202.
a, 202b and gate lines 203a, 203b
Inside from position. Also, in the liquid crystal display device of this example,
However, the light shielding property and the conductivity are provided on the surface side of the pixel electrode 206.
Molybdenum silicide layer 216bb (conductive shade)
Layer), and the molybdenum silicide layer 216bb
Also, the pixel region 201bb and the pixel region 2 adjacent thereto
01ab, 201ba, 201bc, 201cb
Formed near the boundary region, and its outer edge 216x
Are the data lines 202a and 202b and the gate line 203
a, 203b, the pixel electrode 2
06 and the outer edge 206x. Where molybd
Regarding the width of the densilicide layer 216bb, the pixel region
201bb on the side where the alignment of the liquid crystal is likely to be disordered
It is possible to increase the width and narrow the width on the side where disturbance is less likely to occur.
preferable. Therefore, in the liquid crystal display device of this example, the data
Of the data line 202a on the side of the data line 202a.
The reverse tilt domain region where the alignment of the liquid crystal is disturbed.
The molybdenum silicide layer 216bb
The width W1 on the side of the data line 202a is
Set to be thicker than the width W2 on the side
Even if a tilt occurs, the reverse tilt domain
To maintain high display quality by covering the area.
On the other hand, the reduction of the aperture ratio is minimized. In the liquid crystal display device having such a configuration,
, Each molybdenum silicide layer 216bb.
Of the transparent substrate 209 for use as a
Opposed to the side of the active matrix substrate configured on the side
When facing the substrate 230 side, the molybdenum silicon
The side layer 216bb is the counter substrate side black matrix 2
31 is the margin for the alignment,
Accuracy does not matter. Also, molybdenum silicide
The potential of the layer 216bb is the same as that of the pixel electrode 206.
In the applied state, it is not possible to disturb the alignment state of the liquid crystal.
Since there is no display quality, high display quality can be obtained. Also, black
Trix 216 is a mode that is electrically independent for each pixel.
Are constituted by the riben silicide layers 216bb.
In the pixel region 201bb, the molybdenum
Silicide layer 216bb and data line 202a are short-circuited
State, the display of only this pixel region 201bb is displayed.
Since only a point defect occurs, the reliability of the liquid crystal display device is high. Next, the regions shown in FIGS.
Of the liquid crystal display device of this example with reference to the left area of
Part of the manufacturing method will be evident. FIGS. 13A to 13D show the book
FIG. 7 is a process cross-sectional view showing a part of the method for manufacturing the example liquid crystal display device.
is there. Here, as shown in FIG.
In the process until the TFT 208 is formed on the substrate 209
For this, well-known methods can be adopted.
Is omitted, but after forming the TFT 208, first,
After depositing the lower interlayer insulation film 213, the lower interlayer insulation
A first connection hole 213a and a second connection hole in the edge film 213;
213b is formed. Next, the pixel electrode 206 is formed.
An ITO layer 206a to be formed is formed by sputtering. Next, as shown in FIG.
After depositing the butane silicide layer 216a, the molybdenum
Only the silicide layer 216a is patterned. this
In the state, the molybdenum silicide layer 216a still has
The pattern that constitutes the black matrix 216 is
In the unturned state, the ITO layer 20
6a is also a pattern that forms the pixel electrode 206.
It is in the state that has not been performed. Next, as shown in FIG.
Prior to patterning the O layer 206a, the molybdenum
The edge of the silicide layer 216a is patterned to
Molybdenum silicide layer 2 constituting rack matrix
After forming 16bb, the same mask is used as it is
Patterning the ITO layer 206a by
To form Here, the eye to ensure high etching accuracy
The molybdenum silicide layer 216a is CF
₄While performing plasma etching with gas, ITO
For the layer 206a, the molybdenum silicide layer 216
a, followed by CH etching₄Moth
And H₂Dry etch using mixed gas with gas
Application. As a result, the pixel electrode 206 and the molybdenum
Outer edges 206x and 216x of the silicide layer 216bb are:
In each case, the pixel area 201bb and the adjacent pixels
Areas 201ab, 201ba, 201bc, 201cb
A structure is obtained in the vicinity of the boundary region with. What
Contact, CF₄Plasma etching with gas is molybdenum
Molybdenum silicide instead of the silicide layer 216a.
The same applies to the case of using a tungsten layer or a tungsten silicide layer.
Lick Next, the data lines 202a and 202b are
After forming the aluminum layer to be formed, FIG.
As shown in FIG.
a is formed. For the subsequent steps, well-known steps are employed.
Since they can be performed, their description is omitted. As described above, the liquid crystal display device according to this embodiment
According to the manufacturing method, the pixel electrode 206 and the black
If any of the liquids 216 act as electrodes,
Perimeter range of pole 206 and circumference of black matrix 216
Since these ranges can be matched, these electrodes
The black matrix removes the disorder of the orientation that these potentials have on the liquid crystal.
216 can be reliably covered. The regions shown in FIGS.
The process cross-sectional view shown on the right side of the drawing shows the manufacturing method described above.
This is a modified example. That is, as shown in FIG.
Region a-1 after forming the layer-side interlayer insulating film 213 and
In the region a-2, the surface side of the lower interlayer insulating film 213
After the formation of the ITO layer 206a in the first
3a and a second pier hole 213b are formed. Next, as shown in FIG.
A butene silicide layer 216a is formed. As a result, T
Memory is applied to the source 204 and the drain 207 of the FT 208.
The state in which the butene silicide layer 216a is conductively connected is established.
You. Next, as shown in FIG.
By patterning the Budensilicide layer 216a,
Molybdenum silicide constituting the matrix 216
A layer 216bb is formed, and regions c-1 and c-2 are formed.
At the inside of the first connection holes 213a and 213b.
The molybdenum silicide layers 216b and 216c are left. So
After that, the end of the molybdenum silicide layer 216bb is
Patterning the ITO layer 206a
To form a pixel electrode 206. As a result, the pixel electrode 20
6 and outer edge 20 of molybdenum silicide layer 16bb
Each of 6x and 216x has a pixel area 201bb and the pixel area 201bb.
Pixel regions 201ab, 201ba, 201 adjacent to
bc and 201cb are coincident in the vicinity of the boundary area.
Structure. Thereafter, as shown in FIG.
Surface side of molybdenum silicide layer 216b in region d-1
A data line 202a is formed on the
To the source 204 via the buden silicide layer 216bb
Conductive connection is adopted. For the subsequent steps, well-known steps are employed.
Since they can be performed, their description is omitted. According to such a manufacturing method, aluminum
The data line 202a, which is a memory layer, is made of a silicon source.
204 via a molybdenum silicide layer 206b.
Connection, so the eutectic reaction with aluminum
Thin silicon to prevent recombination
Since the TFT 208 can be formed from a thin film, its ON / OFF
The ratio can be improved. The area d-2 in FIG.
In this case, the pixel electrode 206 made of an ITO layer and silicon
Formed of molybdenum silicide layer 2
06a, the pixel electrode 206 is electrically connected.
And the drain 207 are directly connected to each other.
Can reduce the contact resistance and improve display quality.
You can also. Note that the left region and the left region in FIGS.
And in the manufacturing method shown on either side of the right region,
The pixel region 206 is located below the black matrix 216.
The case has been described, but the present invention is not limited to this.
It is also possible to (Embodiment 6) FIG. 14 shows Embodiment 4 of the present invention.
Matrix substrate used in a liquid crystal display device according to the present invention
15 is a schematic plan view showing a part of FIG.
FIG. The liquid crystal display of this embodiment has a basic structure.
Is the same as the liquid crystal display device according to the fourth embodiment,
Between the active matrix substrate side and the counter substrate side
Since only the type of liquid crystal used differs,
Reference numerals are used, and detailed description thereof is omitted. In these figures, the liquid crystal display device of this example is shown.
Also, as in the liquid crystal display device according to the fourth embodiment, the pixel region 2
01bb has a light shielding property on the surface side of the pixel electrode 206.
Molybdenum silicide layer 216bb having conductivity (conductive
The molybdenum silicide layer 21
6bb is a pixel area 201bb and its adjacent pixels
Areas 201ab, 201ba, 201bc, 201cb
And the outer edge 216x is the data
Lines 202a, 202b and gate lines 203a, 203
b, the outer edge 206x of the pixel electrode 206 and
Match. An active matrix substrate having such a configuration
The counter substrate 230 is arranged so as to face the plate.
The liquid crystal 241 is filled between these substrates. This
Here, in the liquid crystal display device of this example, the polymer dispersion type
Active matrix substrate because liquid crystal is filled
And an alignment film is formed on the surface side of the counter substrate 230.
Not in. For other configurations, the liquid crystal according to the fourth embodiment
It is the same as the display device. In the liquid crystal display device of this embodiment, Embodiment 4
Although the type of liquid crystal is different from the liquid crystal display device according to
Ribden silicide layers 216bb, 216ab, 216
Use ba... as a black matrix 216
Therefore, a black matrix is required on the opposite substrate 230 side
Or not, or as shown in FIG.
Only by forming the side black matrix 231 complementarily
Because it is good, alignment when the transparent substrate of two canes is opposed
Accuracy does not matter. Therefore, the black matrix
216 and the width of the counter substrate side black matrix 231
Since there is no need to provide unnecessary margins on the LCD
Example 4 can increase the aperture ratio of the device.
The same effects as those of the liquid crystal display device can be obtained. (Embodiment 7) FIG. 16 shows Embodiment 7 of the present invention.
Matrix substrate used in a liquid crystal display device according to the present invention
FIG. 17 is a schematic plan view showing a part of FIG.
It is sectional drawing in the I line. In the liquid crystal display device of this embodiment, the vertical direction
(Signal lines) and water lines 302a, 302b.
Gate lines 303a, 303b in the horizontal direction (scanning lines)
Any of the pixel areas defined by
Also in the pixel region 301bb (the first pixel region)
The source 311 to which the data line 302a is conductively connected
a, the gate electrode 30 to which the gate line 303b is conductively connected
5, and the drain 31 to which the pixel electrode 306 is conductively connected
1b constitutes a TFT 308. here
The TFT 308 is functionally similar to the liquid crystal display device of the first embodiment.
This is the same as the TFT etc., except for the liquid crystal display of this example.
Is configured as a so-called inverted staggered TFT
I have. That is, a transparent substrate that supports the entire liquid crystal display device
An insulating film is formed on the surface side of
A gate electrode 305 is formed. Furthermore, those
On the surface side, a gate electrode insulating film 305a, a non-doped
Amorphous silicon layer 310 and n-type impurity introduced
Amorphous silicon layer (source 311a, 31
1b) is formed, and the amorphous silicon layer (saw)
311a, 311b), the source electrode 304a
And a drain electrode 307a. Sou
That is, the interlayer insulating film 31 is formed on the drain electrode 307a.
3, the pixel electrode 306 is conductively connected. Further, in the liquid crystal display device of this embodiment,
On the surface side of the interlayer insulating film 313, the pixel electrode 306
Molybdenum silicator with light shielding and conductivity on the lower layer side
And a molybdenum layer 316bb (conductive light-shielding layer).
The densilicide layer 316bb is formed in the pixel region 301bb.
And pixel regions 301ab, 301ba,
301bc, 301cb
The edge 306x is connected to the data lines 302a, 302b and the
Formed so as to be directly above the gate lines 303a and 303b.
Have been. Here, the molybdenum silicide layer 316b
The conductive light-shielding layer such as b
, But all of them
Insulated from electrode and molybdenum silicide layer
In state. Other configurations are related to the fourth embodiment.
Since it is the same as the liquid crystal display device, the corresponding parts
Numbers are attached and their description is omitted. In the liquid crystal display device having such a configuration,
Shows the structure of the liquid crystal display device according to the fourth embodiment and the structure of the TFT 308.
Although there are structural differences due to structural differences, the indications
Is the same, the liquid crystal display device according to the fourth embodiment
It has the same effect as. For example, each pixel area 301b
molybdenum silicide layer 316bb formed
.. As the black matrix 316
Requires a black matrix on the side of the counter substrate 330
Do not use, or activate the opposite substrate side shown in FIG.
The data lines 302a, 30a
Form only complementary things that block only light passing through 3a
Position when the transparent substrates of the two canes face each other
Considering the alignment accuracy, the black matrix 316 or
Does not require the width of the opposing substrate side active matrix 331
There is no need to be wide. Moreover, each molybdenum silicide
Are the same as the pixel regions 301bb...
It is built on the surface side of one transparent substrate 309
Therefore, the accuracy of the positional relationship is high, and the data lines 302a, 302
b and the width of the gate lines 303a, 303b, etc.
It can be set to the minimum width corresponding to the
The aperture ratio of the device can be increased. Also, molybdenum
The potential of the silicide layer 316bb disturbs the alignment state of the liquid crystal.
As a result, high display quality can be obtained. Moreover, the picture
The outer peripheral area of the elementary electrode 306 and the black matrix 316
These voltages can be matched with the outer
Black matte eliminates the disorder of alignment that the potential from the pole exerts on the liquid crystal.
The effect of being able to securely cover with Rix 316 is achieved.
I do. (Eighth Embodiment) FIG. 18 shows an eighth embodiment of the present invention.
Matrix substrate used in a liquid crystal display device according to the present invention
FIG. 19 is a schematic plan view showing a part of FIG.
It is sectional drawing in the III line. Here, FIG. 8 and FIG.
Corresponding to each part of the liquid crystal display device according to Example 4 shown in FIG.
The same reference numerals are given to portions having the function of performing the operations. FIG. 18 also shows the liquid crystal display of this embodiment.
As shown, the pixel region 201bb (first pixel region)
Is a source 204 to which the data line 202a is conductively connected,
A gate electrode 205 to which the gate line 203b is conductively connected, and
And the drain 207 to which the pixel electrode 206 is conductively connected.
Thus, a TFT 208 is configured. Where the pixel electrode
206 denotes ITO as a conductive and light-transmitting material
A transparent electrode made up of substantially the entire pixel region 201bb.
The data line 20 is formed at the end of the data line 20.
2a, 202b and gate lines 203a, 203b.
It has been extended to the top. And any picture
The element electrode 206 also has a wide overlapping
It has a large area. The sectional structure of the pixel region 201bb is shown in FIG.
As shown in FIG. 19, a transparent substrate supporting the entire liquid crystal display device
Polycrystalline silicon layer 210 formed on the surface side of plate 209
In addition, except for the channel region 211, as an n-type impurity
Of phosphorus is introduced into the source 204 and the drain 20
7 are formed. On the surface side of this TFT 208,
A lower interlayer insulating film 213 made of a silicon oxide film is deposited.
The first connection hole 213a and the second connection hole
The connection hole 213b is opened. The first of them
Data consisting of an aluminum layer through the connection hole 213a
Line 202a is conductively connected to source 204. On the other hand, through the second connection hole 213b,
As with the pixel electrode 206, a conductive and light-transmitting material
The stacked electrode layer 214 made of ITO
207 is conductively connected. Here, the lower interlayer insulating film
The surface of 213 has irregularities corresponding to the shape of TFT 208.
As reflected, the stacked electrode layer 214 is
08 is not formed on the flat region 208a (TFT
208 (on the non-formation area). Obedience
Thus, the stacked electrode layer 21 on this region 208a
The surface of No. 4 is flat. Further, in this liquid crystal display device, the transparency is
An upper layer made of a silicon oxide film on the surface side of the bright substrate 209
A side interlayer insulating film 215 is formed, and an image is
The elementary electrodes 206 are formed. Here, the pixel electrode 20
6 is connected through a connection hole 215a of the upper interlayer insulating film 215.
Conductively connected to the stacked electrode layer 214.
The hole 215a is a flat surface on which the TFT 208 is not formed.
It is formed on the region 208a. For this reason, the pixel electrode
206 is conductively connected to the flat area of the stacked electrode layer 214.
ing. The upper interlayer insulating film 215 is made of polysilicon.
The surface is flattened by using a middle layer etc.
Then, the orientation of the liquid crystal may be further enhanced. In this example, a matrix array is formed.
Transparent substrate 209, a color filter and a common electrode.
Between the other side of the transparent substrate (not shown)
The liquid crystal is sealed to form a liquid crystal display device. Soshi
, And data lines 202a, 202b.
203a, 203b...
As a result, a voltage generated between the common electrode and each pixel electrode 206 is generated.
The orientation of the liquid crystal in each pixel area by controlling the
Information is displayed. Here, the pixel electrode 20
6, the potential is equal to the drain 207 of the TFT 208 and the product.
The voltage is applied through the lift-up electrode layer 215. In the liquid crystal display device of this embodiment, the upper
The pixel electrode 206 on the surface side of the layer-side interlayer insulating film 215
Molybdenum with light-shielding and conductive properties
The silicide layer 216bb (conductive light-shielding layer) is formed
The molybdenum silicide layer 216bb is
Region 201bb and its adjacent pixel region 201a
b, 201ba, 201bc, 201cb
, The outer edges 216x of the data lines 202a,
02b and immediately above the gate lines 203a and 203b
And the outer edge of the pixel electrode 206
Coincides with edge 206x. Where molybdenum silisa
The conductive light-shielding layer such as the guide layer 216bb
The pixel region is formed in the same manner, but the adjacent pixel region
201ab, 201ba, 201cb, 201bc
Misaligned molybdenum silicide layers 216ab, 216b
a, 216bc and 216cb are both
The ribden silicide layer 216bb is connected to the data line 202.
a, 202b and immediately above the gate lines 203a, 203b
It is in a state of insulation separation at the position. The liquid crystal display device of this embodiment having such a configuration is
, Each molybdenum silicide layer 216bb.
As shown in FIG. 12 for use as a black matrix
As shown in FIG.
The side of the trix substrate and the side of the counter substrate 230 face each other.
When the molybdenum silicide layer 216bb is
In the alignment of the black matrix 231 on the plate side,
As a result, positioning accuracy does not matter. Ma
The potential of the molybdenum silicide layer 216bb is
Since the same potential as that of the electrode 206 is applied,
High display quality is obtained because the crystal orientation is not disturbed.
Can be The black matrix 216 is provided for each pixel.
Molybdenum silicide layer 216 in an electrically independent state
bb..., the pixel region 20
1bb, the molybdenum silicide layer 216bb
Even if the data line 202a is short-circuited,
Only the point defect of the display in the area 201bb is displayed.
The reliability of the indicating device is also high. In the liquid crystal display device of this embodiment, the data
The data line 202a is formed on the lower interlayer insulating film 213.
Through the first connection hole 213a.
While conductively connected to the source 204 of the
The electrode 206 is formed on the stacked electrode layer 214 as a pad.
In the stacked state, a shape is formed on the upper interlayer insulating film 215.
Has been established. That is, the data line 202a and the pixel electrode
206 is formed on different layers from each other,
There is no danger of short circuit. Therefore, on the data line 202a
The end portion 206x of the pixel electrode 206 is arranged to the one position
Therefore, the vicinity of the data line 202a is also connected to the display unit.
Available. Therefore, the aperture ratio of the pixel region 201bb
Is high. Further, the pixel electrode 206 is connected to the data line 202.
a, the data line 20
The potential of 2a does not disturb the alignment of the liquid crystal. Therefore, the table
The quality of the indication is improved. Further, the stacked electrode layer 214
Constitutes a matrix array because it has conductivity
The metal layer and the electrode layer
Different from the case of using a stacked electrode made of ITO
Since the layer 214 has optical transparency, the pixel region 206
The stacked electrode layer 214 is expanded so that
Even if the extension is formed, the aperture ratio of the pixel region 201bb is not sacrificed.
Never. In addition, the pixel electrode 206 is
Since it is in a state of being stacked via the polar layer 214,
Connection hole 2 of layer side and upper layer side interlayer insulating films 213 and 215
13b and 215a each have a low aspect ratio.
Inside the connection holes 213b and 215a
Is highly reliable. In this embodiment, the stacked electrode layers 2
14 uses the same ITO as the pixel electrode 206.
Therefore, the connection resistance between the stacked electrode layer 214 and the pixel electrode 206
Low resistance. Therefore, the drain 207 and the pixel electrode 206
The resistance during can maintain a low level. In addition,
Surfaces of raised electrode layer 214 and upper-layer interlayer insulating film 215
The side has irregularities reflecting the shape of the TFT 208.
However, the connection hole 215a of the upper interlayer insulating film 215 is
On the flat region 208a where the FT 208 is not formed
Since it is formed, the stacked electrode layer 214 and the pixel electrode
206 is highly reliable
Low resistance. In addition, such a connection structure has a flat portion.
Raise the bottom, flatten the surface of the pixel electrode 206,
Also has the effect of improving the orientation state of. Further, as the definition of the liquid crystal display device becomes higher,
Since the pixel region 201bb is miniaturized,
The display capacitance in the region 201bb decreases,
Configure high TFT 208 to reduce leakage current
Also, the display voltage decreases during the non-selection period of the gate line 203b.
However, the display holding characteristics tend to be low. Only
However, in the liquid crystal display device of the present example, the pixel electrode 2
06 is located above the previous gate line 203a,
A charge storage capacitor is formed between them. For this reason,
During the selection period of the pixel region 201bb, the previous gate line 2
03a is a non-selection period, and a reference potential is applied to the gate line 203a.
Is applied to the charge storage capacitor,
Is stored in the pixel region 201bb to hold the liquid crystal applied voltage.
It can also improve the performance. Moreover, in this example,
The pixel electrode 206 is wider on the side of the gate electrode 203a in the previous stage.
Because it is formed to have an overlapping area, it has a holding characteristic
Is remarkable. (Embodiment 9) FIG. 20 shows Embodiment 9 of the present invention.
Matrix substrate used in a liquid crystal display device according to the present invention
FIG. 21 is a schematic plan view showing a part of the IX-IX line.
FIG. Here, FIG. 8 and FIG.
Liquid crystal display device according to Example 4 or FIGS. 18 and 1
Corresponding to each part of the liquid crystal display device according to Example 8 shown in FIG.
Parts that have the function of performing
Detailed description thereof will be omitted. In these figures, the pixel region 201bb
Includes a source 204 to which the data line 202a is conductively connected;
A gate electrode 205 to which the gate line 203b is conductively connected;
And the drain 207 to which the pixel electrode 206 is conductively connected.
Thus, the TFT 208 is configured. Here, the pixel power
The pole 206 is made of IT as a conductive and light-transmitting material.
O is a transparent electrode made of O
It is formed over the entire surface, and its end is connected to the data line 2.
02a, 202b and gate lines 203a, 203b.
It has been extended to just above. And any
The pixel electrode 206 also has a wide overlap on the side of the previous gate line 203a.
It has a large area. The sectional structure of the pixel region 201bb is transparent.
Polycrystalline silicon layer 2 formed on the surface side of bright substrate 209
10, except for the channel region 211, the sources 204 and
And a drain 207 are formed. This TFT 208
On the front side, the lower interlayer insulation made of silicon oxide film
A membrane 213 is deposited on the first connection hole 21.
3a and the second connection hole 213b are opened. That
An aluminum layer through the first connection hole 213a.
A data line 202a consisting of
ing. On the other hand, through the second connection hole 213b,
When the stacked electrode layer 214 is conductively connected to the drain 207,
I have. Here, the surface of the lower interlayer insulating film 213 is
Although irregularities are reflected in accordance with the shape of T208,
The lift-up electrode layer 215 has no TFT 208 formed thereon.
Over the flat region 208a (the region where the TFT 208 is not formed)
It is expanded to (up). Therefore, this region 20
8a, the surface of the stacked electrode layer 214 becomes flat.
ing. In addition, silicon is provided on the front side of the transparent substrate 209.
An upper interlayer insulating film 215 made of an oxide film is formed.
The pixel electrode 206 is formed on the surface side. This
Pixel electrode 206 is formed in a connection hole of upper interlayer insulating film 215.
Conductive connection to the stacked electrode layer 214 via 215a
The connection hole 215a has a TFT 208 formed therein.
It is formed on a flat region 208a that is not located. this
Therefore, the pixel electrode 206 has a flat area of the stacked electrode layer 214.
Area is conductively connected. In the liquid crystal display device of this embodiment, the data lines
202a is a lower first layer made of an aluminum layer.
Data line 202a₁And a molybdenum silicide layer
The formed second data line 202a on the upper layer side₂And composed of
Redundant wiring structure. Meanwhile, the stacked electrode layers
214 is also a lower first side made of an aluminum layer.
Stacked electrode layer 214a and molybdenum silicide layer
With the configured second stacked electrode layer 214b on the upper layer side,
It is configured. Moreover, the source layer 202a and the stack
The electrode layer 214 is located on the same layer as the first data line 20.
2a₁And the first stacked electrode layer 214a are formed simultaneously.
The second data line 202a₂And the second
The stacked electrode layer 214b is formed at the same time.
You. Note that the second data line 202a₂And the second stack
The material for forming the raised electrode layer 214b is a pixel electrode.
Dissolves in etchant when patterning pole 206
Materials other than molybdenum silicide
Tan silicide, tungsten silicide, tantalum
Reside, titanium, tungsten, tantalum, titanium
Iride and the like can be used. In the liquid crystal display device of this embodiment,
The pixel electrode 206 on the surface side of the layer-side interlayer insulating film 215
Molybdenum with light-shielding and conductive properties
The silicide layer 216bb (conductive light-shielding layer) is formed
The molybdenum silicide layer 216bb is
Region 201bb and its adjacent pixel region 201a
b, 201ba, 201bc, 201cb
, The outer edges 216x of the data lines 202a,
02b and immediately above the gate lines 203a and 203b
And the outer edge of the pixel electrode 206
Coincides with edge 206x. Where molybdenum silisa
The conductive light-shielding layer such as the guide layer 216bb
The pixel region is formed in the same manner, but the adjacent pixel region
201ab, 201ba, 201cb, 201bc
Misaligned molybdenum silicide layers 216ab, 216b
a, 216 cb, 216 bc
The ribden silicide layer 216bb is connected to the data line 202.
a, 202b and immediately above the gate lines 203a, 203b
It is in a state of insulation separation at the position. The liquid crystal display device of this embodiment having such a configuration is provided with:
, Each molybdenum silicide layer 216bb.
The transparent substrate 20 for use as a black matrix
9 side of the active matrix substrate,
When facing the opposite substrate side, the alignment accuracy is
It doesn't matter. The molybdenum silicide layer 216
As the potential bb, the same potential as that of the pixel electrode 206 was applied.
State, so that it does not disturb the alignment state of the liquid crystal.
Thus, high display quality can be obtained. Also, Black Matrix
216 is a molybdenum state that is electrically independent for each pixel.
Are constituted by silicide layers 216bb.
Therefore, in the pixel region 201bb, the molybdenum silicon
The side layer 216bb and the data line 202a are short-circuited.
Even if there is a point defect in the display of only this pixel area 201bb
Therefore, the reliability of the liquid crystal display device is high. In the liquid crystal display device of this embodiment, the data
Since the data line 202a has a redundant wiring structure,
High reliability. In addition, the stacked electrode layer 214
First stacked electrode layer 214a composed of a minium layer
Second stack composed of and a molybdenum silicide layer
A pixel composed of an ITO layer and an electrode layer 214b
The electrode 206 is composed of a molybdenum silicide layer
2 with an aluminum layer via the stacked electrode layer 214b
A conductive connection is made to the first stacked electrode layer 214a thus formed.
Therefore, the molybdenum silicide layer is
Since it functions as a contact layer with the aluminum layer,
The contact resistance here is reduced. Moreover, molybdenum silisa
To form the second stacked electrode layer 214b on the upper layer side.
Therefore, when the pixel electrode 206 is formed by etching,
The accumulated electrode layer 214 is not attacked by the etchant.
No. Further, the data line 202a and the pixel electrode 20
6 is formed on layers different from each other,
There is no danger of doing. Therefore, the upward direction of the data line 202a
The end portion 206x of the pixel electrode 206
The aperture ratio can be as high as possible. Ma
The pixel electrode 206 is a seal for the data line 202a.
The data line 202a has a liquid crystal effect.
Orientation is not disturbed. Therefore, the display quality is improved.
You. The pixel electrode 206 is a stacked electrode layer
Since it is in a state of being stacked through 214, the lower layer side
And connection holes 213 of upper interlayer insulating films 213 and 215
b, 215a all have a low aspect ratio structure
The connection holes 213b and 215a.
The reliability of the conductive connection portion is high. Moreover, the stacked electrodes
The surface side of the layer 214 and the upper interlayer insulating film 215
Although the shape of the FT 208 is reflected and has irregularities,
The connection hole 215a of the layer-side interlayer insulating film 215 is
8 is formed on the flat region 208a where the
Therefore, the stacked electrode layer 214 and the pixel electrode 206
High contact reliability and low contact resistance
No. In addition, such a connection structure raises the flat part
Then, the surface of the pixel electrode 206 is flattened,
It also has the effect of improving health. Further, in the liquid crystal display device of this embodiment,
The end of the pixel electrode 206 is located above the gate line 203a in the preceding stage.
And the pixel electrode 206 is connected to the gate electrode of the previous stage.
Formed so as to have a wide overlapping area on the side of 203a
Therefore, the effect of improving the holding characteristics is remarkable. (Embodiment 10) FIG. 22 shows an embodiment of the present invention.
Active matrix used in the liquid crystal display device according to No. 10
FIG. 23 is a schematic plan view showing a part of the substrate,
FIG. Here, as shown in FIG. 1 and FIG.
A unit having a function corresponding to that of the liquid crystal display device according to the first embodiment
Minutes have the same reference numerals and their detailed descriptions are omitted.
Abbreviate. In the liquid crystal display device of this embodiment, the vertical direction
Data lines 102a, 102b (signal lines) and water
Gate lines 103a, 103b in the horizontal direction (scanning lines)
Are arranged in a lattice pattern, and each pixel region 101 is disposed between them.
aa, 101ab, 101ac, 101ba, 101b
are formed to form a matrix array.
Have been. Among them, in the pixel region 101bb,
Source 104, gate to which data line 102a is conductively connected
A gate electrode 105 to which the line 103b is conductively connected;
By the drain 107 to which the elementary electrode 106 is conductively connected,
A TFT 108 is configured. Here, the pixel electrode 10
6 is from ITO as a conductive and light transmissive material
Transparent electrode, and covers substantially the entire surface of the pixel region 101bb.
It is formed throughout. Here, the surface of the TFT 108
On the side, a lower interlayer insulating film 11 made of a silicon oxide film
3 are piled up in the first connection hole 113a.
The second connection hole 113b is opened. Of them
An aluminum layer is formed via the first connection hole 113a.
Data line 102a is conductively connected to source 104.
On the other hand, through the second connection hole 113b, the pixel electrode 10
6 is conductively connected to the drain 107. More transparent
An upper layer made of a silicon oxide film on the surface side of the substrate 109
An interlayer insulating film 115 is formed, and a
A butene silicide layer 116bb is formed. here
The molybdenum silicide layer 116bb is
The pixel electrode 106 via the connection hole 115a of the insulating film 115
And the connection hole 115a is connected to the TFT
08 as a flat region 108a where no
What is the formation position of the TFT 108 in the element region 102bb
It is formed at a diagonal position. For this reason, molybdenum
The reside layer 116bb is formed in a flat region of the pixel electrode 106.
Conductive connection. Further, in the liquid crystal display device of this embodiment,
The gate electrode 105 is formed of 1 × 10²⁰
/ Cm³The following phosphorus diffused thickness is 1500 Å
The lower gate electrode layer 105a having a thickness of
Molybdenum silicide up to 2000 Å
A two-layer structure with the upper gate electrode layer 105 b
It is made. Such a two-layer gate electrode is
First, a polycrystalline silicon film is
After being formed to a thickness, put it in an oxygen and nitrogen atmosphere
Diffusion with phosphorus oxychloride at 850 ° C
After the lower gate electrode layer 105a is formed by
0 Å molybdenum silicide layer
Formed on the upper gate electrode layer 105b
To CF₄−O₂Dry-etched using a system gas
Things. Here, the upper gate electrode 105b is formed.
MoSix represents the composition formula of molybdenum silicide
, Set the value of X to 2.0-3.5.
It is preferable that the value be larger than this range.
Has a large resistance value, and is close to 2.5.
It is suitable for preventing the occurrence of a lock. In addition, molybdenum
Tungsten silicide or titanium instead of silicide
Can also be used. The liquid crystal display device of this embodiment having such a configuration has the following features.
, Each molybdenum silicide layer 116bb.
To use as a black matrix 116, a transparent group
Of the active matrix substrate configured on the side of the plate 109
When molybdenum is used to make the
The silicide layer 116bb is a black matrix on the opposite substrate side.
Is a margin in the alignment of
Accuracy does not matter. Also, a molybdenum silicide layer
The same potential as that of the pixel electrode 106 is applied to the potential of 116bb.
The alignment state of the liquid crystal is not disturbed.
Therefore, high display quality can be obtained. Also, black mat
Rix 116 is in an electrically independent state for each pixel
Therefore, in the pixel region 101bb, molybdenum silicon
The id layer 116bb and the data line 102a are short-circuited.
However, it stops at the point defect of the display. In the liquid crystal display of this embodiment, the
The gate electrode 105 diffuses phosphorus into the polycrystalline silicon layer
Lower gate electrode with a thickness of 1500 Å or less
Extreme layer 105a and thickness less than 2000 angstrom
Upper side gate electrode composed of molybdenum silicide layer
While adopting the polycide structure with the pole layer 105b,
By optimizing the film thickness and impurity introduction amount,
Is prevented from occurring, so that the gate electrode 105 and the gate
The resistance of the gate lines 103a and 103b is reduced.
The lower interlayer insulating film 113 and the upper interlayer insulating film
The occurrence of cracks or the like in 115 can also be prevented. In this embodiment, the upper interlayer insulating film is used.
The surface side of 115 is concave reflecting the shape of TFT 108.
Although it has a protrusion, the connection hole 1 in the upper interlayer insulating film 115
15a is a flat area where the TFT 108 is not formed.
108a, TFT1 in the pixel region 102bb
08 is formed at a diagonal position from the formation position,
Molybdenum silicide layer 116bb and pixel electrode 106
High contact reliability. (Embodiment 11) FIG. 24 shows an embodiment of the present invention.
Active matrix used in the liquid crystal display device according to 11
FIG. 25 is a schematic plan view showing a part of the substrate, and FIG.
It is sectional drawing in the I line. Here, FIG. 18 and FIG.
Tsunoh corresponding to the liquid crystal display device according to Example 8 shown in FIG.
The same reference numerals are given to the parts having
Detailed description is omitted. In the liquid crystal display device of this embodiment, the pixel region
201bb, formed on the surface side of the transparent substrate 209
A channel region 211 is formed in the polycrystalline silicon layer 210 thus formed.
Except for the introduction of phosphorus as an n-type impurity,
A drain 204 and a drain 207 are formed. this
On the surface side of the TFT 208, a lower portion made of a silicon oxide film is formed.
A layer-side interlayer insulating film 213 is deposited, and the first
Connection hole 213a and second connection hole 213b are opened.
ing. Data is transmitted through the first connection hole 213a.
A power line 202a is conductively connected to the source 204. On the other hand, through the second connection hole 213b,
Product consisting of chromium layer as metal wiring layer with acid resistance
The lift-up electrode layer 214 is conductively connected to the drain 207.
You. Here, the formation position of the connection hole 213b and the connection hole 21
The relationship between the connection hole 215a and the formation position of the connection hole 2a is as follows.
13b and the gate electrode 205. In the liquid crystal display device of this embodiment, the upper
The pixel electrode 206 on the surface side of the layer-side interlayer insulating film 215
Molybdenum with light-shielding and conductive properties
The silicide layer 216bb (conductive light-shielding layer) is formed
The molybdenum silicide layer 216bb is
Region 201bb and its adjacent pixel region 201a
b, 201ba, 201bc, 201cb
, The outer edges 216x of the data lines 202a,
02b and immediately above the gate lines 203a and 203b
And the outer edge of the pixel electrode 206
Coincides with edge 206x. Where molybdenum silisa
The conductive light-shielding layer such as the guide layer 216bb
The pixel region is formed in the same manner, but the adjacent pixel region
201ab, 201ba, 201cb, 201bc
Misaligned molybdenum silicide layers 216ab, 216b
a, 216 cb, 216 bc
The ribden silicide layer 216bb is connected to the data line 202.
a, 202b and immediately above the gate lines 203a, 203b
It is in a state of insulation separation at the position. Further, in the liquid crystal display device of this embodiment, the transparency is
On the front side of the bright substrate 209, an active matrix array
26 and FIG. 27 also show a driving circuit for driving
It is formed with a CMOS circuit as shown. here
FIG. 26 is a cross-sectional view of a CMOS circuit of a driving circuit, and FIG.
Is a plan view thereof. In these figures, an n-channel TFT
410 and p-channel TFT 420 are active
The active matrix is formed simultaneously with the matrix side.
On the risk side, the gate electrode 205 and the data line 202
a and the pixel electrode 206 are provided between the respective layers.
Having an interlayer insulating film 213 or an upper layer side interlayer insulating film 215
The multilayer wiring structure on the drive circuit side.
Has been established. In other words, the active circuit
The “risk side” means the drive circuit side gate electrode 441, the drive circuit
Side gate electrode wiring layer 442 and lower layer side interlayer insulating film 21
Until the formation process of 3, each process is used together to form
Thereafter, the source lines 411 and 421 on the drive circuit side are formed.
Is formed, an upper interstitial insulating film 215 is formed.
Then, the upper interlayer insulating film 215 and the lower interlayer insulating film 215 are formed.
Forming connection holes 415a and 415b with respect to the film 213;
Aluminum through these connection holes 415a and 415b.
Wiring layer 430 is connected to n-channel TFT 410 and p-channel TFT.
Conduction to drains 417 and 427 of channel type TFT 420
They are connected. The aluminum wiring layer 4
The surface protection layer 230 is formed on the surface side of the surface protection layer 230.
It is. The liquid crystal display device of this example having such a configuration is
Each molybdenum silicide layer 216bb ...
In order to use as a black matrix,
In addition to providing the same effects as a liquid crystal display device,
Also has the effect. In other words, on the active matrix side
The gate electrode 205, the data line 202a, and the pixel
The element electrode 206 is provided between the lower layers and the lower interlayer insulating film 2.
13 or having the upper interlayer insulating film 215.
Utilizing n-channel TFT 410 and p-channel TFT
Aluminum for drains 417 and 427 of TFT 420
The aluminum wiring layer 430 is formed with a multilayer wiring structure.
Therefore, problems such as short circuits between wiring layers do not occur.
No. Also, because of the multilayer wiring structure, the n-channel type TF
Driving with T410 and p-channel type TFT420
The area required to form a circuit is small, and
If the area is the same, the pixel area can be expanded and the pixel side surface
If the products are the same, the entire substrate, that is, the liquid crystal display device
Can be reduced in size. [0122] The present invention satisfies the above constitutional requirements.
Thus, the following remarkable effects can be obtained. (I) When the light shielding layer is formed along the adjacent data line
In both cases, thicken the side where alignment disorder is likely to occur,
Because the width of the side that is less likely to occur is narrowed, reverse tilt
High display quality by covering the drain region
On the other hand, a decrease in the aperture ratio can be suppressed. (Ii) The outer edge of the light shielding layer coincides with the outer edge of the pixel electrode.
Pattern along the data line.
Overlap of the width of one side of the formed light shielding layer with the pixel electrode
And the width of the other side of the light shielding layer formed along the data line
And the pixel electrode overlap
Can be. Therefore, on the side where alignment disorder is likely to occur,
The overlap between the pixel electrode and the light-shielding layer can be increased,
It is possible to improve display quality. [0123] [0124] [0125] [0126] [0127]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view showing a part of a matrix array of a liquid crystal display device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view taken along line II of FIG. FIG. 3 is a plan view illustrating a part of a matrix array of a liquid crystal display device according to a second embodiment of the present invention. FIG. 4 is a sectional view taken along line II-II in FIG. 3; FIG. 5 is a plan view showing a part of a matrix array of a liquid crystal display device according to a third embodiment of the present invention. FIG. 6 is a sectional view taken along line III-III in FIG. 5; FIG. 7 is a schematic plan view of a matrix array of a liquid crystal display according to a modification of the third embodiment of the present invention. FIG. 8 is a plan view illustrating a part of a matrix array of a liquid crystal display device according to a fourth embodiment of the present invention. 9 is a sectional view taken along line IV-IV in FIG. 10A to 10C are process cross-sectional views illustrating a part of the method of manufacturing the liquid crystal display device illustrated in FIG. FIG. 11 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 5 of the present invention. FIG. 12 is a sectional view taken along line VV in FIG. 11; 13 (a) to 13 (d) are cross-sectional views showing steps of a method for manufacturing the liquid crystal display device shown in FIG. 11; FIG. 14 is a plan view illustrating a part of a matrix array of a liquid crystal display device according to a sixth embodiment of the present invention. FIG. 15 is a sectional view taken along line VI-VI in FIG. FIG. 16 is a plan view showing one matrix array of a liquid crystal display device according to Example 7 of the present invention. FIG. 17 is a sectional view taken along line VII-VII in FIG. 16; FIG. 18 is a plan view illustrating a part of a matrix array of a liquid crystal display device according to Example 8 of the present invention. FIG. 19 is a sectional view taken along line VIII-VIII in FIG. 18; FIG. 20 is a plan view illustrating a part of a matrix array of a liquid crystal display device according to Embodiment 9 of the present invention. 21 is a sectional view taken along line IX-IX in FIG. FIG. 22 is a plan view showing a part of a matrix array of a liquid crystal display device according to Example 10 of the present invention. FIG. 23 is a sectional view taken along line XX of FIG. 22. FIG. 24 is a plan view showing a part of a matrix array of a liquid crystal display device according to Embodiment 11 of the present invention. FIG. 25 is a sectional view taken along line XI-XI in FIG. 24; FIG. 26 is a cross-sectional view illustrating a configuration of a part of a drive circuit formed on the same substrate as a matrix array of a liquid crystal display device according to Embodiment 11 of the present invention. FIG. 27 is a plan view showing a configuration of a part of a drive circuit formed on the same substrate as a matrix array of a liquid crystal display device according to Embodiment 11 of the present invention. FIG. 28 is a plan view showing a part of a matrix array of a conventional liquid crystal display device. 29 is a sectional view taken along line XII-XII in FIG. FIG. 30 is a plan view showing a part of a matrix array of a liquid crystal display device according to a comparative example. FIG. 31 is a sectional view taken along line XIIII-XIIII in FIG. 30;

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Kiyohiko Kanai               3-3-5 Yamato, Suwa City, Nagano Prefecture Say               Coepson Corporation (72) Inventor Kazuo Yudasaka               3-3-5 Yamato, Suwa City, Nagano Prefecture Say               Coepson Corporation (72) Inventor Takashi Inoue               3-3-5 Yamato, Suwa City, Nagano Prefecture Say               Coepson Corporation

Claims (1)

(57) Claims 1. A substrate has a pixel area defined by two data lines and two gate lines on a substrate, and the pixel area includes the gate line and the data line. A transistor connected to the transistor and a pixel electrode connected to the transistor, wherein a conductive light-shielding layer is respectively arranged along the two data lines, and one of the two data lines is The width of the conductive light-shielding layer arranged along the other data line is larger than the width of the conductive light-shielding layer arranged along the other data line, and the conductive light-shielding layer is formed on the pixel electrode.
And an outer edge between the conductive light-shielding layer and the pixel electrode.
And using the same mask to pattern the outer edge of the conductive light-shielding layer with the outer edge of the pixel electrode.