JP3408095B2 - Manufacturing method of nonvolatile semiconductor memory device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a non-volatile semiconductor memory device, and more specifically, it provides a manufacturing method advantageous for multi-valued and miniaturized split gate type flash memory. It is a thing.

[0002]

2. Description of the Related Art A method of manufacturing a split gate type flash memory which is a non-volatile semiconductor memory device according to a conventional example will be described below with reference to the drawings. In this type of split gate flash memory, as shown in FIG. 8, a floating gate 53 is formed on a semiconductor substrate 51 via a gate oxide film 52, and an insulating film 54 formed so as to cover the floating gate 53. A control gate 55 is formed through the vias, source / drain diffusion layers 56 and 57 are formed adjacent to the floating gate 53 and the control gate 55, and a contact hole 59 is formed in an interlayer insulating film 58.
A metal wiring 60 is formed so as to come into contact with the source diffusion layer 56 or the drain diffusion layer 57 via.

[0003]

In such a nonvolatile semiconductor memory device, the control gate 5 described above is used.
In reference numeral 5, after forming an insulating film 54 on the floating gate 53, a conductive film such as a polysilicon film is formed on the entire surface, and the conductive film is patterned by a well-known photolithography method using a resist film (not shown) as a mask. ing.

However, if there is a mask displacement during patterning of the conductive film using the resist film as a mask, the control gate 55 will be displaced. In such a case, for example, as shown in FIG. 9, a pair of the control gate 55A and the control gate 55B, or a pair of the control gate 55C and the control gate 55D have a difference in gate length, and the cell current deviates.

For this reason, the current values flowing through the paired cell transistors cannot be made the same, which is a great obstacle in achieving multi-valued. Further, arranging the pattern for preventing the transistor characteristic failure due to the shift and the short-circuit between the control gate and the contact has been an obstacle to miniaturization. Therefore, it is an object of the present invention to provide a method for manufacturing a non-volatile semiconductor memory device, which is advantageous in achieving multi-value and miniaturization, by providing a method for manufacturing a control gate by self-alignment.

[0006]

Therefore, according to the present invention, after forming a field SiO2 film 2 on a semiconductor substrate 1, a gate SiO2 film 3 is formed in a region other than the field SiO2 film 2 so that the entire surface of the substrate is made conductive. After the polysilicon film 4 is formed, the polysilicon film 4 is removed from the field S.
The polysilicon film 4 is patterned through a resist film so as to remain on the periphery of the iO2 film 2. next,
A first sidewall film 5 is formed on the sidewall of the polysilicon film 4. Then, after forming the SiN film 6 having the opening 7 on the polysilicon film 4, the opening 7 is formed.
Second side wall film 7A is formed on the side wall of
Using the iN film 6 and the second sidewall film 7A as a mask, the polysilicon film 4 is isotropically etched to form a groove 8 in the polysilicon film 4. Next, CVD is performed on the entire surface.
After the SiO2 film is formed by the etching method, the SiON film 6 is etched back to the position where the SiN film 6 is exposed.
2 film is buried, the SiN film 6 and the second sidewall film 7A are removed to form a CVD SiO2 film 9 having a convex portion A on the polysilicon film 4, and then the SiO2 film is formed.
The polysilicon film 4 is etched and removed using the film 9 as a mask to form the floating gate 10. Then, after the entire surface is oxidized to form the SiO2 film 11 so as to cover the side wall of the floating gate 10,
After the polysilicon film 12 is formed on the entire surface to make it conductive, the polysilicon film 12 is anisotropically etched to perform the CVD.
With the convex portion A of the SiO2 film 9 as the center, the remaining polysilicon film 12 is formed from the upper side to the side portion on both sides of the floating gate 10, and the convex portion A of the CVDSiO2 film 9 is further masked by using a resist film as a mask. At least the step of forming the control gate 13 by removing one side of the polysilicon film 12 formed from the upper part to the side part on both sides of the floating gate 10 with respect to the center is provided.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a method for manufacturing a nonvolatile semiconductor memory device of the present invention will be described below. In the nonvolatile semiconductor memory device according to the embodiment of the present invention, as shown in FIG.
The split gate flash memory is characterized in that it is formed from the upper part to the side part of the floating gate 10 via the 2 film 11.

First, as shown in FIG. 1, LOCOS (local oxidation of silicon) is formed at a desired position on the semiconductor substrate 1.
After forming the field SiO2 film 2 by the method, a film thickness of about 1 is formed on the element forming region other than the field SiO2 film 2.
A 00Å gate SiO 2 film 3 (see FIG. 2) is formed, and a polysilicon film having a film thickness of about 2000Å is formed on the entire surface of the substrate.
Conducting conductivity is achieved by performing phosphorus doping on the polysilicon film.

Next, the polysilicon film is patterned by a well-known photolithography method using a resist film (not shown) as a mask, and as shown in FIG.
After the polysilicon film 4 is formed on the peripheral portion of the O2 film 2 so that the end portion thereof remains, the resist film is removed.
Then, after forming a polysilicon film or a SiO2 film having a film thickness of about 1500 Å on the entire surface, the polysilicon film or the SiO2 film is anisotropically etched to form a second film on the side wall portion of the polysilicon film 4 as shown in FIG. The sidewall film 5 of No. 1 is left as a film. The sidewall film 5 is the polysilicon film 4 which forms the floating gate 10 described later when the polysilicon film 4 is isotropically etched in the step of forming the floating gate 10 described later.
Prevents the active region of the transistor from being scraped.

Subsequently, a SiN film (silicon nitride film) having a thickness of about 5000Å is formed on the polysilicon film 4, and the SiN film is patterned by a well-known photolithography method using a resist film (not shown) as a mask. As shown in FIG. 2, an opening 7 having a width of about 0.6 μm or less is formed in the SiN film 6.
To expose the surface of the polysilicon film 4.
Then, a SiN film or SiO having a film thickness of about 500Å is formed on the entire surface.
After forming the 2 film by the CVD method, the SiN film or the SiO 2 film is anisotropically etched to form the second sidewall film 7A on the side wall of the opening 7. 2 is a sectional view taken along line XX of FIG.

Next, the polysilicon film 4 is isotropically etched by the dry method or the wet method by using the SiN film 6 and the second sidewall film 7A as a mask, and as shown in FIG. A groove portion 8 having a depth is formed. In this step, since the sidewall is formed on the side wall of the opening 7 by the above-described second sidewall film 7A, the width of the opening 7 can be reduced by the width of the sidewall film 7A. Therefore, the etching width H by the above-mentioned isotropic etching can be narrowed by that amount. For example, in the present exposure technique, the opening can be formed with a limit opening size. The size of the upper portion of the floating gate 10 (width of the CVD SiO2 film 9 forming the floating gate 10 by etching the polysilicon film 4 by using the CVD SiO2 film 9 described later as a mask) can be narrowed and miniaturization can be achieved. .

Subsequently, a film thickness of about 40 is formed on the entire surface by the CVD method.
After the SiO2 film of 00 Å is formed, the SiO2 film is etched back to be embedded in the groove 8 as shown in FIG. 4 and the convex portion A (the wall for forming the control gate 13 described later) on the upper portion. Plays a role of
A DSiO2 film 9 is formed. Next, the SiN film 6 and the second sidewall film 7A are etched with hot phosphoric acid, and the polysilicon film 4 is further etched with the CVDSiO2.
The film 9 is used as a mask and removed by etching to form the floating gate 10 as shown in FIG. At this time,
As described above, by forming the second sidewall film 7A on the sidewall of the opening 7 of the SiN film 6, the etching width H of the groove 8 formed in the polysilicon film 4 is narrowed by isotropic etching. Therefore, the device can be miniaturized. Further, when the polysilicon film 4 is isotropically etched, the first sidewall film 5 is formed on the sidewall portion of the polysilicon film 4 to prevent the polysilicon film 4 from being over-cut. Floating gate 10
The polysilicon film 4 forming the structure is not cut down to the active region of the transistor, and the productivity is improved.

Then, the entire surface of the substrate is thermally oxidized to form a SiO2 film on the surface of the polysilicon film forming the floating gate 10 as shown in FIG. 6, and the side wall of the floating gate 10 is covered. As described above, a SiO2 film 11 having a film thickness of about 300Å is formed, a polysilicon film having a film thickness of about 5000Å is further formed on the entire surface, and phosphorus is doped to make the film conductive, and then the polysilicon film is anisotropically etched. Then, a polysilicon film 12 is formed on both sides of the floating gate 10 centering on the convex portion A of the CVD SiO2 film 9 via the SiO2 film 11 from the upper portion to the side portion of the floating gate 10 to be a control gate 13 described later. Film.

The floating gate 10 is formed on both sides of the floating gate 10 by using a resist film (not shown) as a mask by a well-known photolithography method.
By removing one side of the polysilicon film 12 formed by self-alignment from the upper part to the side part of the floating gate 10, a control gate 13 having a width of about 0.4 μm is formed from the upper part to the side part of the floating gate 10 as shown in FIG. Form.

As described above, in the present invention, the control gate 13 can be formed by self-alignment by using the wall of the convex portion A of the CVD SiO2 film 9 formed on the floating gate 10 by self-alignment as described above. Therefore, the problem that the difference between the paired cell currents becomes large due to the mask misalignment between the floating gate and the control gate as in the related art can be solved. Therefore,
A non-volatile semiconductor that can handle the same current value for each cell, is advantageous in achieving multi-valued, and does not need to be designed in consideration of deviation, and is also advantageous in achieving miniaturization. A method for manufacturing a memory device can be provided.

Subsequently, the floating gate 10,
Impurities such as phosphorus ions are implanted into the entire surface using the control gate 13 as a mask to form the source / drain diffusion layer 1
4 and 15 are formed. Then, after covering the entire surface with the interlayer insulating film 16 as in the conventional case, a contact hole 17 is formed on the source / drain diffusion layers 14 and 15 to make contact therewith, and the source / drain diffusion layer 14 is formed through the contact hole 17. , 15 are formed to form the metal wiring 18 to form the nonvolatile semiconductor memory device of the present invention.

[0017]

As described above, according to the present invention, the CVD SiO formed on the floating gate 10 by self-alignment.
2 Using the wall of the convex portion A of the film 9, the control gate 13
Since it can be formed by self-alignment, it is possible to provide a manufacturing method of a nonvolatile semiconductor memory device which is advantageous in achieving multi-valued and miniaturization.

Further, as shown in FIG.
Since the first sidewall film 5 is formed on the sidewall portion of the polysilicon film 4, the polysilicon film 4 forming the floating gate 10 is isotropically etched when the polysilicon film 4 is isotropically etched in the step of forming the floating gate 10. The active region of the transistor is not scraped off, and the productivity is improved.

Further, as shown in FIG.
After the opening 7 is formed in the SiN film 6 formed above, the second sidewall film 7A is formed on the side wall of the opening 7, so that the SiN film 6 and the second sidewall film 7A are formed as shown in FIG.
Since the polysilicon film 4 is isotropically etched using the side wall film 7A as a mask to form the groove 8, the width of the opening 7 can be narrowed by the width of the side wall film 7A. Therefore, the etching width H by the isotropic etching can be narrowed by that amount, and the polysilicon film 4 is etched by using the CVD SiO2 film 9 formed on the groove portion 8 as a mask to make the floating gate 1
In the process of forming 0, the floating gate 1
The width of 0 can be narrowed, and the floating gate 10 can be miniaturized.

[Brief description of drawings]

FIG. 1 is a plan view showing a method for manufacturing a nonvolatile semiconductor memory device according to an embodiment of the present invention.

FIG. 2 is a first cross-sectional view showing the method for manufacturing the nonvolatile semiconductor memory device in the embodiment of the present invention.

FIG. 3 is a second cross-sectional view showing the method for manufacturing the nonvolatile semiconductor memory device in the embodiment of the present invention.

FIG. 4 is a third cross-sectional view showing the method for manufacturing the nonvolatile semiconductor memory device in the embodiment of the present invention.

FIG. 5 is a fourth cross-sectional view showing the method for manufacturing the nonvolatile semiconductor memory device in the embodiment of the present invention.

FIG. 6 is a fifth cross-sectional view showing the method for manufacturing the nonvolatile semiconductor memory device in the embodiment of the present invention.

FIG. 7 is a sixth cross-sectional view showing the method for manufacturing the nonvolatile semiconductor memory device in the embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a conventional nonvolatile semiconductor memory device.

FIG. 9 is a cross-sectional view showing a problem of a conventional nonvolatile semiconductor memory device.

Claims (3)

(57) [Claims] 1. A step of forming a field oxide film on a semiconductor substrate and then forming a gate oxide film in a region other than the field oxide film; and a step of forming a conductive film on the entire surface of the substrate and thereafter forming the field oxide film on the semiconductor substrate. Patterning the conductive film via a resist film so as to leave a residual film on the periphery of the film; and forming a silicon nitride film having an opening on the conductive film, and using the silicon nitride film as a mask A step of isotropically etching the film to form a groove portion in the conductive film; and, after forming an oxide film on the entire surface by a CVD method, etch back to a position where the silicon nitride film is exposed to embed the oxide film in the groove portion. A step of removing the silicon nitride film to form an oxide film having a convex portion on the conductive film, and then etching and removing the conductive film using the oxide film as a mask. And forming an insulating film so as to cover the floating gate, and then form a conductive film on the entire surface. Then, the conductive film is anisotropically etched to form the oxide film. A step of forming a residual film of the conductive film from the upper part to the side parts on both sides of the floating gate centering on the convex part; and a step of forming a residual film on the both sides of the floating gate centering on the convex part of the oxide film using a resist film as a mask. And a step of removing one side of the conductive film formed from the upper portion to the side portion to form a control gate. 2. A step of forming a field oxide film on a semiconductor substrate and then forming a gate oxide film in a region other than the field oxide film; and a step of forming a conductive film on the entire surface of the substrate and thereafter forming the field oxide film on the semiconductor substrate. Patterning the conductive film via a resist film so as to leave a residual film on the periphery of the film; and forming a conductive film or an oxide film on the entire surface and then anisotropically etching the conductive film on the sidewall of the conductive film. A step of forming a sidewall film by leaving a film or an oxide film as a remaining film, and isotropic etching of the conductive film using the silicon nitride film as a mask after forming a silicon nitride film having an opening on the conductive film. Forming a groove in the conductive film, and etching back to a position where the silicon nitride film is exposed after forming an oxide film on the entire surface by a CVD method to form an oxide film in the groove. And a step of removing the silicon nitride film to form an oxide film having protrusions on the conductive film, and then etching / removing the conductive film using the oxide film as a mask to form a floating gate. And oxidizing the entire surface to form an insulating film so as to cover the floating gate, forming a conductive film on the entire surface, and anisotropically etching the conductive film to center the convex portion of the oxide film. The step of forming the remaining conductive film from the upper side to the side portions of both sides of the floating gate and the step of forming the remaining film from the upper side to the side portions of both sides of the floating gate centering on the convex portion of the oxide film using the resist film as a mask A method for manufacturing a non-volatile semiconductor memory device, comprising at least a step of removing one of the conductive films to form a control gate. 3. A step of forming a field oxide film on a semiconductor substrate and then forming a gate oxide film in a region other than the field oxide film; and a step of forming a conductive film on the entire surface of the substrate and thereafter forming the field oxide film on the semiconductor substrate. Patterning the conductive film via a resist film so as to leave a residual film on the peripheral edge of the film; and forming a conductive film or an oxide film on the entire surface and then anisotropically etching the conductive film on the sidewall of the conductive film. A step of forming a first sidewall film by leaving the film or oxide film as a residual film, a step of forming a silicon nitride film having an opening on the conductive film, and a silicon nitride film or an oxide film formed over the entire surface A step of performing anisotropic etching later to form a second sidewall film on the sidewall of the opening; and using the silicon nitride film and the second sidewall film as a mask, the conductive film A step of forming a groove portion in the conductive film by isotropic etching, and a step of forming an oxide film on the entire surface by a CVD method and then etching back to a position where the silicon nitride film is exposed to bury the oxide film in the groove portion. Removing the silicon nitride film to form an oxide film having convex portions on the conductive film, and then etching / removing the conductive film using the oxide film as a mask to form a floating gate; After forming an insulating film so as to cover the floating gate by oxidation, a conductive film is formed on the entire surface, and the conductive film is anisotropically etched to center the convex portion of the oxide film on both sides of the floating gate. Both the step of forming a residual film of the conductive film from the upper part to the side part of the floating gate, Method of manufacturing a nonvolatile semiconductor memory device characterized by having at least a step of then removing the one of the conductive film formed over the side from the top to form a control gate.