JP3406482B2 - Composite electronic component, method of manufacturing the same, and chip-shaped electronic component - Google Patents

Composite electronic component, method of manufacturing the same, and chip-shaped electronic component

Info

Publication number
JP3406482B2
JP3406482B2 JP20470897A JP20470897A JP3406482B2 JP 3406482 B2 JP3406482 B2 JP 3406482B2 JP 20470897 A JP20470897 A JP 20470897A JP 20470897 A JP20470897 A JP 20470897A JP 3406482 B2 JP3406482 B2 JP 3406482B2
Authority
JP
Japan
Prior art keywords
electronic component
chip
shaped electronic
electrode
shaped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP20470897A
Other languages
Japanese (ja)
Other versions
JPH1154367A (en
Inventor
一高 鈴木
昌之 服部
正之 藤本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP20470897A priority Critical patent/JP3406482B2/en
Publication of JPH1154367A publication Critical patent/JPH1154367A/en
Application granted granted Critical
Publication of JP3406482B2 publication Critical patent/JP3406482B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、複数の積層コンデ
ンサ等のチップ状電子部品からなる複合電子部品及びそ
の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite electronic component including a plurality of chip-shaped electronic components such as multilayer capacitors and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、例えば積層コンデンサ等のチップ
状電子部品は、端子電極をその両端部に設けており、こ
のチップ状電子部品を回路基板上に実装する際には、端
子電極を回路基板表面に設けられたランド上に搭載し半
田リフローすることにより実装していた。
2. Description of the Related Art Conventionally, a chip-shaped electronic component such as a multilayer capacitor is provided with terminal electrodes at both ends thereof. When the chip-shaped electronic component is mounted on a circuit board, the terminal electrode is mounted on the circuit board. It was mounted on the land provided on the surface by solder reflow.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、このチ
ップ状電子部品を回路基板上に実装する際には、端子電
極の周囲に半田フィレットが形成されるため、複数のチ
ップ状電子部品を実装する場合には、半田による端子電
極間のショートを防止するために、各電子部品の間隔を
大きくとる必要があり実装密度を向上させることが困難
であった。
However, when mounting this chip-shaped electronic component on a circuit board, a solder fillet is formed around the terminal electrode, so that a plurality of chip-shaped electronic components are mounted. In order to prevent a short circuit between the terminal electrodes due to solder, it is necessary to increase the distance between the electronic components, which makes it difficult to improve the mounting density.

【0004】また、実装密度を向上させるために、電子
部品内部の電極パターン等を抵抗,コンデンサ,インダ
クタ等複数の機能を備えるように構成することにより、
電子部品についての実装密度を向上させたコンデンサア
レイ,チップ抵抗器ネットワーク等の複合電子部品が考
えられている。しかし、この複合電子部品は、内蔵する
部品種別やその性能等に応じて電極パターンを印刷した
グリーンシートを乾燥,積層,圧着,脱バインダ,焼成
させるという工程を経て製造されているため、各種市場
の要求に対応するには、その要求ごとに設計製造する必
要があることからコストが高いものとなり、さらに、設
計変更に対応するのも困難であった。
Further, in order to improve the mounting density, the electrode pattern or the like inside the electronic component is configured to have a plurality of functions such as a resistance, a capacitor, and an inductor.
Composite electronic components such as capacitor arrays and chip resistor networks with improved packaging density of electronic components are being considered. However, this composite electronic component is manufactured through the steps of drying, laminating, pressure bonding, binder removal, and firing of a green sheet on which an electrode pattern is printed according to the type of component to be incorporated and its performance, etc. In order to meet the requirement, it is necessary to design and manufacture for each requirement, resulting in high cost, and it is also difficult to respond to the design change.

【0005】本発明は、上記事情に鑑みてなされたもの
であり、その目的とするところは、実装密度が向上する
とともに多様な製品を安価に製造することができる複合
電子部品及びその製造方法並びにチップ状電子部品を提
供することにある。
The present invention has been made in view of the above circumstances, and an object of the present invention is to improve the mounting density and to manufacture a variety of products at low cost, a method of manufacturing the same, and a method of manufacturing the same. It is to provide a chip-shaped electronic component.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に、請求項1の発明は、端子電極を備える複数のチップ
状電子部品と、これらチップ状電子部品を一体に保持す
る保持部材からなり、その底面を回路基板に対向して搭
載する複合電子部品において、前記チップ状電子部品
は、その一表面のみに端子電極を備え、前記保持部材
は、複合電子部品の底面における所定間隔の格子の交点
上に前記端子電極が配置されるように側面又は端面を密
着させてチップ状電子部品を一体に保持していることを
特徴とする。
In order to achieve the above object, the invention of claim 1 comprises a plurality of chip-shaped electronic components provided with terminal electrodes and a holding member for integrally holding these chip-shaped electronic components. In the composite electronic component whose bottom surface is mounted facing the circuit board, the chip-shaped electronic component is provided with a terminal electrode only on one surface thereof, and the holding member is a grid of predetermined intervals on the bottom surface of the composite electronic component. Close the side face or end face so that the terminal electrode is placed on the intersection.
It is characterized in that the chip-shaped electronic components are integrally held by being attached.

【0007】この発明によれば、複合電子部品の底面
は、チップ状電子部品の端子電極が所定間隔の格子の交
点上に配置されたものとなる。
According to the present invention, the bottom surface of the composite electronic component is such that the terminal electrodes of the chip-shaped electronic component are arranged on the intersections of the grids at the predetermined intervals.

【0008】また、請求項2の発明は、端子電極を備え
る複数のチップ状電子部品と、これらチップ状電子部品
を一体に保持する保持部材からなり、その底面を回路基
板に対向して搭載する複合電子部品において、前記チッ
プ状電子部品は、その一表面のみに端子電極を備え、前
記保持部材は、表面に第1の電極を所定間隔の格子の交
点上に配置されるように設けるとともに裏面に第1の電
極と導通接続する第2の電極を設けた基板からなり、チ
ップ状電子部品の端子電極と該端子電極に対応する第1
の電極とを導通接続して該チップ状電子部品を一体に保
持していることを特徴とする。
According to a second aspect of the present invention, there is provided a plurality of chip-shaped electronic parts having terminal electrodes and a holding member for integrally holding these chip-shaped electronic parts, the bottom surface of which is mounted facing the circuit board. In the composite electronic component, the chip-shaped electronic component is provided with a terminal electrode only on one surface thereof, and the holding member is provided with a first electrode on the surface thereof so as to be arranged at intersections of lattices at predetermined intervals and a back surface thereof. A terminal electrode of the chip-shaped electronic component and a first electrode corresponding to the terminal electrode, the substrate being provided with a second electrode electrically connected to the first electrode.
The chip-shaped electronic component is held integrally by being electrically connected to the electrode.

【0009】この発明によれば、複合電子部品の底面
に、所定間隔の格子の交点上に保持部材の第2の電極が
配置され、さらに、この第2の電極と導通接続する第1
の電極に、チップ状電子部品の端子電極が導通接続して
一体に保持される。
According to the present invention, the second electrode of the holding member is disposed on the bottom surface of the composite electronic component on the intersection of the lattices at the predetermined intervals, and the first electrode is electrically connected to the second electrode.
The terminal electrode of the chip-shaped electronic component is conductively connected to the electrode of and is held integrally.

【0010】さらに、請求項3の発明は、請求項1又は
請求項2記載の複合電子部品において、直方体形状のチ
ップ状電子部品の底面に前記所定間隔の整数倍の間隔を
もって端子電極を備え、前記保持部材は、該チップ状電
子部品を互いに側面又は端面を密着して一体に保持して
いることを特徴とする。
Further, in the third aspect of the present invention, in the composite electronic component according to the first or second aspect, terminal electrodes are provided on the bottom surface of the rectangular parallelepiped chip-shaped electronic component at an interval that is an integral multiple of the predetermined interval, The holding member is characterized in that the chip-shaped electronic components are integrally held with their side faces or end faces in close contact with each other.

【0011】この発明によれば、チップ状電子部品同士
の間隔を最小限なものとすることができる。
According to the present invention, the distance between the chip-shaped electronic components can be minimized.

【0012】さらに、請求項4の発明は、端子電極を備
える複数のチップ状電子部品と、これらチップ状電子部
品を一体に保持する保持部材からなり、その底面を回路
基板に対向して搭載する複合電子部品の製造方法におい
て、一表面のみに端子電極を備えたチップ状電子部品
を、その端子電極が所定間隔の格子の交点上に配置され
るように側面又は端面を密着させて集合させ、チップ状
電子部品の上面に亘って保持部材を付設してチップ状電
子部品を一体に保持したことを特徴とする。
Further, the invention of claim 4 comprises a plurality of chip-shaped electronic components having terminal electrodes and a holding member for integrally holding these chip-shaped electronic components, the bottom surface of which is mounted facing the circuit board. In the method of manufacturing a composite electronic component, a chip-shaped electronic component provided with a terminal electrode only on one surface, the terminal electrode is collected by closely contacting the side surface or the end face so that the terminal electrode is arranged on the intersection of the lattice at a predetermined interval, A holding member is attached to the upper surface of the chip-shaped electronic component to integrally hold the chip-shaped electronic component.

【0013】この発明によれば、一表面のみに端子電極
を備えたチップ状電子部品が、所定間隔の格子の交点上
に配置されるように集合され、上面に設けられた保持部
材によって一体に保持される。これにより、複合電子部
品の底面は、チップ状電子部品の端子電極が所定間隔の
格子の交点上に配置されたものとなる。
According to the present invention, the chip-shaped electronic components provided with the terminal electrodes only on one surface are assembled so as to be arranged on the intersections of the lattices at the predetermined intervals, and are integrated by the holding member provided on the upper surface. Retained. As a result, the bottom surface of the composite electronic component is such that the terminal electrodes of the chip-shaped electronic component are arranged on the intersections of the grids at the predetermined intervals.

【0014】さらに、請求項5の発明は、端子電極を備
える複数のチップ状電子部品と、これらチップ状電子部
品を一体に保持する保持部材からなり、その底面を回路
基板に対向して搭載する複合電子部品の製造方法におい
て、一表面のみに端子電極を備えたチップ状電子部品
を、その端子電極が所定間隔の格子の交点上に配置され
るように集合させ、その表面であって所定間隔の格子の
交点上に第1の電極を設けるとともに、裏面に第1の電
極と導通接続する第2の電極を設けた基板からなる保持
部材により、第1の電極と前記チップ状電子部品の端子
電極とが導通接続してチップ状電子部品を一体に保持し
たことを特徴とする。
Further, the invention of claim 5 comprises a plurality of chip-shaped electronic components having terminal electrodes and a holding member for integrally holding these chip-shaped electronic components, the bottom surface of which is mounted facing the circuit board. In the method of manufacturing a composite electronic component, chip-shaped electronic components provided with terminal electrodes only on one surface are assembled so that the terminal electrodes are arranged on the intersections of lattices with a predetermined spacing, and the surface has a predetermined spacing. The first electrode and the terminal of the chip-shaped electronic component are provided by a holding member made of a substrate, the first electrode being provided on the intersection of the grids and the second electrode being electrically connected to the first electrode on the back surface. It is characterized in that the electrodes are electrically connected and the chip-shaped electronic component is held integrally.

【0015】この発明によれば、一表面のみに端子電極
を備えたチップ状電子部品が、所定間隔の格子の交点上
に配置されるように集合される。さらに、表面に第1の
電極を所定間隔の格子の交点上に設けるとともに、裏面
に第1の電極と導通接続する第2の電極を設けた基板か
らなる保持部材により、第1の電極と前記チップ状電子
部品の端子電極とが導通接続してチップ状電子部品が一
体に保持される。これにより、複合電子部品の底面に、
所定間隔の格子の交点上に保持部材の第2の電極が配置
され、さらに、この第2の電極と導通接続する第1の電
極に、チップ状電子部品の端子電極が導通接続して一体
に保持される。
According to the present invention, the chip-shaped electronic components having the terminal electrodes only on one surface are assembled so as to be arranged on the intersections of the lattices at the predetermined intervals. Further, the first electrode and the above-mentioned electrode are provided by a holding member made of a substrate having a first electrode provided on the front surface on the intersection of lattices with a predetermined interval and a second electrode provided on the back surface to be conductively connected to the first electrode. The terminal electrodes of the chip-shaped electronic component are electrically connected and the chip-shaped electronic component is held integrally. As a result, on the bottom of the composite electronic component,
The second electrode of the holding member is arranged on the intersection of the grids at a predetermined interval, and the terminal electrode of the chip-shaped electronic component is conductively connected to the first electrode that is conductively connected to the second electrode to be integrated. Retained.

【0016】さらに、請求項6の発明は、請求項4又は
請求項5記載の複合電子部品の製造方法において、直方
体形状のチップ状電子部品の底面に前記所定間隔の整数
倍の間隔をもって端子電極を設け、該チップ状電子部品
を互いに側面又は端面を密着して集合させたことを特徴
とする。
Further, the invention of claim 6 is the method of manufacturing a composite electronic component according to claim 4 or 5, wherein the terminal electrodes are arranged on the bottom surface of the rectangular parallelepiped chip-shaped electronic component at an interval which is an integral multiple of the predetermined interval. Is provided, and the chip-shaped electronic components are assembled with their side faces or end faces in close contact with each other.

【0017】この発明によれば、チップ状電子部品同士
の間隔を最小限にした複合電子部品を製造することがで
きる。
According to the present invention, it is possible to manufacture a composite electronic component in which the distance between chip-shaped electronic components is minimized.

【0018】さらに、請求項7の発明は、前記請求項1
乃至請求項6記載の複合電子部品を構成するチップ状電
子部品において、直方体形状のチップ状電子部品の底面
が前記所定間隔の整数倍の幅及び長さを備え、該底面を
前記所定間隔と同一長さを一辺とする複数の正方形領域
に分割した際の該正方形領域の中心位置に端子電極を設
けたことを特徴とする。
Further, the invention of claim 7 is the same as claim 1.
The chip-shaped electronic component constituting the composite electronic component according to claim 6, wherein the bottom surface of the rectangular parallelepiped chip-shaped electronic component has a width and a length that are integral multiples of the predetermined interval, and the bottom surface is the same as the predetermined interval. It is characterized in that the terminal electrode is provided at the center position of the square area when the square area is divided into a plurality of square areas each having one side.

【0019】この発明によれば、互いに側面及び端面を
密着するように集合させることにより、複合電子部品の
底面に、前記所定間隔の格子の交点上に端子電極が確実
に配置される。
According to the present invention, by assembling the side surfaces and the end surfaces so as to be in close contact with each other, the terminal electrodes are surely arranged on the bottom surface of the composite electronic component on the intersections of the grids at the predetermined intervals.

【0020】[0020]

【発明の実施の形態】本発明の第1の実施の形態に係る
複合電子部品及びその製造方法について図1乃至図3を
参照して説明する。図1は複合電子部品の斜視図、図2
は複合電子部品を構成するチップ状電子部品の側面図、
図3は複合電子部品を構成するチップ状電子部品の底面
図であり、図において、1は複合電子部品、2はチップ
状電子部品、2aは端子電極、3は保持基板、10は回
路基板、11は回路基板表面に付設されたランドであ
る。
BEST MODE FOR CARRYING OUT THE INVENTION A composite electronic component and a method for manufacturing the same according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a perspective view of a composite electronic component, and FIG.
Is a side view of a chip-shaped electronic component that constitutes a composite electronic component,
FIG. 3 is a bottom view of a chip-shaped electronic component forming the composite electronic component. In the figure, 1 is a composite electronic component, 2 is a chip-shaped electronic component, 2a is a terminal electrode, 3 is a holding substrate, 10 is a circuit substrate, Reference numeral 11 is a land attached to the surface of the circuit board.

【0021】複合電子部品1は、一対の端子電極2aを
底面に備えた15個のチップ状電子部品2を、図1に示
すように互いに側面又は端面を密着させるように集合さ
せ、各チップ状電子部品2の上面を保持基板3によって
係る集合状態を保持したものであり、複合電子部品1の
底面には5x6=30個の端子電極2aが長さLの間隔
を有する格子の交点上に配置される。端子電極2aは、
回路基板10への複合電子部品1の実装の際に、回路基
板10のランド11上に搭載可能に、端子電極2aの先
端部が同一平面上に配置されている。ここで、長さL
は、例えば0.5mmである。
In the composite electronic component 1, fifteen chip-shaped electronic components 2 having a pair of terminal electrodes 2a on the bottom surface are assembled so that their side surfaces or end faces are in close contact with each other as shown in FIG. The upper surface of the electronic component 2 is held by the holding substrate 3 in such a gathered state, and 5 × 6 = 30 terminal electrodes 2a are arranged on the bottom of the composite electronic component 1 on the intersections of the lattices having the interval of the length L. To be done. The terminal electrode 2a is
When mounting the composite electronic component 1 on the circuit board 10, the tip end portions of the terminal electrodes 2a are arranged on the same plane so that they can be mounted on the lands 11 of the circuit board 10. Where length L
Is, for example, 0.5 mm.

【0022】チップ状電子部品2は、図2及び図3に示
すように、例えば、高さ0.5mm、長さ1.0mm、
幅0.5mmというように、幅と長さが前記長さLの整
数倍であって、幅と長さの比が1:2となる直方体形状
をなしており、チップ状電子部品2に内蔵する抵抗素子
や内部電極等と導通する一対の外部電極2bを底面に備
えるとともに、この外部電極2bの下部に回路基板10
のランド11と導通接続可能な一対の端子電極2aを備
えている。また、チップ状電子部品2を側面又は端面で
密着させても互いに導通接続しないように、前記端子電
極2aは側面及び端面に露出しないように形成されてい
る。
As shown in FIGS. 2 and 3, the chip-shaped electronic component 2 has a height of 0.5 mm and a length of 1.0 mm, for example.
It has a rectangular parallelepiped shape in which the width and the length are integral multiples of the length L such that the width is 0.5 mm and the ratio of the width and the length is 1: 2. A pair of external electrodes 2b that are electrically connected to a resistive element, an internal electrode, and the like that are formed on the bottom surface, and the circuit board 10 is provided below the external electrodes 2b.
The pair of terminal electrodes 2a which can be electrically connected to the land 11 of FIG. Further, the terminal electrodes 2a are formed so as not to be exposed on the side surface and the end surface so that they are not electrically connected to each other even if the chip-shaped electronic component 2 is closely attached on the side surface or the end surface.

【0023】一対の端子電極2aは、チップ状電子部品
2の長さ方向の軸上で、長さ方向を1:2:1に区切
り、両端子電極2aの間隔が前記長さLとなる位置に形
成された0.3mm径のバンプからなり、その材質は銀
・パラジウム合金,銅,ニッケル,金,半田あるいはこ
れらにニッケル,半田等のメッキを施したものである。
The pair of terminal electrodes 2a are separated from each other on the longitudinal axis of the chip-shaped electronic component 2 in the length direction of 1: 2: 1, and the distance between both terminal electrodes 2a is the length L. Formed of a bump having a diameter of 0.3 mm and made of silver / palladium alloy, copper, nickel, gold, solder, or these plated with nickel, solder, or the like.

【0024】保持基板3は、複数のチップ状電子部品を
一体に集合保持させるためのもので、複合電子部品1と
同じ長さ及び幅を有する厚さ0.05〜0.3mm程度
のガラスエポキシ,BTレジン,金属,セラミック等の
板状部材であり、チップ状電子部品2を集合させた状態
で接着剤3aを用いてその上面に亘って接着固定したも
のである。この接着剤3aとしては、例えば、粘度30
0〜400Pa・s程度の熱硬化性エポキシ接着剤や、
アクリル系,シリコーン系の高粘度接着剤が用いられ
る。尚、保持基板3として金属を用いた場合、チップ状
電子部品2に熱を放熱する放熱板としての機能を有する
ものになるため、チップ状電子部品2の発熱量が多い場
合に有効である。
The holding substrate 3 is for collectively holding a plurality of chip-shaped electronic components integrally and has the same length and width as the composite electronic component 1 and a glass epoxy having a thickness of about 0.05 to 0.3 mm. , BT resin, metal, ceramic or the like, and is a member in which the chip-shaped electronic components 2 are assembled and adhered and fixed over the upper surface thereof using the adhesive 3a. As the adhesive 3a, for example, a viscosity of 30
A thermosetting epoxy adhesive of 0 to 400 Pa · s,
Acrylic and silicone high viscosity adhesives are used. When the holding substrate 3 is made of metal, it has a function as a heat radiating plate for radiating heat to the chip-shaped electronic component 2, and is effective when the chip-shaped electronic component 2 generates a large amount of heat.

【0025】ここで、本実施の形態の複合電子部品1を
構成するチップ状電子部品2としてのチップ状抵抗器2
−R,チップ状積層コンデンサ2−C,チップ状積層イ
ンダクタ2−Lの例を図4乃至図6の側面断面図を参照
して説明する。
Here, a chip-shaped resistor 2 as a chip-shaped electronic component 2 which constitutes the composite electronic component 1 of the present embodiment.
Examples of -R, chip-shaped multilayer capacitor 2-C, and chip-shaped multilayer inductor 2-L will be described with reference to the side sectional views of FIGS.

【0026】チップ状抵抗器2−Rの例としては、上面
に抵抗素子Rとその端部に電極2c−Rを備え、この電
極2c−RをスルーホールHで底面の外部電極2b−R
と接続するもの(図4(a)参照)、上面に抵抗素子R
を備えるとともに、この抵抗素子Rの端部からチップ状
抵抗器2−Rの端面及び底面に亘って外部電極2b−R
を形成したのちに、端面における外部電極2b−Rを絶
縁層Z−Rで覆ったもの(図4(b)参照)、底面に設
けた絶縁層Z−Rの上側に抵抗素子Rを設け、この抵抗
素子Rの端部から絶縁層Z−Rの底面に亘って外部電極
2b−Rを設けたもの(図4(c)参照)等が挙げられ
る。
As an example of the chip-shaped resistor 2-R, a resistor element R is provided on the upper surface and an electrode 2c-R is provided at the end thereof, and this electrode 2c-R is formed as a through hole H with an external electrode 2b-R on the bottom surface.
Connected to (see FIG. 4A), a resistance element R on the upper surface
And the external electrode 2b-R extending from the end of the resistance element R to the end face and the bottom face of the chip resistor 2-R.
After forming the external electrode 2b-R on the end face with the insulating layer Z-R (see FIG. 4B), the resistive element R is provided on the upper side of the insulating layer Z-R provided on the bottom surface, An external electrode 2b-R is provided from the end of the resistance element R to the bottom surface of the insulating layer Z-R (see FIG. 4C).

【0027】また、チップ状積層コンデンサ2−Cの例
としては、底面にその引出部Pa−Cが露出するような
内部電極P−Cを横方向に積層し、底面に内部電極P−
Cの引出部Pa−Cと導通接続する外部電極2b−Cを
形成したもの(図5(a)参照)、端面にその引出部P
a−Cが露出するような内部電極P−Cを横方向に積層
し、このチップ状積層コンデンサ2−Cの端面に引出部
Pa−Cと導通接続する外部電極2b−Cを設けたのち
に、端面における外部電極2b−Cを絶縁層Z−Cで覆
ったもの(図5(b)参照)等が挙げられる。
Further, as an example of the chip-shaped multilayer capacitor 2-C, the internal electrodes P-C having the lead-out portions Pa-C exposed on the bottom surface are laterally laminated, and the internal electrodes P-C are provided on the bottom surface.
The external electrode 2b-C that is electrically connected to the lead-out portion Pa-C of C (see FIG. 5A) is formed, and the lead-out portion P is formed on the end face.
After laminating the internal electrodes P-C such that a-C is exposed in the lateral direction and providing the external electrodes 2b-C electrically connected to the lead-out portion Pa-C on the end face of the chip-shaped multilayer capacitor 2-C, , The external electrode 2b-C on the end face is covered with an insulating layer Z-C (see FIG. 5B).

【0028】さらに、チップ状積層インダクタ2−Lの
例としては、チップ状積層コンデンサ2−Cの例と同様
に、底面にその引出部Pa−Lが露出するような内部電
極PーLを横方向に積層し、その引出部Pa−Lと導通
接続する外部電極2bを形成したもの(図6(a)参
照)、端面にその引出部Pa−Cが露出するような内部
電極P−Lを横方向に積層し、このチップ状積層インダ
クタ2−Lの端面に引出部Pa−Lと導通接続する外部
電極2b−Lを設けたのちに、端面における外部電極2
b−Cを絶縁層Z−Cで覆ったもの(図6(b)参照)
等が挙げられる。
Further, as an example of the chip-shaped multilayer inductor 2-L, similarly to the example of the chip-shaped multilayer capacitor 2-C, an internal electrode P-L having a lead-out portion Pa-L exposed on the bottom surface is laterally disposed. In which the external electrodes 2b are formed by stacking in the direction, and the conductive portions are connected to the drawn-out portion Pa-L (see FIG. 6A), and the internal electrode P-L whose exposed portion Pa-C is exposed is formed on the end face. After the external electrodes 2b-L which are laminated in the lateral direction and which are electrically connected to the lead-out portion Pa-L are provided on the end surface of the chip-shaped laminated inductor 2-L, the external electrode 2 on the end surface is formed.
Covering b-C with insulating layer Z-C (see FIG. 6 (b))
Etc.

【0029】次に、本実施の形態の複合電子部品1の製
造方法について図7乃至図8を参照して説明する。
Next, a method of manufacturing the composite electronic component 1 of the present embodiment will be described with reference to FIGS.

【0030】まず、チップ状電子部品2よりわずかに高
いL字状の固定支持部材30であって、L字の内側面の
長さが少なくとも複合電子部品1の幅及び長さ以上であ
るものを平面上に配置し、この固定支持部材30のL字
の内側に15個のチップ状電子部品2を端子電極2aを
下にして配置する。ここで、チップ状電子部品2は、そ
の長さ方向又は幅方向を固定支持部材30のL字の内側
面に対して平行となるとともに、複合電子部品1の底面
に端子電極2aが5x6の格子状になるように配置する
(図7(a))。
First, an L-shaped fixed supporting member 30 slightly higher than the chip-shaped electronic component 2 having an L-shaped inner side surface length of at least the width and length of the composite electronic component 1 is selected. Fifteen chip-shaped electronic components 2 are arranged inside the L-shape of the fixed support member 30 with the terminal electrodes 2a facing down. Here, the chip-shaped electronic component 2 has its length direction or width direction parallel to the L-shaped inner side surface of the fixed support member 30, and the terminal electrode 2a is a 5 × 6 grid on the bottom surface of the composite electronic component 1. So as to form a shape (FIG. 7A).

【0031】次に、複合電子部品1の幅及び長さと同程
度の長さを有するとともに固定支持部材30と同じ高さ
を有する直方体形状の可動押圧部材31a及び31b
を、チップ状電子部品2を挟んで固定支持部材30のL
字の内側面に対向するように配置し、この可動押圧部材
31a及び31bを固定支持部材30方向に移動させて
チップ状電子部品2を互いに側面及び端面で密着して集
合させる(図7(b)参照)。ここでチップ状電子部品
2は複合電子部品1の幅及び長さが5:6の比となるよ
うに密着集合させる。
Next, the rectangular parallelepiped movable pressing members 31a and 31b having the same width and length as the composite electronic component 1 and the same height as the fixed supporting member 30.
L of the fixed support member 30 with the chip-shaped electronic component 2 interposed therebetween.
The movable pressing members 31a and 31b are arranged so as to face the inner side surface of the character, and are moved toward the fixed support member 30 to bring the chip-shaped electronic components 2 into close contact with each other on the side surface and the end surface (FIG. 7 (b)). )reference). Here, the chip-shaped electronic components 2 are closely assembled so that the width and the length of the composite electronic component 1 are 5: 6.

【0032】最後に、図8に示すように、固定支持部材
30と可動押圧部材31a及び31bによってチップ状
電子部品2を密着集合した状態で、その表面に接着剤3
aを塗布した保持基板3をチップ状電子部品2の上面に
貼り付けて複合電子部品1が製造される。
Finally, as shown in FIG. 8, with the fixed supporting member 30 and the movable pressing members 31a and 31b in close contact with each other, the chip-shaped electronic component 2 is brought into close contact with the adhesive 3 on the surface thereof.
The holding substrate 3 coated with a is attached to the upper surface of the chip-shaped electronic component 2 to manufacture the composite electronic component 1.

【0033】この複合電子部品1によれば、各チップ状
電子部品2が互いに間隙なく密着して一体に保持されて
いるので、実装密度の高いものとなり、また、複数のチ
ップ状電子部品を一度に回路基板10に搭載することが
できるので実装コストを低減することができる。また、
端子電極2aが複合電子部品1の底面に所定間隔で格子
状に露出しているので、CSPやBGA等の半導体パッ
ケージと同様に取扱いが可能となり、回路基板10の設
計等が容易となり、また、実装コストを低減することが
できる。さらに、チップ状電子部品2として種々の定数
の抵抗,コンデンサ,インダクタ等を混在させることが
できるので、複合電子部品1及び回路基板10の設計が
容易であり、かつ、設計変更にも容易かつ安価に対応す
ることができる。
According to the composite electronic component 1, since the chip-shaped electronic components 2 are held in close contact with each other without any gap, the packaging density is high, and a plurality of chip-shaped electronic components can be mounted once. Since it can be mounted on the circuit board 10, the mounting cost can be reduced. Also,
Since the terminal electrodes 2a are exposed on the bottom surface of the composite electronic component 1 at predetermined intervals in a grid pattern, the terminal electrodes 2a can be handled similarly to a semiconductor package such as CSP or BGA, and the circuit board 10 can be easily designed and the like. The mounting cost can be reduced. Further, since resistors, capacitors, inductors, etc. having various constants can be mixed as the chip-shaped electronic component 2, the composite electronic component 1 and the circuit board 10 can be easily designed, and the design can be easily and inexpensively changed. Can correspond to.

【0034】尚、本実施の形態では、複合電子部品1と
回路基板10とをバンプからなる端子電極2aを用いる
ことにより導通接続したが、図9に示すように、これを
用いず外部電極2bのみを用いても良い。
In the present embodiment, the composite electronic component 1 and the circuit board 10 are electrically connected by using the terminal electrodes 2a made of bumps. However, as shown in FIG. 9, the external electrodes 2b are not used. You may use only.

【0035】また、本実施の形態では、チップ状電子部
品2は全て同一寸法のものを用いたが、いろいろな寸法
のチップ状電子部品が混在しても、そのバラツキが幅方
向又は長さ方向である場合は、図10に示すように、チ
ップ状電子部品2とスペーサー4を混在させて密着集合
させ、高さが異なるチップ状電子部品が混在する場合
は、図11に示すように、保持基板3に塗布する接着剤
3aの量を多めにして隙間を充填させることによって、
種々の寸法のチップ状電子部品2を用いることができ
る。また、図10に示すように、スペーサー4によって
複合電子部品1のチップ状電子部品2の個数を調整する
こともできる。
Further, in the present embodiment, all the chip-shaped electronic components 2 having the same size are used, but even if the chip-shaped electronic components of various sizes are mixed, the variation is the width direction or the length direction. 10 shows, as shown in FIG. 10, the chip-shaped electronic components 2 and the spacers 4 are mixed and brought into close contact with each other, and when chip-shaped electronic components having different heights are mixed, as shown in FIG. By filling the gap by increasing the amount of the adhesive 3a applied to the substrate 3,
Chip-shaped electronic components 2 having various sizes can be used. Further, as shown in FIG. 10, the number of chip-shaped electronic components 2 of the composite electronic component 1 can be adjusted by the spacer 4.

【0036】さらに、保持基板3をチップ状電子部品2
に接着する接着剤3aとして、発泡剥離性の接着剤を用
いることにより、複合電子部品1を回路基板10に搭載
しボンディング等によって実装する際の熱を用いて、回
路基板10への実装後に保持基板3をチップ状電子部品
2から剥離しても良い。この場合、回路基板10に実装
する部品高さに制限があるときに特に有効である。
Further, the holding substrate 3 is used as the chip-shaped electronic component 2
By using a foam-peelable adhesive as the adhesive 3a that adheres to the circuit board 10, heat is applied when the composite electronic component 1 is mounted on the circuit board 10 and mounted by bonding or the like, and is retained after mounting on the circuit board 10. The substrate 3 may be separated from the chip-shaped electronic component 2. In this case, it is particularly effective when the height of the components mounted on the circuit board 10 is limited.

【0037】さらに、本実施の形態では、チップ状電子
部品2を保持基板3により保持しているが、図12
(a)に示すように、この保持基板3を用いず、前述し
た高粘度の接着剤3aをチップ状電子部品2の上にのせ
スキージ32によって余分な接着剤3aを除去し、これ
を乾燥硬化させることによって図12(b)に示す複合
電子部品1を製造することもできる。
Further, in the present embodiment, the chip-shaped electronic component 2 is held by the holding substrate 3, but FIG.
As shown in (a), the holding substrate 3 is not used, the above-mentioned high-viscosity adhesive 3a is placed on the chip-shaped electronic component 2, the excess adhesive 3a is removed by the squeegee 32, and this is dried and cured. By doing so, the composite electronic component 1 shown in FIG. 12B can also be manufactured.

【0038】さらに、本実施の形態では、チップ状電子
部品2を端面及び側面で密着集合させる方法として、固
定支持部材30並びに可動押圧部材31a及び31bを
用いたが(図7参照)、以下に示す方法によってもチッ
プ状電子部品2を端子電極2aが格子状に配置されるよ
うに集合させることができる。すなわち、図13に示す
ように、格子状に配置された電極位置規制孔41を設け
た電極位置規制部材40を用いて、該電極位置規制孔4
1にチップ状電子部品2の端子電極2aが保持されるよ
うにチップ状電子部品2を配置し、その後に、上面に保
持基板3を付設するものである。この方法によれば、チ
ップ状電子部品2の寸法にバラツキがある場合であって
も、端子電極2aを精度良く格子状に配置することがで
きる。
Further, in the present embodiment, the fixed support member 30 and the movable pressing members 31a and 31b are used as a method of closely gathering the chip-shaped electronic component 2 on the end face and the side face (see FIG. 7). Also by the method shown, the chip-shaped electronic components 2 can be assembled so that the terminal electrodes 2a are arranged in a grid pattern. That is, as shown in FIG. 13, by using the electrode position regulating member 40 provided with the electrode position regulating holes 41 arranged in a grid pattern, the electrode position regulating holes 4 are formed.
1, the chip-shaped electronic component 2 is arranged so that the terminal electrode 2a of the chip-shaped electronic component 2 is held, and then the holding substrate 3 is attached to the upper surface. According to this method, the terminal electrodes 2a can be arranged in a grid pattern with high accuracy even if the dimensions of the chip-shaped electronic component 2 vary.

【0039】次に、第2の実施の形態に係る複合電子部
品及びその製造方法について図14及び図15を参照し
て説明する。図において、21は複合電子部品、22は
チップ状電子部品、22aは端子電極、22bは外部電
極、23は保持基板、23aは第1の電極、23bは第
2の電極、23cは接続用電極である。
Next, a composite electronic component and a method of manufacturing the same according to the second embodiment will be described with reference to FIGS. 14 and 15. In the figure, 21 is a composite electronic component, 22 is a chip-shaped electronic component, 22a is a terminal electrode, 22b is an external electrode, 23 is a holding substrate, 23a is a first electrode, 23b is a second electrode, and 23c is a connecting electrode. Is.

【0040】本実施の形態に係る複合電子部品21が第
1の実施の形態に係る複合電子部品1と相違するところ
は、チップ状電子部品22の端子電極22aがある側に
保持基板23を設け、この保持基板23によってチップ
状電子部品22を密着集合させた状態で一体に保持する
とともに、保持基板30の裏面に設けられた第2の電極
23bを複合電子部品1の電極としたことにある。
The difference between the composite electronic component 21 according to the present embodiment and the composite electronic component 1 according to the first embodiment is that the holding substrate 23 is provided on the side of the chip-shaped electronic component 22 where the terminal electrode 22a is located. The holding substrate 23 integrally holds the chip-shaped electronic components 22 in a state where they are closely attached to each other, and the second electrode 23b provided on the back surface of the holding substrate 30 is used as an electrode of the composite electronic component 1. .

【0041】この複合電子部品21について、その製造
方法をもって説明すると、まず、第1の実施の形態と同
様に固定支持部材30並びに可動押圧部材31a及び3
1bを用いてチップ状電子部品22を密着集合させる
が、ここでは端子電極22aを上に向けて密着集合させ
る。尚、ここでチップ状電子部品22は第1の実施の形
態で用いられるものと同様である。
The method of manufacturing the composite electronic component 21 will be described. First, similarly to the first embodiment, the fixed support member 30 and the movable pressing members 31a and 3 are used.
The chip-shaped electronic components 22 are brought into close contact with each other by using 1b, but here, the terminal electrodes 22a are turned up and brought into close contact. Here, the chip-shaped electronic component 22 is the same as that used in the first embodiment.

【0042】次に、片面に0.5mm間隔で第1の電極
23aを設けるとともに、接続用電極23c及びスルー
ホールを介して第1の電極23aと導通接続する第2の
電極23bを反対面に設けた保持基板23を、チップ状
電子部品22の端子電極22aと保持基板23の第1の
電極23aが導通するように圧着接続させる。この接続
によりチップ状電子部品22と保持基板23は端子電極
22a′で導通接続されることになる。
Next, the first electrodes 23a are provided on one surface at intervals of 0.5 mm, and the second electrodes 23b which are conductively connected to the first electrodes 23a through the connecting electrodes 23c and through holes are provided on the opposite surface. The holding substrate 23 provided is pressure-bonded so that the terminal electrode 22a of the chip-shaped electronic component 22 and the first electrode 23a of the holding substrate 23 are electrically connected. By this connection, the chip-shaped electronic component 22 and the holding substrate 23 are electrically connected by the terminal electrode 22a '.

【0043】これにより、図15に示すように、チップ
状電子部品22は保持基板23の第1の端子電極23a
と端子電極22a′を介して導通接続しながら一体に保
持され、保持基板23の第1の電極23aと導通接続す
る第2の電極23bがこの複合電子部品21の底面であ
って所定間隔の格子の交点上に露出することになる。
As a result, as shown in FIG. 15, the chip-shaped electronic component 22 has the first terminal electrode 23a of the holding substrate 23.
The second electrode 23b, which is held integrally while being conductively connected via the terminal electrode 22a 'and is conductively connected to the first electrode 23a of the holding substrate 23, is the bottom surface of the composite electronic component 21 and has a grid at a predetermined interval. It will be exposed on the intersection of.

【0044】この複合電子部品21によれば、チップ状
電子部品22の寸法にバラツキがあっても、このバラツ
キを保持基板23によって吸収され、複合電子部品21
の底面に露出する第2の電極23bを精度良く同一平面
上であって所定間隔の格子の交点上に配置することがで
きる。その他の作用,効果は第1の実施の形態に係る複
合電子部品1と同様である。
According to the composite electronic component 21, even if the dimensions of the chip-shaped electronic component 22 vary, the variation is absorbed by the holding substrate 23, and the composite electronic component 21.
The second electrode 23b exposed on the bottom surface of the can be accurately arranged on the same plane and at the intersections of the lattices at predetermined intervals. Other functions and effects are similar to those of the composite electronic component 1 according to the first embodiment.

【0045】尚、図16に示すように、第1の実施の形
態に係る複合電子部品1と同様にして、チップ状電子部
品22の上面に保持部材を設けたものに、本実施の形態
で用いた保持基板23を付設しても良い。この場合、複
合電子部品21は密着強度がさらに向上したものとな
る。
As shown in FIG. 16, in the same manner as the composite electronic component 1 according to the first embodiment, a chip-shaped electronic component 22 provided with a holding member on the upper surface thereof is used in the present embodiment. The holding substrate 23 used may be attached. In this case, the composite electronic component 21 has further improved adhesion strength.

【0046】[0046]

【発明の効果】以上詳述したように、請求項1の発明に
よれば、チップ状電子部品の端子電極が一表面のみに設
けられており、その端子電極が複合電子部品の底面に配
置されるように一体に保持されているので、これらチッ
プ状電子部品同士の間隔を小さくして実装密度を向上す
ることができる。また、複数のチップ状電子部品を一度
に回路基板に搭載することができるので実装コストを低
減することができる。さらに、端子電極が複合電子部品
の底面における所定間隔の格子の交点上に配置されるこ
とから、CSPやBGA等の半導体パッケージと同様に
取扱いが可能となり、回路基板の設計等が容易となり、
また、実装コストを低減することができる。さらに、チ
ップ状電子部品として種々の定数の抵抗,コンデンサ,
インダクタ等を混在させることができるので、複合電子
部品及び回路基板の設計が容易であり、かつ、設計変更
にも容易かつ安価に対応することができる。
As described in detail above, according to the invention of claim 1, the terminal electrode of the chip-shaped electronic component is provided only on one surface, and the terminal electrode is arranged on the bottom surface of the composite electronic component. As described above, since they are integrally held, it is possible to reduce the interval between these chip-shaped electronic components and improve the packaging density. Moreover, since a plurality of chip-shaped electronic components can be mounted on the circuit board at once, the mounting cost can be reduced. Further, since the terminal electrodes are arranged on the intersections of the lattices at the predetermined intervals on the bottom surface of the composite electronic component, they can be handled like semiconductor packages such as CSP and BGA, and the design of the circuit board and the like can be facilitated.
Also, the mounting cost can be reduced. Furthermore, as chip-shaped electronic parts, various constant resistors, capacitors,
Since the inductors and the like can be mixed, the composite electronic component and the circuit board can be easily designed, and the design change can be easily and inexpensively dealt with.

【0047】また、請求項2の発明によれば、チップ状
電子部品の端子電極が、保持部材表面に設けられた第1
の電極と導通接続して一体に保持され、さらに第1の電
極と導通接続する第2の電極が保持部材の裏面であって
所定間隔の格子の交点上に設けられているので、チップ
状電子部品の寸法に影響を受けず、複合電子部品の底面
に第2の電極を精度良く配置することができる。その他
の効果は請求項1記載の発明と同様である。
According to the second aspect of the invention, the terminal electrode of the chip-shaped electronic component is provided on the surface of the holding member.
The second electrode, which is conductively connected to the first electrode and is integrally held, and the second electrode, which is conductively connected to the first electrode, is provided on the back surface of the holding member and on the intersection of the grids at the predetermined intervals. The second electrode can be accurately arranged on the bottom surface of the composite electronic component without being affected by the dimensions of the component. The other effects are the same as those of the invention of claim 1.

【0048】さらに、請求項3記載の発明によれば、チ
ップ状電子部品が底面に所定間隔をもって配置された端
子電極を備えた直方体形状のもので、その側面又は端面
を密着して一体に保持されているので、複合電子部品は
実装密度が向上したものとなる。その他の効果は、請求
項1及び請求項2の発明と同様である。
Further, according to the third aspect of the invention, the chip-shaped electronic component is a rectangular parallelepiped having the terminal electrodes arranged on the bottom face at a predetermined interval, and the side faces or the end faces thereof are adhered and held integrally. Therefore, the composite electronic component has improved packaging density. Other effects are similar to those of the inventions of claims 1 and 2.

【0049】さらに、請求項4乃至請求項6の発明によ
れば、請求項1乃至請求項3記載の発明に係る複合電子
部品を容易かつ確実に製造することができる。
Furthermore, according to the inventions of claims 4 to 6, the composite electronic component according to the inventions of claims 1 to 3 can be easily and reliably manufactured.

【0050】さらに、請求項7の発明によれば、互いに
側面及び端面を密着するように集合させることにより、
複合電子部品の底面における前記所定間隔の格子の交点
上に端子電極が確実に配置される。これにより請求項1
乃至請求項6記載の複合電子部品を容易に製造すること
ができる。
Further, according to the invention of claim 7, by assembling the side surfaces and the end surfaces so as to be in close contact with each other,
The terminal electrodes are reliably arranged on the intersections of the grids at the predetermined intervals on the bottom surface of the composite electronic component. Claim 1 by this
Therefore, the composite electronic component according to claim 6 can be easily manufactured.

【図面の簡単な説明】[Brief description of drawings]

【図1】第1の実施の形態に係る複合電子部品の斜視図FIG. 1 is a perspective view of a composite electronic component according to a first embodiment.

【図2】複合電子部品を構成するチップ状電子部品の外
観側面図
FIG. 2 is an external side view of a chip-shaped electronic component that constitutes a composite electronic component.

【図3】複合電子部品を構成するチップ状電子部品の外
観底面図
FIG. 3 is an external bottom view of a chip-shaped electronic component forming the composite electronic component.

【図4】複合電子部品を構成するチップ状抵抗器の側面
断面図
FIG. 4 is a side sectional view of a chip resistor that constitutes a composite electronic component.

【図5】複合電子部品を構成するチップ状積層コンデン
サの側面断面図
FIG. 5 is a side sectional view of a chip-shaped multilayer capacitor that constitutes a composite electronic component.

【図6】複合電子部品を構成するチップ状積層インダク
タの側面断面図
FIG. 6 is a side sectional view of a chip-shaped laminated inductor which constitutes a composite electronic component.

【図7】第1の実施の形態に係る複合電子部品の製造手
順を説明する図
FIG. 7 is a diagram illustrating a manufacturing procedure of the composite electronic component according to the first embodiment.

【図8】第1の実施の形態に係る複合電子部品の製造手
順を説明する図
FIG. 8 is a diagram illustrating a manufacturing procedure of the composite electronic component according to the first embodiment.

【図9】複合電子部品構成するチップ状電子部品の外観
側面図及び底面図
FIG. 9 is an external side view and a bottom view of a chip-shaped electronic component that constitutes a composite electronic component.

【図10】第1の実施の形態に係る複合電子部品の他の
製造手順を説明する図
FIG. 10 is a view explaining another manufacturing procedure of the composite electronic component according to the first embodiment.

【図11】第1の実施の形態に係る他の複合電子部品FIG. 11 is another composite electronic component according to the first embodiment.

【図12】第1の実施の形態に係る複合電子部品の他の
製造手順を説明する図
FIG. 12 is a view for explaining another manufacturing procedure of the composite electronic component according to the first embodiment.

【図13】第1の実施の形態に係る複合電子部品の他の
製造手順を説明する図
FIG. 13 is a view for explaining another manufacturing procedure of the composite electronic component according to the first embodiment.

【図14】第2の実施の形態に係る複合電子部品の製造
手順を説明する図
FIG. 14 is a diagram illustrating a manufacturing procedure of the composite electronic component according to the second embodiment.

【図15】第2の実施の形態に係る複合電子部品の側面
断面図
FIG. 15 is a side sectional view of the composite electronic component according to the second embodiment.

【図16】第2の実施の形態に係る他の複合電子部品の
側面断面図
FIG. 16 is a side sectional view of another composite electronic component according to the second embodiment.

【符号の説明】[Explanation of symbols]

1…複合電子部品、2…チップ状電子部品、2a…端子
電極、3…保持基板、3a…接着剤、10…回路基板、
11…ランド、21…複合電子部品、22…チップ状電
子部品、22a…端子電極、23…保持基板、23a…
第1の電極、23b…第2の電極、30…固定支持部
材、31…可動押圧部材、40…電極位置規制部材。
DESCRIPTION OF SYMBOLS 1 ... Composite electronic component, 2 ... Chip electronic component, 2a ... Terminal electrode, 3 ... Holding substrate, 3a ... Adhesive agent, 10 ... Circuit board,
11 ... Land, 21 ... Composite electronic component, 22 ... Chip electronic component, 22a ... Terminal electrode, 23 ... Holding substrate, 23a ...
1st electrode, 23b ... 2nd electrode, 30 ... Fixed support member, 31 ... Movable pressing member, 40 ... Electrode position control member.

フロントページの続き (56)参考文献 特開 平7−37757(JP,A) 実開 昭63−112367(JP,U) (58)調査した分野(Int.Cl.7,DB名) H01G 4/00 - 4/10 H01G 4/14 - 4/42 H01G 13/00 - 13/06 Continuation of front page (56) Reference JP-A-7-37757 (JP, A) Actual development Sho 63-112367 (JP, U) (58) Fields investigated (Int.Cl. 7 , DB name) H01G 4 / 00-4/10 H01G 4/14-4/42 H01G 13/00-13/06

Claims (7)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 端子電極を備える複数のチップ状電子部
品と、これらチップ状電子部品を一体に保持する保持部
材からなり、その底面を回路基板に対向して搭載する複
合電子部品において、 前記チップ状電子部品は、その一表面のみに端子電極を
備え、 前記保持部材は、複合電子部品の底面における所定間隔
の格子の交点上に前記端子電極が配置されるように側面
又は端面を密着させてチップ状電子部品を一体に保持し
ていることを特徴とする複合電子部品。
1. A composite electronic component comprising a plurality of chip-shaped electronic components provided with terminal electrodes and a holding member for integrally holding these chip-shaped electronic components, the bottom surface of which is mounted facing a circuit board, wherein the chip is provided. The electronic component is provided with a terminal electrode only on one surface thereof, and the holding member is a side surface so that the terminal electrode is arranged on an intersection of lattices at predetermined intervals on the bottom surface of the composite electronic component.
Alternatively , the composite electronic component is characterized in that the chip-shaped electronic components are integrally held by bringing the end faces into close contact with each other.
【請求項2】 端子電極を備える複数のチップ状電子部
品と、これらチップ状電子部品を一体に保持する保持部
材からなり、その底面を回路基板に対向して搭載する複
合電子部品において、 前記チップ状電子部品は、その一表面のみに端子電極を
備え、 前記保持部材は、表面に第1の電極を所定間隔の格子の
交点上に配置されるように設けるとともに裏面に第1の
電極と導通接続する第2の電極を設けた基板からなり、
チップ状電子部品の端子電極と該端子電極に対応する第
1の電極とを導通接続して該チップ状電子部品を一体に
保持していることを特徴とする複合電子部品。
2. A composite electronic component comprising a plurality of chip-shaped electronic components provided with terminal electrodes and a holding member for integrally holding these chip-shaped electronic components, the bottom surface of which is mounted facing a circuit board. The electronic component is provided with a terminal electrode only on one surface thereof, and the holding member is provided with a first electrode on the front surface so as to be disposed on an intersection of lattices with a predetermined interval, and is electrically connected to the first electrode on the back surface. Consisting of a substrate with a second electrode to connect to,
A composite electronic component, characterized in that a terminal electrode of the chip-shaped electronic component and a first electrode corresponding to the terminal electrode are conductively connected to hold the chip-shaped electronic component integrally.
【請求項3】 直方体形状のチップ状電子部品の底面に
前記所定間隔の整数倍の間隔をもって端子電極を備え、 前記保持部材は、該チップ状電子部品を互いに側面又は
端面を密着して一体に保持していることを特徴とする請
求項1又は請求項2記載の複合電子部品。
3. A chip-shaped electronic component having a rectangular parallelepiped shape is provided with terminal electrodes on a bottom surface thereof at an interval that is an integral multiple of the predetermined interval, and the holding member integrally integrates the chip-shaped electronic components with their side surfaces or end faces in close contact with each other. The composite electronic component according to claim 1 or 2, which is held.
【請求項4】 端子電極を備える複数のチップ状電子部
品と、これらチップ状電子部品を一体に保持する保持部
材からなり、その底面を回路基板に対向して搭載する複
合電子部品の製造方法において、 一表面のみに端子電極を備えたチップ状電子部品を、そ
の端子電極が所定間隔の格子の交点上に配置されるよう
側面又は端面を密着させて集合させ、 チップ状電子部品の上面に亘って保持部材を付設してチ
ップ状電子部品を一体に保持したことを特徴とする複合
電子部品の製造方法。
4. A method for manufacturing a composite electronic component, comprising: a plurality of chip-shaped electronic components provided with terminal electrodes; and a holding member for integrally holding these chip-shaped electronic components, the bottom surface of which is mounted facing a circuit board. , The chip-shaped electronic component equipped with the terminal electrode only on one surface is assembled by adhering the side surface or the end face so that the terminal electrode is arranged on the intersection of the grid at the predetermined intervals. A method of manufacturing a composite electronic component, wherein a chip-shaped electronic component is integrally held by additionally attaching a holding member.
【請求項5】 端子電極を備える複数のチップ状電子部
品と、これらチップ状電子部品を一体に保持する保持部
材からなり、その底面を回路基板に対向して搭載する複
合電子部品の製造方法において、 一表面のみに端子電極を備えたチップ状電子部品を、そ
の端子電極が所定間隔の格子の交点上に配置されるよう
に集合させ、 その表面であって所定間隔の格子の交点上に第1の電極
を設けるとともに、裏面に第1の電極と導通接続する第
2の電極を設けた基板からなる保持部材により、第1の
電極と前記チップ状電子部品の端子電極とが導通接続し
てチップ状電子部品を一体に保持したことを特徴とする
複合電子部品の製造方法。
5. A method for manufacturing a composite electronic component, comprising: a plurality of chip-shaped electronic components having terminal electrodes; and a holding member for integrally holding these chip-shaped electronic components, the bottom surface of which is mounted facing a circuit board. , The chip-shaped electronic components having terminal electrodes only on one surface are assembled so that the terminal electrodes are arranged on the intersections of the grids with a predetermined interval, and the chip-shaped electronic components are arranged on the surface with the intersections of the grids with the predetermined interval. The first electrode is electrically connected to the terminal electrode of the chip-shaped electronic component by the holding member made of a substrate provided with the first electrode and the second electrode provided on the back surface to electrically connect with the first electrode. A method for manufacturing a composite electronic component, characterized in that a chip-shaped electronic component is held integrally.
【請求項6】 直方体形状のチップ状電子部品の底面に
前記所定間隔の整数倍の間隔をもって端子電極を設け、 該チップ状電子部品を互いに側面又は端面を密着して集
合させたことを特徴とする請求項4又は請求項5記載の
複合電子部品の製造方法。
6. A chip-shaped electronic component in the shape of a rectangular parallelepiped is provided with terminal electrodes on the bottom surface at an interval which is an integral multiple of the predetermined interval, and the chip-shaped electronic components are assembled with their side surfaces or end faces in close contact with each other. 6. The method for manufacturing the composite electronic component according to claim 4 or 5.
【請求項7】 前記請求項1乃至請求項6記載の複合電
子部品を構成するチップ状電子部品において、 直方体形状のチップ状電子部品の底面が前記所定間隔の
整数倍の幅及び長さを備え、 該底面を前記所定間隔と同一長さを一辺とする複数の正
方形領域に分割した際の該正方形領域の中心位置に端子
電極を設けたことを特徴とするチップ状電子部品。
7. The chip-shaped electronic component constituting the composite electronic component according to claim 1, wherein the bottom surface of the rectangular parallelepiped chip-shaped electronic component has a width and a length that are integral multiples of the predetermined interval. A chip-shaped electronic component, wherein a terminal electrode is provided at a central position of the square area when the bottom surface is divided into a plurality of square areas each having a length equal to the predetermined interval.
JP20470897A 1997-07-30 1997-07-30 Composite electronic component, method of manufacturing the same, and chip-shaped electronic component Expired - Fee Related JP3406482B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20470897A JP3406482B2 (en) 1997-07-30 1997-07-30 Composite electronic component, method of manufacturing the same, and chip-shaped electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20470897A JP3406482B2 (en) 1997-07-30 1997-07-30 Composite electronic component, method of manufacturing the same, and chip-shaped electronic component

Publications (2)

Publication Number Publication Date
JPH1154367A JPH1154367A (en) 1999-02-26
JP3406482B2 true JP3406482B2 (en) 2003-05-12

Family

ID=16495007

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Country Status (1)

Country Link
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US7426102B2 (en) * 2006-05-01 2008-09-16 Vishay Intertechnology, Inc. High precision capacitor with standoff
JP4850793B2 (en) * 2007-07-19 2012-01-11 株式会社日本自動車部品総合研究所 Capacitor layout

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Publication number Priority date Publication date Assignee Title
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Also Published As

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