JP3403338B2 - Power semiconductor module - Google Patents
Power semiconductor moduleInfo
- Publication number
- JP3403338B2 JP3403338B2 JP20866698A JP20866698A JP3403338B2 JP 3403338 B2 JP3403338 B2 JP 3403338B2 JP 20866698 A JP20866698 A JP 20866698A JP 20866698 A JP20866698 A JP 20866698A JP 3403338 B2 JP3403338 B2 JP 3403338B2
- Authority
- JP
- Japan
- Prior art keywords
- power semiconductor
- semiconductor chip
- soldered
- metal base
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は電力用半導体モジュ
ールに関するものである。
【０００２】
【従来の技術】この種の電力用半導体モジュールに図２
に示すようなものがある。図２において，１はＩＧＢ
Ｔ，ＭＯＳＦＥＴ，バイポーラトランジスタ，サイリス
タ，ダイオード等の電力用半導体チップである。２はＣ
ＢＣ基板で，絶縁用のセラミックス板３の一方の表面に
は銅板４が分子結合された状態で貼り付けられ，また，
他方の表面には銅回路５がセラミックス板３に分子結合
された状態で張り付けられている。この銅回路５上の所
要個所に一方の出力端子板６ａが半田付けされ，さらに
出力端子板６ａ上には，電力用半導体チップ１が半田付
けされている。また，電力用半導体チップの上に他方の
出力端子板６ｂが半田付けされている。この電力用半導
体チップ１が搭載されたＣＢＣ基板が，銅，鉄などの金
属ベース８に半田付けされている。この後、金属ベース
８上に樹脂製ケース９を接着し，このケース内に樹脂１
０を注入して封止している。
【０００３】この電力用半導体モジュールを実装し、電
流を流して使用した時，電力用半導体チップ１は発熱す
る。この発熱した電力用半導体チップ１の熱は，ＣＢＣ
基板２を介して金属ベース８に伝導し，金属ベース８が
固定された放熱器から放出する。
【０００４】
【発明が解決しようとする課題】しかし，この電力用半
導体モジュールは，電力用半導体チップの一方向から金
属ベース８，放熱器を介して放熱されるので熱設計を十
分大きくとる必要があった。
【０００５】
【課題を解決するための手段】請求項１の電力用半導体
モジュールは，金属ベースと，この金属ベースに半田付
けされ，絶縁用のセラミックス板と，このセラミックス
板の一方の表面に貼られた銅板と，他方の表面に貼られ
た銅回路とにより構成されたＣＢＣ基板と，上記銅回路
上に半田付けされた電力用半導体チップと，上記電力用
半導体チップの上部に直接半田付けされ，一旦下方に折
り曲げられ，底部が上記ＣＢＣ基板に接触し，上記底部
が上記ＣＢＣ基板に半田付けされた外部引き出し用の出
力端子板とにより構成されている。
【０００６】すなわち，銅回路上に電力用半導体チップ
が半田付けされ，この銅回路を貼り付けたＣＢＣ基板を
金属ベースに半田付けされる。一方，電力用半導体チッ
プの上部に直接外部引き出し用の出力端子板が半田付け
され，さらにこの出力端子板が途中の底部でＣＢＣ基板
に半田付けされている。
【０００７】従って電力用半導体モジュールを使用した
時に発生する電力用半導体チップの熱は，電力用半導体
チップの一方の表面は，ＣＢＣ基板を介して金属ベース
に放出されるとともに，電力用半導体チップの他の表面
は外部引き出し用の出力端子板からＣＢＣ基板，金属ベ
ースを介して放出される。
【０００８】
【発明の実施の形態】本発明の実施の形態を図１に基づ
いて説明する。図１において，図２と同一符号のものは
同一機能のものを示す。図１が図２と異なる点は，図２
では電力用半導体チップ１に直接又は銅回路上に板状の
出力端子板６ａ，６ｂが設けられ，樹脂ケースの外部に
引き出されているのに対し，図１では電力用半導体チッ
プ上に設けられた出力端子は，一旦ＣＢＣ基板の銅回路
に半田付けされた後，樹脂ケースの外部に引き出されて
いる点にある。
【０００９】すなわち，１はＩＧＢＴ，ＭＯＳＦＥＴ，
バイポーラトランジスタ，サイリスタ等の電力用半導体
チップである。２はＣＢＣ基板で，絶縁用のセラミック
ス板３の一方の表面には，分子結合された状態で張り付
けられ，また，他方の表面には銅回路５がセラミックス
板３に分子結合された状態で貼り付けられている。８は
金属ベースで，金属ベース８の上に半田箔が搭載又はク
リーム半田が塗布され，この半田上にＣＢＣ基板２が搭
載される。ＣＢＣ基板の所定個所に半田箔が搭載，又は
クリーム半田が塗布され，この半田上に外部に引き出す
第１の出力端子板７ａが搭載される。この出力端子板７
ａの上に，半田箔が搭載，又はクリーム半田が塗布さ
れ，この半田上に電力用半導体チップ１が搭載される。
さらに，この電力用半導体チップ１の上に半田箔が搭
載，又はクリーム半田が塗布され，外部に引き出す第２
の出力端子板７ｂが搭載される。
【００１０】上記，第２の出力端子板７ｂは，一旦下方
に折り曲げられ，底部７ｂ１がＣＢＣ基板２に接触して
いる。この出力端子７ｂの底部７ｂ１と，ＣＢＣ基板２
との間には，半田が設けられている。そして，これをリ
フロー炉に投入し，金属ベース８，ＣＢＣ基板２，第１
出力端子板７ａ，電力用半導体チップ１，第２の出力端
子７ｂが半田付けされるとともに，第２の出力端子板７
ｂとＣＢＣ基板２との間も半田付けされる。この後，金
属ベース８上に，樹脂ケース９を接着し，このケース内
に樹脂１０を注入して，電力用半導体チップ１が封止さ
れている。
【００１１】この電力用半導体モジュールを実装し，電
流を流して使用したとき，電力用半導体チップ１は発熱
する。この発熱した電力用半導体チップ１の熱は，出力
端子板７ａ，ＣＢＣ基板２を介して金属ベース８に伝導
するとともに，電力用半導体チップ１の熱は，第２の出
力端子板７ｂとその底部７ｂ１，ＣＢＣ基板２を介して
金属ベース８に伝導する。そして，熱は金属ベース８か
ら図示しない放熱器を介して効率よく放出される。
【００１２】すなわち，電力用半導体チップ１の熱は両
面から金ＣＢＣ基板２，金属ベース６を介して放出され
る。このため，金属ベース６が取れ付けられる放熱器を
小さくすることができる。
【００１３】上記実施の形態では，１個の電力用半導体
チップについて説明しているが，２個以上のものにも適
用できる。
【００１４】
【発明の効果】本発明の電力用半導体モジュールによる
と，その使用時に電力用半導体チップから発生する熱
は，電力用半導体チップの両面からＣＢＣ基板を介して
金属ベースから効率よく放出される。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor module. 2. Description of the Related Art FIG.
There is something like that shown in In FIG. 2, 1 is IGB
It is a power semiconductor chip such as T, MOSFET, bipolar transistor, thyristor, diode and the like. 2 is C
On a BC substrate, a copper plate 4 is attached to one surface of an insulating ceramic plate 3 in a state of being molecularly bonded.
On the other surface, a copper circuit 5 is attached in a state of being molecularly bonded to the ceramic plate 3. One output terminal plate 6a is soldered to a required portion on the copper circuit 5, and the power semiconductor chip 1 is further soldered on the output terminal plate 6a. The other output terminal plate 6b is soldered on the power semiconductor chip. The CBC substrate on which the power semiconductor chip 1 is mounted is soldered to a metal base 8 such as copper or iron. Thereafter, a resin case 9 is bonded onto the metal base 8, and the resin 1 is placed in the case.
0 is injected for sealing. When the power semiconductor module is mounted and used by passing a current, the power semiconductor chip 1 generates heat. The generated heat of the power semiconductor chip 1 is converted into CBC
The electric current is transmitted to the metal base 8 via the substrate 2 and is emitted from the radiator to which the metal base 8 is fixed. However, in this power semiconductor module, since heat is radiated from one direction of the power semiconductor chip through the metal base 8 and the radiator, it is necessary to take a sufficiently large thermal design. there were. According to the first aspect of the present invention, there is provided a power semiconductor module comprising: a metal base; soldered to the metal base; and a ceramic plate for insulation, and affixed to one surface of the ceramic plate. A CBC substrate composed of a copper plate attached and a copper circuit attached to the other surface, a power semiconductor chip soldered on the copper circuit, and directly soldered on top of the power semiconductor chip. , Once folded down
And the bottom contacts the CBC substrate.
And an output terminal plate for external pull-out soldered to the CBC substrate . That is, a power semiconductor chip is soldered on a copper circuit, and a CBC substrate to which the copper circuit is attached is soldered to a metal base. On the other hand, an output terminal plate for external drawing is directly soldered to the upper part of the power semiconductor chip, and the output terminal plate is further soldered to the CBC substrate at the bottom partway. Accordingly, the heat of the power semiconductor chip generated when the power semiconductor module is used is released on one surface of the power semiconductor chip to the metal base via the CBC substrate, and the heat of the power semiconductor chip is reduced. The other surface is emitted from the output terminal plate for external drawing through the CBC substrate and the metal base. An embodiment of the present invention will be described with reference to FIG. In FIG. 1, those having the same reference numerals as those in FIG. 2 indicate those having the same functions. FIG. 1 differs from FIG.
In FIG. 1, the plate-like output terminal plates 6a and 6b are provided directly on the power semiconductor chip 1 or on a copper circuit, and are drawn out of the resin case. The output terminals are once drawn out of the resin case after being soldered to the copper circuit of the CBC board. That is, 1 is an IGBT, MOSFET,
It is a power semiconductor chip such as a bipolar transistor and a thyristor. Reference numeral 2 denotes a CBC substrate, which is attached to one surface of an insulating ceramic plate 3 in a state of being molecularly bonded, and a copper circuit 5 is bonded to the other surface in a state of being molecularly bonded to the ceramic plate 3. It is attached. Reference numeral 8 denotes a metal base on which a solder foil is mounted or cream solder is applied, and the CBC substrate 2 is mounted on the solder. A solder foil is mounted on a predetermined portion of the CBC substrate, or cream solder is applied, and a first output terminal plate 7a to be drawn out is mounted on the solder. This output terminal plate 7
a, a solder foil or cream solder is applied, and the power semiconductor chip 1 is mounted on the solder.
Further, a solder foil is mounted on the power semiconductor chip 1 or cream solder is applied thereon, and a second
Is mounted. The above-mentioned second output terminal plate 7b is once bent downward, and the bottom 7b1 is in contact with the CBC substrate 2. The bottom 7b1 of the output terminal 7b and the CBC substrate 2
Is provided between them. Then, this is put into a reflow furnace, and the metal base 8, the CBC substrate 2, the first
The output terminal plate 7a, the power semiconductor chip 1 and the second output terminal 7b are soldered and the second output terminal plate 7
b and the CBC board 2 are also soldered. Thereafter, a resin case 9 is adhered onto the metal base 8, and a resin 10 is injected into the case, whereby the power semiconductor chip 1 is sealed. When the power semiconductor module is mounted and used by passing a current, the power semiconductor chip 1 generates heat. The generated heat of the power semiconductor chip 1 is conducted to the metal base 8 via the output terminal plate 7a and the CBC substrate 2, and the heat of the power semiconductor chip 1 is transferred to the second output terminal plate 7b and the bottom thereof. 7b1 and the metal base 8 via the CBC substrate 2. Then, heat is efficiently released from the metal base 8 via a radiator (not shown). That is, the heat of the power semiconductor chip 1 is released from both sides through the gold CBC substrate 2 and the metal base 6. Therefore, the size of the radiator to which the metal base 6 can be attached can be reduced. In the above embodiment, one power semiconductor chip is described, but the present invention can be applied to two or more power semiconductor chips. According to the power semiconductor module of the present invention, heat generated from the power semiconductor chip during use is efficiently radiated from the metal base via the CBC substrate from both sides of the power semiconductor chip. You.
【図面の簡単な説明】
【図１】本発明の電力用半導体モジュールの一実施の形
態を示す断面図である。
【図２】従来の電力用半導体モジュールの断面図であ
る。
【符号の説明】
１ 電力用半導体チップ
２ ＣＢＣ基板
３ セラミックス板
４ 銅板
５ 銅回路
７ａ 第１の出力端子板
７ｂ 第２の出力端子板
７ｂ１ 底部
８ 金属ベース
９ 樹脂ケースBRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view showing an embodiment of a power semiconductor module of the present invention. FIG. 2 is a sectional view of a conventional power semiconductor module. [Description of Signs] 1 power semiconductor chip 2 CBC substrate 3 ceramic plate 4 copper plate 5 copper circuit 7a first output terminal plate 7b second output terminal plate 7b1 bottom 8 metal base 9 resin case
Claims (1)
けされ，絶縁用のセラミックス板とこのセラミックス板
の一方の表面に貼られた銅板と他方の表面に貼られた銅
回路とにより構成されたＣＢＣ基板と，上記銅回路上に
半田付けされた電力用半導体チップと，上記電力用半導
体チップの上部に直接半田付けされ，一旦下方に折り曲
げられ，底部が上記ＣＢＣ基板に接触し，上記底部が上
記ＣＢＣ基板に半田付けられた外部引き出し用の出力端
子板とにより構成された電力用半導体モジュール。(57) [Claim 1] A metal base, a ceramic plate for insulation, soldered to the metal base, a copper plate bonded to one surface of the ceramic plate, and a copper plate bonded to the other surface A CBC substrate composed of a copper circuit, a power semiconductor chip soldered on the copper circuit, and directly soldered on top of the power semiconductor chip, and once bent downward.
The bottom contacts the CBC substrate and the bottom
A power semiconductor module including an output terminal plate for external drawing soldered to the CBC substrate .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20866698A JP3403338B2 (en) | 1998-07-08 | 1998-07-08 | Power semiconductor module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20866698A JP3403338B2 (en) | 1998-07-08 | 1998-07-08 | Power semiconductor module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000031378A JP2000031378A (en) | 2000-01-28 |
| JP3403338B2 true JP3403338B2 (en) | 2003-05-06 |
Family
ID=16560050
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20866698A Expired - Fee Related JP3403338B2 (en) | 1998-07-08 | 1998-07-08 | Power semiconductor module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3403338B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4674482B2 (en) * | 2005-03-28 | 2011-04-20 | パナソニック電工株式会社 | Power converter |
| JP4455488B2 (en) | 2005-12-19 | 2010-04-21 | 三菱電機株式会社 | Semiconductor device |
| JP2019021684A (en) * | 2017-07-12 | 2019-02-07 | 株式会社東芝 | Semiconductor package |
-
1998
- 1998-07-08 JP JP20866698A patent/JP3403338B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000031378A (en) | 2000-01-28 |
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