JP3396351B2 - Filter circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a filter circuit.

[0002]

2. Description of the Related Art Conventionally, an active filter in which an input impedance is connected to an operational amplifier is known, but generally, the operational amplifier is a current drive type device using a differential amplifier and its power consumption is large.

[0003]

SUMMARY OF THE INVENTION The present invention was devised to solve the above-mentioned conventional problems, and an object thereof is to provide a filter circuit with extremely low power consumption.

[0004]

SUMMARY OF THE INVENTION A filter circuit according to the present invention comprises an amplification section composed of an odd number of stages of serial MOS inverters, a ground capacitance connected between the output of the amplification section and ground, and a final stage. A pair of balanced resistances connecting the output of the MOS inverter to the power supply voltage and the ground, a feedback impedance connecting the output of the amplifier to the input, and an input connected to the input of the amplifier. The impedance is used to obtain a predetermined transfer function.

[0005]

According to the filter circuit of the present invention, since the amplifying section is formed by serially connecting the MOS inverters, voltage drive type amplification is performed and power consumption can be reduced.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the filter circuit according to the present invention will be described with reference to the drawings.

In FIG. 1, the filter circuit has an input voltage V
It has an input impedance Iin connected to in and an amplifier AMP connected downstream of this input impedance, and the output of the amplifier AMP is connected to its input via a feedback impedance If.

The amplifier AMP is composed of three stages of serial MOS inverters I1, I2 and I3 connected to a ground capacitance Cg for preventing oscillation and a balanced resistance Re. The grounding capacitance Cg connects the output of the final stage MOS inverter I3 to the ground, and functions as a low pass filter. Balance resistance Re is the second
The output of the inverter I2 is connected, and this output is connected to the power source Vdd.
And a second resistance Re2 connected to the ground. As shown in FIG. 2, the balance resistance Re is set to the first-stage inverter I1.
The same effect can be obtained even if the configuration is connected to the output of.
In the 0.8μ rule LSI, Cg is 20
Good results have been obtained by setting pF and Re1 and Re2 to about 40 KΩ.

An input impedance Iin is connected to the input of the amplifier AMP, and an input voltage Vin is input to the AMP via Iin. The output of the AMP is connected to its input via the feedback impedance If, and the transfer characteristics of the filter circuit are determined by Iin and If.

Since the amplifying unit AMP is composed of a MOS inverter, it consumes less power than a differential amplifier type operational amplifier and can significantly reduce power consumption as compared with a conventional active filter.

The input impedance Iin is a resistance R1 and the feedback impedance If is a parallel circuit of a capacitance C1 and a resistance R2. In such a configuration, the transfer function T (s) is jω = s,

[Equation 1] Becomes

This is a first-order type low-pass filter, and the cutoff frequency ωo is

[Equation 2] Becomes

FIG. 3 shows a second embodiment of the present invention, which differs from the first embodiment only in the input impedance Iin and the feedback impedance If. Input impedance I
in is a series circuit of resistance R1 and capacitance C1, and feedback impedance If is resistance R2.
Is. This circuit functions as a high pass filter and its transfer function T (s) is

[Equation 3] Is. The cutoff frequency is

[Equation 4] Becomes

FIG. 4 shows a third embodiment of the multiple feedback, in which the first input impedance Iin1 is connected to the input of the amplifying unit AMP, and the second input is further provided before Iiin1.
The input impedance Iin2 is connected. The output of the amplification unit AMP is connected to the input of the AMP via the first feedback impedance If1, and further connected to the preceding stage of Iin1 via the second feedback impedance If2.
The connection point between Iin1 and Iin2 has a capacitance C1.
Grounded through.

In the embodiment of FIG. 4, the first input impedance Iin1, the second input impedance Iin2, the first feedback impedance If1, the second feedback impedance If2, the resistance R2 and the resistance R, respectively.
1, capacitance C2, and resistance R3.

The resistor R1 having the second input impedance has one terminal connected to the input voltage Vin and the other terminal C.
1 and Iin1 and a low-pass filter is formed in R1 and C1.

The circuit of this embodiment functions as a low-pass filter as a whole, and its transfer function is

[Equation 5] Becomes

FIG. 5 is a circuit diagram showing a fifth embodiment of the present invention, which is a so-called biquad circuit.

In this embodiment, filter circuits F1, F2 and F3 similar to those in the above embodiment are connected in series, and the output of the final stage filter circuit F3 is input to the amplifier AMP1 of F1 via the feedback impedance If4. Connected.

The filter circuit F1 has an amplifying section A similar to that described above.
It is composed of MP1, an input impedance Iin1, and a feedback impedance If1, where Iin1 is a resistance R1 and If1 is a parallel circuit of a capacitance C1 and a resistance R2.

The filter circuit F2 comprises an amplifier AMP2, an input impedance Iin2, and a feedback impedance If2, and Iin2 is resistance R3, If.
2 is a capacitance C2.

The filter circuit F3 includes an amplifier circuit AMP3, an input impedance Iin3, and a feedback impedance If3.
Iin3 is a resistance, If3
Is resistance R5.

Further, the output of the filter circuit F3 is connected to the input of the amplification section AMP1 via the feedback impedance If4 composed of the resistance R6.

The above filter circuit produces outputs Vout1 and Vout2 from F3 and F2, respectively, and has the characteristics of a low-pass filter. The transfer function of Vout2 is

[Equation 6] Regarding Vout1,

[Equation 7] Becomes

In the above embodiments, the amplifying section is a circuit in which three stages of MOS inverters are connected in series, but any number of stages can be adopted as long as it is an odd number of stages, and a MOS inverter is used for a filter having a relatively low output accuracy. One step is enough. If the number of stages is excessive, a problem of oscillation occurs, and the ground capacitance and the balance resistance increase.

[0026]

As described above, the filter circuit according to the present invention includes an amplifying section composed of odd-numbered series MOS inverters, a ground capacitance connected between the output of the amplifying section and the ground, and a final stage. A pair of balanced resistances connecting the output of the MOS inverter to the power supply voltage and the ground, a feedback impedance connecting the output of the amplifier to the input, and an input connected to the input of the amplifier. Since a predetermined transfer function is obtained by the impedance, voltage-driven amplification is performed, which has an excellent effect of reducing power consumption.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a filter circuit according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the filter circuit according to the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the filter circuit according to the present invention.

FIG. 4 is a circuit diagram showing a fourth embodiment of the filter circuit according to the present invention.

FIG. 5 is a circuit diagram showing a fifth embodiment of the filter circuit according to the present invention.

[Explanation of symbols]

AMP ... Amplifier Iin ... Input impedance If ... Feedback impedance Cg ... Ground capacitance Re… Balance resistance I1, I2, I3 ... MOS inverter Vin ... Input voltage Vout ... Output voltage Vdd ... Power supply voltage.

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Makoto Yamamoto 3-5-18 Kitazawa, Setagaya-ku, Tokyo Takayama Building Co., Ltd. (72) Inventor Nao Takatori 3-5-18 Kitazawa, Setagaya-ku, Tokyo Takayama Bi Takayamauchi Co., Ltd. (56) Reference Japanese Patent Laid-Open No. 7-94957 (JP, A) US Patent 3878881 (US, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H03H 11/12

Claims (9)

(57) [Claims] 1. A power supply for an amplifying section made up of odd-numbered series MOS inverters, a grounding capacitance connected between the output of this amplifying section and ground, and an output of the MOS inverter in a stage preceding the final stage MOS inverter. A filter circuit comprising a balanced resistance consisting of a pair of resistances connected to a voltage and a ground, a feedback impedance connecting an output of the amplification section to an input, and an input impedance connected to an input of the amplification section. 2. The filter circuit according to claim 1, wherein the input impedance is a resistance, and the input impedance is a parallel circuit of a feedback impedance resistance and a capacitance. 3. The filter circuit according to claim 1, wherein the input impedance is a series circuit of resistance and capacitance, and the feedback impedance is resistance. 4. The second input impedance is connected before the input impedance, and the second feedback impedance is further provided for connecting the output of the amplification section to the previous stage of the input impedance. Filter circuit. 5. The filter circuit according to claim 1, wherein the amplification section is composed of three stages of MOS inverters. 6. The filter circuit according to claim 1, wherein the amplification section is composed of a single-stage MOS inverter. 7. A power supply for an amplifying section made up of odd-numbered series MOS inverters, a ground capacitance connected between the output of this amplifying section and ground, and an output of the MOS inverter in a stage preceding the final stage MOS inverter. And a plurality of stages of filter circuits each including a balanced resistance including a pair of resistances connected to the ground, a feedback impedance connecting the output of the amplification unit to the input, and an input impedance connected to the input of the amplification unit. A filter circuit that is connected in series, and further that the output of the final stage amplification section is connected to the input of the first stage inverter via the second feedback impedance. 8. The filter circuit according to claim 7, wherein the filter circuits are provided in three stages in series. 9. The feedback impedance of the first-stage filter circuit is a parallel circuit of resistance and capacitance, its input impedance is resistance, and the feedback impedance of the second-stage filter circuit is capacitance, and that of the third stage. The filter circuit according to claim 7, wherein the feedback impedance and the input impedance of the filter circuit are resistance, and the second feedback impedance is resistance.