JP3392507B2 - Small field emission cathode device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a minute field emission cathode device in which a minute and sharp projection is used as a cathode, and a gate or an anode is arranged in the vicinity of this cathode.

SUMMARY OF THE INVENTION The present invention relates to a technology of a minute electron field emission device (micro cold cathode emitter) in which a minute and sharp projection is used as a cathode and a gate or an anode is arranged in the vicinity of this cathode. By using an amorphous semiconductor material as the cathode constituent material, the efficiency of electron field emission is improved.

[0003]

2. Description of the Related Art Heretofore, the following properties have been required as materials for minute field emission cathode devices.

(1) High melting point (2) Low work function (3) Chemically stable (4) High electron and ion impact resistance (5) Sharp processing is possible And, in fact, W Refractory metals such as (tungsten) and Mo (molybdenum), carbides such as TiC (titanium carbide), and semiconductor materials such as Si (silicon) have been tried.

Further, a metal such as Cs (cesium) or Au (gold), mainly for the purpose of reducing the work function,
Furthermore, a technique for coating the cathode surface with LaB ₆ (lanthanum boride) and the like, and a heat treatment technique for materials have been studied.

Among these various materials, it is known that the following advantages can be obtained when semiconductor, especially Si is used.

(1) Insulating film formation, fine processing technology by photolithography, etching technology, etc.
SI fabrication process technology can be used almost as it is (2) Relatively high melting point (1414 ° C) and chemically stable (3) Work function is comparable to other refractory metals Therefore, at present, a method for producing a minute field emission cathode using Si is widely studied.

[0008]

However, in the method of using Si as the material of the minute field emission cathode, the single crystal Si is conventionally processed to form the minute field emission cathode. There was such a problem.

(1) When a cold cathode array is manufactured, its size is limited to the Si wafer size (up to 4 inches). (2) Etching and sharpening treatment for the tip of the cathode.
Since it is performed in combination with thermal oxidation (up to 1000 ° C),
In the case of performing (3) arraying, which is a high temperature process, in order to apply an electric field, it is unavoidable to form a p region in the surface layer of the n type substrate and to form a cold cathode in this p region. Electron emission characteristics of n-type Si
Therefore, in order to eliminate such problems, single crystal Si
Various methods have been proposed as a method for manufacturing a micro field emission cathode by processing the above, but have not yet solved such a problem.

In view of the above circumstances, the present invention makes it possible to manufacture cold cathode arrays of various sizes without being limited to the Si wafer size while eliminating the need for a high temperature process such as thermal oxidation treatment, and to emit electrons. It is an object of the present invention to provide a minute field emission cathode device whose characteristics can be significantly improved.

[0011]

In order to achieve the above object, the present invention provides, in claim 1, a single or arrayed minute cathode and a gate electrode or an anode electrode arranged in the vicinity of these cathodes. In a minute field emission cathode device in which electrons are emitted from the cathode by an electric field generated between the cathode and the gate electrode or the anode electrode by applying a voltage to the cathode, the composition of the cathode is different from that of the constituent elements. It is characterized by using an amorphous superlattice material in which amorphous semiconductor thin films are combined in layers. According to a second aspect, in the minute field emission cathode device according to the first aspect, the material of the cathode is an amorphous semiconductor deposited by ultra-high vacuum vapor deposition or an amorphous semiconductor deposited by an electron cyclotron resonance plasma deposition method. It is characterized by using one of the semiconductors. According to a third aspect of the present invention, in the minute field emission cathode device according to the first or second aspect, an electrically active impurity is added to an amorphous semiconductor used as a material of the cathode, and a part of these cathodes or It is characterized by lowering the overall resistance.

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In the above structure, by using an amorphous superlattice material in which amorphous semiconductor thin films having different compositions and component elements are combined in layers as a material for the cathode, a high temperature process such as thermal oxidation treatment is unnecessary. However, it is possible to manufacture cold cathode arrays of each size without being limited to the wafer size, and to significantly improve electron emission characteristics. Further, as described in claim 2, as the material of the cathode, either an amorphous semiconductor deposited by ultra-high vacuum vapor deposition or an amorphous semiconductor deposited by electron cyclotron resonance plasma deposition is used. Is preferred. Further, as described in claim 3, it is also preferable to add an electrically active impurity to the amorphous semiconductor used as the material of the cathode to reduce the resistance of a part or the whole of the cathode. .

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EXAMPLES First, prior to a detailed description of the minute field emission cathode device according to the present invention, the properties of amorphous Si used as a material for the minute field emission cathode device according to the present invention will be described.

Usually, the field emission of electrons in a semiconductor is
It is thought that the tunnel barrier to the vacuum occurs near the small conduction band edge. Therefore, in the case of an ideal defect-free surface, electrons supplied from the donor to the conduction band are emitted as they are in n-type Si, but electrons are thermally excited from the valence band to the conduction band in p-type Si. Release occurs. At this time, if there are many defects that create surface states,
These defects serve as an electron source, and particularly in the case of p-type Si, electrons are easily excited in the conduction band. of course,
Also in the case of n-type Si, the excitation of electrons from the surface level eventually increases electron emission.

That is, in a semiconductor, it is considered that the more surface states that exist, the more they act as an electron source, and the larger the electron emission.

As such a surface state, there is a dangling bond (hereinafter abbreviated as DB).
From the viewpoint of B, the effective DB concentration is not high because the DB is reoriented on the surface of the single crystal. There is also a report that the DB concentration was 10 ¹² cm ^-2 or less when actually measured.

On the other hand, in the amorphous structure, DB is disorderly present, so that reorientation is unlikely to occur, and it is considered that a high concentration of DB is present on the surface. For example, bulk DB
If the concentration is 10 ¹⁹ cm ^-3 , the DB concentration on the surface is 10
^{Reach 13} cm ^-2 (However, the surface atomic density of single crystal is 6 ×
At 10 ¹⁴ cm ^-2 ).

Therefore, it can be expected that the work function of amorphous silicon is relatively smaller than that of single crystal silicon or that there are many electron emission sources.

In fact, in amorphous silicon, the emission current I at the time of field emission can be expressed by the following equation from the Nordheim-Fowler equation obtained based on the tunnel effect.

I = Aexp (Bφ ^3/2 / kF) (1) where A: constant B: constant φ: work function F: electric field strength k: Boltzmann constant and used in this equation (1). The constants A and B are as follows: A = e ³ β ² V ² / 8πhφ (t (y)) ² (2) where V: applied voltage β: electric field strength F (F = βV): electric field strength F ( F = βV) electric field concentration coefficient B = (4 (2m) ^1/2 · v (y)) / 3he (3) where y: y = (e ³ F) ^1/2 / φ Therefore, by rearranging these equations (1) to (3),
The following equation is obtained.

1n (I / V ² ) = (B / k) (φ ^3/2 / β) (1 / V) + C (4) Then, in order to confirm this, an experiment was conducted to confirm As.
Electron emission characteristics (I / V ² of a field emission cathode element composed of amorphous silicon ion-implanted with (arsenic))
(Relationship with 1 / V) and electron emission characteristics (I / V) of a field emission cathode device obtained by polycrystallizing the same kind of material by electric furnace annealing.
² and 1 / V), the characteristic diagram shown in FIG. 7 was obtained. In this case, the amorphous silicon was deposited by ultra-high vacuum, and the bulk DB concentration was 2
It is × 10 ¹⁹ cm ^-3 . The field emission cathode element is a wedge-shaped element formed on the silicon oxide film.

As is clear from this figure, in the field emission cathode device made of amorphous silicon, the linear gradient [(B / k) (φ ^3/2 / β)] becomes smaller,
It can be seen that the emission current density is large especially in the low voltage range. Assuming that there is no great difference in the value of β, it can be seen from the above equation (4) that the work function φ of the amorphous material is smaller than the work function φ of the crystalline material.

From the above consideration, in the present invention, the following effects can be obtained by using an amorphous semiconductor as the cathode material.

(1) A work function φ can be reduced as compared with a single crystal. (2) A large area field emission cathode element array can be manufactured by using a substrate other than a silicon substrate, for example, a glass substrate. (3) The array manufacturing process can be performed at a low temperature by stacking without using a high temperature process such as thermal oxidation. Hereinafter, for the reasons described above, the selected amorphous silicon is used as the material of the cold cathode device. The micro field emission cathode device according to the present invention used as will be described in detail with reference to the drawings.

FIG. 1 is a sectional view showing a first embodiment of a minute field emission cathode device according to the present invention, and FIG. 2 is a top view when the minute field emission cathode device is arrayed.

The vertical type minute field emission cathode element 1 shown in these figures is made of a material such as glass which can be made large in area, and has a flat plate-like substrate 2 which is a base of the minute field emission cathode element 1. A plurality of cathode scanning wirings 3 which are made of strip-shaped low-resistance polycrystalline silicon (n ⁺ type) laminated on the upper surface side of the substrate 2 and to which a voltage is sequentially applied when emitting electrons, and cathodes of each of these. An insulating silicon oxide film 4 laminated on the scanning wiring 3 and the silicon oxide film 4
A plurality of gates, which are made of strip-shaped low-resistance polycrystalline silicon (n ⁺ -type) stacked so as to be orthogonal to the cathode scanning lines 3 and to which a voltage is sequentially applied when emitting electrons. The electrodes 5 and the windows (holes) 6 formed in the gate electrodes 5 so as to penetrate the silicon oxide film 4 are disposed, and the bottom surface is electrically and mechanically arranged on the upper surface of the cathode scanning wiring 3. And a plurality of cathodes 7 made of pure cone type amorphous silicon connected to each other.

Then, by selectively applying a voltage to each gate electrode 5 and sequentially applying a voltage to each cathode scanning wiring 3, the electrodes are arranged on the cathode scanning wiring 3 to which a voltage is applied. Electrons are emitted from the cathode 7 due to an electric field generated between the cathode 7 that is open and the gate electrode 5 to which a voltage is applied.

Next, with reference to FIG. 3, a procedure for manufacturing the minute field emission cathode device 1 shown in FIGS. 1 and 2 will be described.

First, as shown in FIG. 3 (a), a flat plate-shaped substrate 2 is formed from a material such as glass as a base for producing the vertical type minute field emission cathode device 1, and on this substrate 2, After directly depositing heavily doped polycrystalline silicon using a method such as LP-CVD or ECR-CVD, or after depositing pure amorphous silicon using ultra-high vacuum deposition By using a method of implanting electrically active impurities by ion implantation and performing activation treatment by electric furnace annealing at about 600 ° C. for about 1 hour, low resistance polycrystalline silicon for the cathode scan wiring 3 ( n ⁺ type) is deposited.

Next, the low resistance polycrystalline silicon (n ⁺ type) is stripped by using a photolithography technique to form a plurality of cathode scanning wirings 3 and then, as shown in FIG.
As shown in (b), a method such as electron beam vapor deposition or ECR-CVD is used to obtain the low resistance polycrystalline silicon (n
⁽⁺ Type), after depositing the silicon oxide film 4, the silicon oxide film 4 is formed by using a photolithography technique or the like.
Then, the window 6 for the cathode cone forming region is formed.

Next, as shown in FIG. 3 (c), high concentration impurity-doped polycrystalline silicon is directly deposited on the silicon oxide film 4 by a method such as LP-CVD or ECR-CVD. Alternatively, after depositing pure amorphous silicon using ultra-high vacuum evaporation, etc., a gate is formed using a method such as ion implantation of electrically active impurities and activation treatment by electric furnace annealing. Deposit low resistance polycrystalline silicon (n ⁺ type) for electrode 5.

Next, this low resistance polycrystalline silicon (n
^After depositing an aperture mask (sacrificial layer) 9 for cathode deposition on the ⁺ type) by a technique such as oblique deposition so as to make the opening smaller, an aperture is formed by ultra-high vacuum deposition as shown in FIG. 3D. Pure amorphous silicon is deposited on the mask 9, and the low resistance polycrystalline silicon (n ⁺ -type) for the cathode scan wiring 3 is formed through the holes (openings) of the aperture mask 9 and the windows 6. ), Depositing amorphous silicon for the cone cathode 7.

Next, as shown in FIG. 3 (e), after removing the extra amorphous silicon and the aperture mask 9 on the aperture mask 9, the whole substrate 2 and the amorphous material for the cone type cathode 7 are removed. Silicon or the like is annealed at about 450 ° C. for about 1 hour to densify the amorphous silicon.

Further, n-type impurities such as As are ion-implanted in high concentration into the amorphous silicon for the cone type cathode 7 to reduce the resistance of the amorphous silicon. In addition,
The addition process of such n-type impurities may be performed during the vapor deposition of the amorphous silicon for the cone type cathode 7.

By taking such a manufacturing procedure,
With the method for manufacturing the minute field emission cathode device 1 according to this embodiment, the following advantages can be obtained.

(1) All can be processed at low temperature (2) Can be manufactured on a glass substrate (3) Can utilize electron emission characteristics of n-type amorphous silicon FIG. FIG. 5 is a cross-sectional view showing a second embodiment of the minute field emission cathode element according to the present invention, and FIG. 5 is a top view when the minute field emission cathode element is arrayed.

The horizontal type minute field emission cathode element 11 shown in these figures is made of a material such as glass that can be made large in area, and has a flat plate-like substrate 12 as a base of the minute field emission cathode element 11 and A plurality of cathode scanning wirings 13 which are made of strip-shaped low resistance polycrystalline silicon (n ⁺ type) laminated on the upper surface side of the substrate 12 and to which a voltage is sequentially applied when emitting electrons, and each of these cathode scanning wirings. Wiring 13
An insulating silicon oxide film 14 laminated on the silicon oxide film 14, and a strip-shaped low resistance polycrystalline silicon (n ⁺ type) laminated on the silicon oxide film 14 so as to be orthogonal to the cathode scanning wirings 13. And a plurality of gate electrodes 15 to which a voltage is sequentially applied when electrons are emitted, and windows (holes) for extracting each cathode formed in the silicon oxide film 14 so as to penetrate the silicon oxide film 14. ) 16 and the bottom side is the cathode scanning wiring 1
3 and a plurality of cathodes 17 made of pure wedge-shaped amorphous silicon electrically and mechanically connected to the upper surface.

Then, the voltage is sequentially applied to each of the cathode scanning wirings 13 while selectively applying the voltage to each of the gate electrodes 15, thereby arranging on the cathode scanning wirings 13 to which the voltage is applied. Electrons are emitted from the cathode 17 by an electric field generated between the cathode 17 that is open and the gate electrode 15 to which a voltage is applied.

Next, with reference to FIG. 6, a procedure for manufacturing the minute field emission cathode device 11 shown in FIGS. 4 and 5 will be described.

First, as shown in FIG. 6 (a), a flat plate-like substrate 12 is formed from a material such as glass as a base for producing the lateral micro field emission cathode device 11, and LP is formed on the substrate 12. -CVD method, ECR-CVD method or the like is used to directly deposit heavily doped polycrystalline silicon, or ultra-high vacuum evaporation is used to deposit pure amorphous silicon, Low resistance polycrystalline silicon (n ⁺ type) for the cathode scanning line 13 is deposited by a method of ion-implanting electrically active impurities and performing activation treatment by electric furnace annealing.

Next, the low resistance polycrystalline silicon (n ⁺ type) for the cathode scanning wiring 13 is removed in a strip shape by using a photolithography technique, and a plurality of cathode scanning wirings 13 are formed.
Then, as shown in FIG. 6 (b), by using a method such as electron beam vapor deposition or ECR-CVD, on the low resistance polycrystalline silicon (n ⁺ type) for the cathode scanning wiring 13, After depositing the silicon oxide film 14, a window 16 for extracting a cathode is formed in the silicon oxide film 14 by using a photolithography technique or the like.

Next, as shown in FIG. 6C, after depositing high-purity amorphous silicon on the silicon oxide film 14 by ultra-high vacuum vapor deposition or the like, this is deposited at about 450 ° C. for about 1 hour.
Annealing is performed to densify the amorphous silicon, and electrically active impurities such as As are ion-implanted at a high concentration to form a cathode 17 on the amorphous silicon.
Also, it provides characteristics suitable for the gate electrode 15. Note that the doping of these impurities may be performed at the same time when the amorphous silicon is deposited.

Next, as shown in FIG. 6D, the excess portion of the amorphous silicon is removed by using a photolithography technique or the like to form a wedge-shaped cathode 17 and sharpen it, and a strip-shaped gate. After forming the electrode 15, the gate electrode 15 is polycrystallized and metal is vapor-deposited on the gate electrode 15 to complete the lateral micro field emission cathode device 11.

By taking such a manufacturing procedure,
In the method of manufacturing the minute field emission cathode device 11 according to this embodiment, the following advantages can be obtained as in the first embodiment.

(1) All can be processed at a low temperature (2) Can be fabricated on a glass substrate (3) Can utilize electron emission characteristics of n-type amorphous silicon. In the first and second embodiments, the composition and constituent elements of the cathodes 7 and 17 are made uniform, but an amorphous superlattice in which amorphous semiconductor thin films having different compositions and constituent elements are combined in layers Using material, each cathode 7,
It may be configured as 17.

As a result, the same effects as those of the first and second embodiments described above can be obtained, and the electron emission characteristics of the cathodes 7 and 17 can be obtained by appropriately selecting each material and adjusting the characteristics. Can be further improved.

In the first and second embodiments described above, amorphous silicon is used as the material for the cathodes 7 and 17, but a high concentration of polycrystalline semiconductor or single crystal semiconductor is used. The cathodes 7 and 17 may be configured by using a semiconductor in which these surface layers are made amorphous by ion implantation.

As a result, the same effects as those of the first and second embodiments described above can be obtained, and the electron emission characteristics and the like of the cathodes 7 and 17 can be obtained by appropriately selecting each material and adjusting the characteristics. Can be further improved.

In the first and second embodiments described above, the cathodes 7 and 17 are formed by ion-implanting As or the like into amorphous silicon. Of the cathodes 7, 1
A part or the whole of 7 may be made to have a low resistance.

Even in this case, the same effects as those of the above-described first and second embodiments can be obtained.

[0067]

As described above, according to the present invention, a high temperature process such as a thermal oxidation process can be dispensed with, and the cold cathode array of each size can be manufactured without being limited to the wafer size. Therefore, the electron emission characteristics can be significantly improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing a first embodiment of a minute field emission cathode device according to the present invention.

FIG. 2 is a top view when the minute field emission cathode device shown in FIG. 1 is formed into an array.

3A to 3D are schematic views showing an example of a manufacturing procedure of the minute field emission cathode device shown in FIG.

FIG. 4 is a sectional view showing a second embodiment of the minute field emission cathode device according to the present invention.

5 is a plan view when the minute field emission cathode device shown in FIG. 4 is formed into an array. FIG.

6A to 6C are schematic views showing an example of a manufacturing procedure of the minute field emission cathode device shown in FIG.

FIG. 7 is a characteristic diagram showing an electron emission characteristic of a minute field emission cathode element using amorphous silicon as a cathode material and an electron emission characteristic of an element using polycrystalline silicon as a cathode material according to the present invention.

[Explanation of symbols]

1 Vertical micro field emission cathode device 2 substrates 3 Cathode scanning wiring 4 Silicon oxide film 5 Gate electrode 6 windows (holes) 7 cathode 11 Horizontal micro field emission cathode device 12 substrates 13 Cathode scanning wiring 14 Silicon oxide film 15 Gate electrode 16 windows (holes) 17 cathode

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shiro Sato 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the Broadcasting Research Laboratories of the Japan Broadcasting Corporation (56) Reference JP-A-6-60795 (JP, A) HEI 3-238729 (JP, A) JP HEI 6-44893 (JP, A) US Pat. No. 5269877 (US, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01J 1/304

Claims (3)

(57) [Claims] 1. A voltage is applied between a single or arrayed minute cathode and a gate electrode or an anode electrode arranged in the vicinity of these cathodes to generate between the cathode and the gate electrode or the anode electrode. In a minute field emission cathode device that emits electrons from the cathode by a different electric field, as the material of the cathode, an amorphous superlattice material in which amorphous semiconductor thin films having different compositions and component elements are combined in layers is used. A characteristic field emission cathode device. 2. The material of the cathode is either an amorphous semiconductor deposited by ultra-high vacuum evaporation or an amorphous semiconductor deposited by electron cyclotron resonance plasma deposition. 1. The minute field emission cathode device as described in 1. 3. The amorphous semiconductor used as the material of the cathode is doped with an electrically active impurity to reduce the resistance of a part or the whole of the cathode. The minute field emission cathode device as described in 2.