JP3382453B2 - Video signal processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing apparatus and, more particularly, to a technique for correcting a time axis fluctuation of a video signal. 2. Description of the Related Art As a conventional technique for correcting a time axis fluctuation of a video signal, as described in Masui Harada, "All About VTRs", Denpa Shimbun (1990), p. There is known a technique in which a video signal sampled by a clock synchronized with an input signal is written into the video signal and read out by a clock synchronized with a reference signal. [0003] A sync signal is separated from a composite color signal converted into a digital signal by a clock that is not synchronized with the horizontal cycle of the input signal, and YC separation and demodulation processing are performed based on the sync signal. In this case, there is a time lag between the synchronization signal separated from the digital composite color signal and the synchronization position indicated by the analog composite color signal before conversion into a digital signal. When the image is reproduced on the monitor, the screen fluctuates. Even if the synchronization signal is separated by an analog circuit, a similar time lag occurs when the synchronization signal is taken into the YC separation and demodulation processing circuit constituted by a digital circuit. I will. That is, in the above-mentioned conventional technology, no consideration has been given to the correction of the time lag due to the digitization of the composite color signal. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a video signal processing apparatus which corrects a time lag due to digitization of a composite color signal, and is suitable for processing with one system clock and all with digital signals. With the goal. In order to achieve the above object, when a synchronizing signal is separated from a composite color signal converted into a digital signal, a synchronous rising or falling portion of the composite color signal is separated. From the level of at least two composite color signals immediately before reaching the reference level for separating the synchronization signal and immediately after the reference level is exceeded, and the reference level, the instant when the reference level is reached and the synchronization separation are used to determine the actual level. The time difference at which the synchronization signal is separated is calculated by calculation, and video data at a point shifted by the time difference from the point actually sampled when digitizing the composite color signal is calculated by interpolation processing, Means for shifting the center of gravity of When the synchronizing signal is separated by the analog circuit, the time difference between the synchronizing signal obtained by incorporating the synchronizing signal into the YC separation and demodulation processing constituted by the digital circuit and the synchronizing signal separated by the analog circuit is calculated. Means for obtaining the video data at a point shifted by the time difference from the actually sampled point when digitizing the composite color signal by interpolation, and displacing the center of gravity of the video portion. . An embodiment of the present invention will be described below. FIG. 1 is a block diagram showing the configuration of the video signal processing device according to the first embodiment of the present invention. In FIG. 1, 1
Is an A / D converter, 2 is a digital YC separation / demodulation circuit,
Reference numeral 3 denotes a center-of-gravity shift circuit, 4 denotes a digital synchronization separation circuit, 5 denotes a synchronization signal generation circuit, and 6 denotes a phase difference detection circuit. In this embodiment, a composite color signal is input to an A / D converter 1 and the output of the A / D converter 1 is converted to a digital YC signal.
The signals are input to the separation / demodulation circuit 2, the digital synchronization separation circuit 4, and the phase difference detection circuit 6, respectively, and the digital YC separation /
The luminance output (Y signal) and two color difference outputs (RY signal and BY signal) of the demodulation processing circuit 2 are input to the center-of-gravity shift circuit 3, and the H synchronization output of the digital synchronization separation circuit 4 is converted to a synchronization signal generation circuit. 5 and the phase difference detection circuit 6, the V synchronization output of the digital synchronization separation circuit 4 is input to the synchronization signal generation circuit 5, the coefficient output of the phase difference detection circuit 6 is input to the center-of-gravity shift circuit 3, and the synchronization signal One of the two outputs of the generation circuit 5 is input to the digital YC separation / demodulation circuit 2, the other is output as an external synchronization signal, and the reference level is externally input to the digital synchronization separation circuit 4 and the phase difference detection circuit 6, respectively. The clock is input to the A / D converter 1, the digital YC separation / demodulation circuit 2, the center-of-gravity shift circuit 3, the digital synchronization separation circuit 4, the synchronization signal generation circuit 5, and the phase difference detection circuit 6, respectively. The luminance signal from the mobile circuit 3 (Y signal)
Each circuit element is connected so as to output two color difference signals (RY signal and BY signal). In this embodiment having the above-described configuration, the composite color signal is converted into a digital signal by the A / D converter 1, and the digital signal is compared with the reference level by the digital sync separation circuit 4 to obtain a horizontal sync signal. The signal (H sync) and the vertical sync signal (V sync) are separated from the digitized composite color signal. The digital YC separation / demodulation circuit 2 converts the luminance signal from the digitalized composite color signal based on the signal generated by the synchronization signal generation circuit 5 based on the H synchronization and the V synchronization separated by the digital synchronization separation circuit 4. (Y signal) and two color difference signals (RY signal, BY signal). Due to sampling performed by the A / D converter 1, a phase difference occurs between the phase of the synchronization signal included in the analog composite color signal before the A / D conversion is performed and the H synchronization separated by the digital synchronization separation circuit 4. Therefore, the phase difference is determined from the H synchronization separated by the digital synchronization separation circuit 4, the reference level used as a reference when separating the synchronization, and the composite color signal before and after reaching the reference level. In accordance with the phase difference, the center-of-gravity shift circuit 3 operates so as to shift the center of gravity of the luminance and the two color difference signals of the video portion. In the present embodiment, by moving the center of gravity of the signal during the video period, it is possible to suppress the time axis fluctuation caused by separating the synchronization from the digitized composite color signal. Further, since no line memory or the like is used and YC separation / demodulation can be realized with one clock, there is an effect that YC separation / demodulation processing can be realized with a small number of gates. FIG. 2 is a block diagram showing an example of the configuration of the digital sync separation circuit 4 in FIG. In FIG. 2, reference numeral 10 denotes a comparison circuit, 11 denotes a filter circuit, and 12 denotes an H synchronization and V synchronization generation circuit. In this embodiment shown in FIG. 2, the comparison circuit 10 compares the digitized composite color signal with a reference level, extracts a synchronization signal component included in the composite color signal, and extracts a noise component from the extracted signal. To the filter circuit 1
1 to separate the composite synchronization signal (C. SYNC). SYNC to H synchronization and V synchronization generation circuit 1
2 generates H synchronization and V synchronization. FIG. 3 is a block diagram showing an example of the configuration of the phase difference detection circuit 6 in FIG. 1, and FIG. 4 is a diagram for explaining the operation of FIG. In FIG. 3, 15, 16,
Reference numeral 18 denotes a flip-flop, and 17 denotes an interpolation coefficient generation circuit. In the example shown in FIG. 3, the flip-flop 1
5, the digitized composite color signal is delayed by one clock, and the delayed composite color signal and the composite color signal before being delayed at the falling edge of the H synchronization generated by the digital sync separation circuit 4 are flip-flop 16 and At 18, each is held for one horizontal period. The flip-flops 16 and 18 correspond to Dn-1 and Dn in FIG.
It holds sampling data at point n. From the reference level between the two signal levels and the signal levels at points Dn-1 and Dn, a time lag t between the timing when the H synchronization falls and the instant when the composite color signal reaches the reference level is detected. , T is divided by the sampling period ts of the composite color signal to generate a coefficient (t / ts). FIG. 5 is a block diagram showing an example of the configuration of the center-of-gravity shift circuit 3 in FIG. In FIG. 5, 3A is Y
Signal center-of-gravity shift circuit, 3B is a center-of-gravity shift circuit for RY signal, 3C is a center-of-gravity shift circuit for BY signal, and 21, 22, 27 are flip-flops, 24, 25
Is a multiplication circuit, 28 is an addition circuit, and 26 is a 1-t / ts operation circuit. The center-of-gravity shift circuits 3A, 3B, 3C of the present embodiment include:
Based on the coefficients generated by the phase difference detection circuit 6, interpolation data is calculated from the luminance signal (Y signal) and the color difference signals (RY signal, BY signal) generated by the digital YC separation / demodulation circuit 2. I have. Since the luminance and the chrominance signal have the same operation and configuration, a description will be given below using a luminance signal (Y signal) as an example. In the center-of-gravity shift circuit 3A of this embodiment shown in FIG. 5, the Y signal is fetched by the flip-flop 21 at the rising edge of the clock.
Is delayed by one clock by the flip-flop 22.
The output (Pn−1) of the flip-flop 22 is multiplied by the coefficient generated by the phase difference detection circuit 6 by the multiplication circuit 24, and 1−t is calculated from the input (Pn) of the flip-flop 22 and the coefficient generated by the phase difference detection circuit 6. The multiplication circuit 25 multiplies the coefficient obtained by the / ts operation circuit 26 with the multiplication circuit 25.
Are added by an adder circuit 28, the addition result is fetched by a flip-flop 27, and the output of the flip-flop 27 is output as a new Y signal. That is, in the present embodiment, the signal of the video portion is interpolated from the data before and after the signal and is recalculated according to the result of the phase difference detection circuit 6. Next, a second embodiment of the present invention will be described. FIG. 6 is a block diagram showing the configuration of the video signal processing device according to the second embodiment of the present invention, and FIG. 7 is a timing chart showing the operation of the phase difference detection circuit 6 in FIG. In FIG. 6, 1 is an A / D converter, 2 is a digital YC separation / demodulation circuit, 3 is a center-of-gravity shift circuit, 5 is a synchronization signal generation circuit, 6
Denotes a phase difference detection circuit, 7 denotes an analog synchronization separation circuit, and 8 denotes a flip-flop. In this embodiment, a composite color signal is input to an A / D converter 1 and an analog sync separation circuit 7, respectively.
/ D converter 1 outputs digital YC separation / demodulation circuit 2
And outputs the luminance output (Y signal) and two color difference outputs (RY signal, B-signal) of the digital YC separation / demodulation processing circuit 2.
Y signal) is input to the center-of-gravity shift circuit 3, two output signals (H synchronization signal, V synchronization signal) of the analog synchronization separation circuit 7 are input to the flip-flop 8, and two horizontal and vertical synchronizations of the flip-flop 8 are performed. A signal is input to the synchronizing signal generating circuit 5, one of two outputs of the synchronizing signal generating circuit 5 is input to the digital YC separating / demodulating circuit 2, and the other is output as an external synchronizing signal. The synchronization signal and the horizontal synchronization signal of the flip-flop 8 are input to the phase difference detection circuit 6, the coefficient output of the phase difference detection circuit 6 is input to the center-of-gravity shift circuit 3, and the clock is externally supplied to the A / D converter 1.
, A digital YC separation / demodulation circuit 2, a center-of-gravity shift circuit 3, a flip-flop 8, a synchronizing signal generation circuit 5, and a phase difference detection circuit 6, and a high-speed clock is input to the phase difference detection circuit 6, The respective circuit elements are connected so as to output a luminance signal (Y signal) and two color difference signals (RY signal and BY signal) from 3. In this embodiment having the above-described structure, the composite color signal is converted into a digital signal by the A / D converter 1 and a horizontal synchronizing (H synchronizing) signal is converted from the analog composite color signal by the analog synchronizing / separating circuit 7. And the vertical synchronizing (V synchronizing) signal, and the H synchronizing and V synchronizing signals are taken in by the flip-flop 8 at the rising edge of the clock. The digital YC separation / demodulation circuit 2 uses the H synchronization and the V synchronization taken in by the flip-flop 8 as a reference to the signal generated by the synchronizing signal generation circuit 5 to obtain a luminance and two color differences from the digitized composite color signal. Generate a signal. Since the synchronization signal is captured by the flip-flop 8 at the rising edge of the clock, a phase difference occurs between the phase of the synchronization signal included in the analog composite color signal before A / D conversion is performed and the synchronization signal captured by the flip-flop 8. So, like the timing in FIG.
The level of the clock and the high-speed clock is held at the change point of the input of the flip-flop 8 in the H synchronization immediately before the change of the H synchronization at the output of the flip-flop 8, and the phase difference detection circuit 6 The above phase difference is obtained, and a coefficient for calculation is given to the center-of-gravity shift circuit 3. The center-of-gravity shift circuit 3 operates to shift the center of gravity of the luminance of the video portion and the center of the two color difference signals in accordance with the given coefficient. In the present embodiment, the center of gravity of the signal is shifted during the video period, so that the flip-flop 8
Thus, it is possible to suppress the time axis fluctuation based on the discretization of the synchronization signal. Further, since no line memory or the like is used and YC separation / demodulation can be realized with one clock, there is an effect that YC separation / demodulation processing can be realized with a small number of gates. As described above, according to the present invention, the synchronizing signal is separated from the analog composite color signal, and the time axis fluctuation that occurs when the synchronizing signal is taken into the digital circuit is reduced.
The correction can be performed with a small circuit scale without using a line memory. Further, the YC separation / demodulation processing can be realized with a circuit configuration of one oscillator (clock).

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram illustrating a configuration of a video signal processing device according to a first embodiment of the present invention. FIG. 2 is a block diagram showing one example of a configuration of a digital sync separation circuit in FIG. 1; FIG. 3 is a block diagram illustrating an example of a configuration of a phase difference detection circuit in FIG. 1; FIG. 4 is an explanatory diagram showing the operation of the circuit of FIG. 3; FIG. 5 is a block diagram showing an example of a configuration of a center-of-gravity shift circuit in FIG. 1; FIG. 6 is a block diagram illustrating a configuration of a video signal processing device according to a second embodiment of the present invention. FIG. 7 is a timing chart showing an operation of the phase difference detection circuit in FIG. 6; [Description of Signs] 1 A / D converter 2 Digital YC separation / demodulation circuit 3 Center of gravity shift circuit 4 Digital synchronization separation circuit 5 Synchronization signal generation circuit 6 Phase difference detection circuit 7 Analog synchronization separation circuit 8 Flip-flop

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-7-288847 (JP, A) JP-A-1-319389 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 9/44-9/898

Claims (1)

(57) [Claim 1] A / D conversion means for converting an analog composite color signal into a digital signal, and synchronization separation means for separating a synchronization signal from the composite color signal converted into a digital signal Synchronizing signal generating means for generating a synchronizing signal based on the synchronizing signal separated by the synchronizing separating means; and a digital signal by the A / D converting means based on the synchronizing signal generated by the synchronizing signal generating means. Digital YC separation / demodulation means for generating a luminance signal and a color difference signal from the converted composite color signal, and detecting a phase difference between a synchronization signal separated by the synchronization separation means and a synchronization portion included in the analog composite color signal. Phase difference detection means, and a video part of a composite color signal converted into a digital signal in accordance with a detection result by the phase difference detection means. A center-of-gravity moving means for moving a heart, wherein the A / D conversion means, the synchronization separation means, the synchronization signal generation means, the digital YC separation / demodulation means, the phase difference detection means, The center-of-gravity shifting means operates using one clock, and the phase difference detecting means includes a signal level serving as a reference when the synchronization signal is separated by the synchronization separating means, and a signal level immediately before reaching the reference signal level. And a means for holding the signal levels of the plurality of composite color signals immediately after reaching, and a timing at which the composite color signal reaches the signal level that becomes the reference level from the signal level held by the holding means; Means for calculating a phase difference from a synchronization signal actually separated by the synchronization separation means.