JP3376953B2 - Semiconductor integrated circuit device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device having a power supply wiring region surrounding a circuit element region.

[0002]

2. Description of the Related Art Conventionally, in order to improve the degree of integration of a semiconductor integrated circuit in a large scale integrated circuit (LSI), it has been required to reduce a power supply wiring area.

A circuit having a predetermined logical function is formed in the macro cell of the semiconductor integrated circuit, and power is supplied to the macro cell by a power supply wiring formed in a wiring area provided outside the macro cell area. Signal transmission between the macro cell regions is performed by the signal wiring provided in the wiring region. In this case, the width of the power supply wiring is formed to be 50 to 100 times thicker than that of the signal wiring in order to secure power supply capacity and noise resistance. Therefore, in order to improve the integration degree of the semiconductor integrated circuit, the area of the power supply wiring on the chip becomes a problem.

FIG. 3 is a layout diagram of a conventional semiconductor integrated circuit device. A positive power supply (VDD) wiring 44 extending in a ring shape around the macro core 41 and a negative power supply (GND) wiring 45 extending in a ring shape are arranged outside the macro core (inside the macro cell) 41. . These wirings 44 and 45 are a first wiring layer 42 extending in the horizontal direction shown in the figure, and a second wiring layer 43 formed in the upper layer of the first wiring layer 42 via an interlayer insulating film and extending in the vertical direction shown in the figure. Are connected by through-hole contacts 46 to form ring-shaped wirings 44 and 45.

The positive power supply VDD and the negative power supply GND are connected to the respective power supply circulation rings of the positive power supply wiring 44 and the negative power supply wiring 45 from the outside of the macro cell. Macro core 4
1 includes a power supply circulating ring to a positive power supply VDD and a negative power supply GN.
D is supplied.

A wiring 47 for supplying the positive power supply VDD to the macro core 41 from the outside to the power supply circulating ring, and to the power supply circulating ring from the outside and a negative power supply GND to the macro core 41 from the outside. As the wirings 48, the wirings extending in the horizontal direction in the drawing are all formed of the same wiring layer as the first wiring layer 42, and the wirings extending in the vertical direction are formed of the same wiring layer as the second wiring layer 43. It is configured. Among these wirings, the wiring 48 that connects the outside to the negative power supply wiring 45 of the outer ring and the wiring 47 that connects the macro core 41 and the positive power supply wiring 44 of the inner ring have no connection problems, and the outer ring There is no problem even when the inner ring or the outer ring existing in the middle of connecting the outer core with the macro core 41 or the outer ring is a layer different from the connecting wires 47 and 48 in the two-layer wiring structure. .

However, in this conventional layout, as shown in parts A and B of FIG. 3, a GN connected to the power supply circulating ring and the macro core (inside the macro cell) 41 is used.
D wiring 48 and VD connected to the outside and the power supply ring
When the D wiring 47 is close to the D wiring 47, the wiring 47 must be bent and connected so that they are not short-circuited. Since the positional relationship of the macro cell with respect to the power supply wiring 47 outside the macro cell is a problem for each chip, it is always necessary to bend the wiring, and the power supply loop ring It is necessary to secure an area for bending the wiring on the outside. In addition, the wiring width of the power supply circulating ring may be several tens of times the width of the signal wiring, which makes it difficult to secure a wiring area.

Therefore, the power supply wiring VDD and the negative power supply wiring GN
There has been proposed a method of ensuring a macro cell area by arranging Ds in an overlapping manner (for example, Japanese Patent Laid-Open No. 8-
64768).

In this prior art, since the first type wiring layer is formed of Al wiring, the second type power supply wiring is formed of the underlying wiring layer of polysilicon or the like, and both are superposed, the semiconductor is formed. It is possible to reduce the area occupation rate of the power supply wiring in the wiring region of the integrated circuit device, thereby improving the wiring performance of wirings other than the power supply wiring, and improving the integration degree of the semiconductor integrated circuit device. it can.

[0010]

However, in the above-described conventional semiconductor integrated circuit device, when power is supplied from the power wiring layer to the inside of the macro cell, it is necessary to always supply power through the power circulation ring. In that case, there is no problem if the power supply terminal of the macro cell exists in the same layer position as the power supply wiring layer and has the same potential, but the power supply terminal of the macro cell is set in another power supply wiring layer. In this case, it is necessary to secure a region for changing the wiring layer, which causes problems that the degree of integration is lowered by securing the region and it becomes difficult to secure the area of the wiring region. In addition, the power supply terminal of the macro cell exists in the same layer position as the power supply wiring layer and has a different potential (eg, positive power supply and negative power supply).
However, when they are close to each other, there is also a problem that destruction due to a short circuit occurs.

The present invention has been made in view of the above problems, and provides a semiconductor integrated circuit device capable of reducing a power supply wiring area on a chip and increasing the degree of integration of a semiconductor integrated circuit. That is the purpose.

[0012]

A semiconductor integrated circuit device according to the present invention comprises a circuit element region in which a circuit element is arranged, and a ring-shaped power supply circulation ring arranged so as to surround the circuit element region. This power supply circulation ring has a ring-shaped power supply circulation ring for a positive power supply with one wiring layer using two wiring layers among at least three wiring layers of a multilayer wiring structure, and the like. A ring-shaped power supply circulating ring for a negative power supply is formed by the wiring layers, and both power supply circulating rings are arranged so as to overlap each other in plan view,
Serial other layer of first and second respectively the positive power circulating ring and for the negative power supply power supply wiring that disposed intermediate the external terminal connection is formed in a single wiring layer other than that of the wiring layer Connected to the power circulation ring by through hole contact,
It is characterized in that the wiring layer other than the above is used to dispose the power wiring which passes through the power circulation ring and connects the external terminal and the circuit element region.

[0013] In the present invention, may be arranged before Symbol wiring connecting the external power supply circulating ring for the power source through a wire layer of the positive power source orbiting ring in the same layer. Also, a wiring layer connected to the outside of the same layer as the positive power supply circulating ring, a wiring layer connected thereto in the same layer as the negative power supply circulating ring, and a through-hole contact connecting both wiring layers. And can have.

Further, each power supply circulating ring and the circuit element region may be connected to each other by a wiring layer in the same layer as each power supply circulating ring.

Furthermore, a power supply circulating ring for the positive power supply and
Insulated from the power circulation ring for the positive power supply formed in the same layer
And a third wiring connected to the outside and the negative power supply
The power circulation circuit for the negative power source is formed in the same layer as the circulation ring.
A fourth wiring connected to the group, the third wiring, and the third wiring.
Through-hole contact that connects the wiring of 4 to each other
May have.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor integrated circuit device according to an embodiment of the present invention will be specifically described below with reference to the accompanying drawings. FIG. 1 is a diagram showing a layout of a semiconductor integrated circuit device according to an embodiment of the present invention, and FIGS. 2 (a) and 2 (b).
2A and 2B are sectional views taken along the lines AA 'and BB' in FIG. 1, respectively.

Ring-shaped power supply circulation rings 16a and 16b are formed around the macro core 11 in a multilayer wiring structure with an interlayer insulating film interposed therebetween. That is, the first wiring layer 12 is formed on the substrate via the interlayer insulating film, and the second wiring layer 13 is further formed on the first wiring layer 12 via the interlayer insulating film. A third wiring layer 14 is formed on the wiring layer 13 via an interlayer insulating film.

The power supply circulating rings 16a and 16b are formed in a multilayer wiring structure so as to overlap each other in plan view.
As shown in (a) and (b), the power supply circulating ring 16a for the positive power supply wiring VDD is configured in a ring shape by the uppermost third wiring layer 14, and the power supply circulating ring 16b for the negative power supply wiring GND is provided. Is formed in a ring shape by the lowermost first wiring layer 12.

Further, in the macro core 11, the positive power supply terminal VDD1 arranged at the upper end of the figure is provided in the same layer as the uppermost third wiring layer 14, and the negative power supply terminal GND1 is in the lowermost first wiring. It is provided in the same layer as the layer 12.

On the other hand, on the right side of the macro core 11 in the figure, a positive power supply terminal VDD2 and a negative power supply terminal GND2 are provided in the same layer as the middle second wiring layer 13.

From the external terminals to the power supply circulating rings 16a, 16
b to the positive power source VD via the wiring layers 12, 13 and 14.
The D1 and the negative power supply GND1 are supplied, and the positive power supply VDD2 and the negative power supply GND2 are directly supplied from the external terminal to the macro core 11 by the wiring layer 13.

First, the second wiring layer 1 extending in the lateral direction of FIG.
3, the negative power supply GND1 and the positive power supply VDD1 are supplied to the power supply circulating rings 16b and 16a, respectively. As shown in FIG. 2A, the second wiring layer 13 connected to GND1 is
The third wiring layer 14 of the power supply circulating rings 16a and 16b and the first wiring layer
It extends to the wiring layer 12 and is connected to the underlying first wiring layer 12 via a through hole contact 17. As a result, the GN is connected to the lower power supply circulation ring 16b.
D1 is supplied. In addition, as shown in FIG.
Similarly, the second wiring layer 13 connected to the DD1 also includes the third wiring layer 14 and the first wiring layer 12 of the power supply circulating rings 16a and 16b.
Through to the through hole contact 18
Is connected to the upper third wiring layer 14 via. As a result, VDD1 is supplied to the power supply circulating ring 16a in the upper layer.

Further, the wiring layer 14 extending in the vertical direction of FIG.
12 also supplies the positive power supply VDD1 and the negative power supply GND1 to the power supply circulation rings 16a and 16b. In the illustrated example, the positive power supply VDD1 is directly connected by two third wiring layers 14 to a power supply circulating ring 16a constituted by the third wiring layer 14 in the same layer. In addition, the negative power source GN
D1 is supplied from the external terminal to the vicinity of the power supply circulating ring 16b by the two third wiring layers 14 and is supplied to the first wiring layer 12 through the through hole contact 19. The negative power supply GND1 is provided with the power supply circulating ring 16 formed by the first wiring layer 12 of the same layer via the first wiring layer 12.
b.

The positive power supply VDD1 and the negative power supply GND1 are once supplied to the power supply circulation rings 16a, 16b as described above, and are arranged between the power supply circulation rings 16a, 16b and the macro core 11. With the third wiring layer 14, the positive power supply VDD1 is supplied to the macro core 1
1 and the negative power supply GND1 is supplied to the macro core 11 by the first wiring layer 12.

On the other hand, the positive power supply VDD2 and the negative power supply GND2
Is directly connected to the macro core 11 from the outside through the second wiring layer 13 extending in the horizontal direction of FIG. Power circulation ring 16a, 1
Since 6b is composed of the third wiring layer 14 and the first wiring layer 12, respectively, the second wiring layer 13 passes through the power supply circulating rings 16a and 16b without contacting them.
Inside the macro core 11, a power supply VDD2 terminal and a GND2 terminal are provided in the same layer as the second wiring layer 13, and these VDD2 terminal and GND2 terminal are connected to the external VDD2, respectively. The layer 13 and the second wiring layer 13 connected to the external GND2 are directly connected.

In the semiconductor integrated circuit device thus configured, the power supply circulating rings 16a and 16b are composed of the uppermost and lowermost wiring layers 14 and 12 of a three-layer structure,
Power supply circulating ring 16a for positive power supply VDD and negative power supply GND
Since the power supply circulating ring 16b is arranged so as to overlap with each other in a plan view, the area for disposing the power supply circulating rings 16a and 16b can be reduced. Further, the area of the wiring region can be reduced between the external terminal and the power supply circulating rings 16a and 16b. Since it is connected to the second wiring layer 13 by the through hole contacts 17 and 18, there is no need to bend the wiring to avoid a wiring short circuit between GND and VDD. Therefore, it is not necessary to provide such a region for bending the wiring, and since the power supply circulating rings 16a and 16b and the macro core 11 are connected by different wiring layers 12 and 14, a short circuit between them is considered. You don't have to.

Since the power supply circulating ring uses the two wiring layers 12 and 14 of the three-layer structure wiring, the other one wiring layer 13 is used to externally supply the power circulating ring. It is possible to provide a wiring that passes through to reach the macro core 11, so that the power supplies VDD2 and GND2 can be directly supplied to the macro core 11 from the outside.

The present invention is not limited to the above embodiment,
Various modifications are possible. For example, the power supply circulating rings for the positive power supply VDD and the negative power supply GND are not configured by the third wiring layer and the first wiring layer, respectively, as in the above embodiment, but are configured by, for example, two wiring layers vertically adjacent to each other. Good.

The multilayer wiring structure is not limited to three layers,
The number of wiring layers may be four or more, and the number of wiring layers connecting the outside and the power supply circulating ring may be increased.

Further, the VDD2 terminal and the GND2 terminal provided in the macro core 11 are formed in the second wiring layer 13 on one side and the third wiring layer 14 on the other side, and are arranged so as to be stacked to form a multilayer power source terminal. You can also connect to the outside. However, the wiring passing through the power ring is the second wiring layer 1
In the case of one layer of 3, the wiring of either VDD2 or GND2 is connected to the wiring layer of the other layer by through hole contact in the region between the power ring and the macro core, and the macro core is connected through this wiring layer. It is necessary to connect with the power supply terminal of the multi-layer structure of 11.

[0031]

According to the present invention, the power supply circulating ring uses two layers of the wiring layers of the multilayer wiring structure, and the power supply circulating rings for the positive power supply and the negative power supply are arranged so as to overlap each other in a plan view. The arrangement area of the power supply circulating ring can be reduced, and at least one wiring layer is secured in addition to the wiring layers of the power supply circulating ring for the positive power supply voltage and the power supply circulating ring for the negative power supply voltage. Therefore, the positive power supply VDD and the negative power supply GND can be connected only by selecting the through-hole contact, and further, it is possible to directly connect to the macro core without connecting to the power supply circulating ring.

Therefore, according to the present invention, the bent region of the wiring is unnecessary, and when the external wiring and the wiring layer of the power supply circulating ring do not match, there is no need to change the wiring layer.
There is an advantage that it is not necessary to secure a region around the power supply circulating ring for changing the wiring.

[Brief description of drawings]

FIG. 1 is a diagram showing a layout of a semiconductor integrated circuit device according to an embodiment of the present invention.

2A is a sectional view taken along the line AA ′ of FIG.
(B) is a sectional view taken along the line BB ′ of FIG. 1.

FIG. 3 is a diagram showing a layout of a conventional semiconductor integrated circuit device.

[Explanation of symbols]

11; Macro core 12; First wiring layer 13; second wiring layer 14; Third wiring layer 16a, 16b; power supply circulating ring 17, 18, 19; Through-hole contact 41; Macro core 42; First wiring layer 43; Second wiring layer 44; Positive power supply wiring 45; Negative power supply wiring 46; Through hole contact 47; VDD wiring 48; GND wiring

Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/822 H01L 21/3205 H01L 21/82 H01L 27/04

Claims (4)

(57) [Claims] 1. A circuit element region in which a circuit element is arranged,
And a ring-shaped power circulation ring arranged so as to surround the circuit element region, the power circulation ring
Of at least three wiring layers of the multilayer wiring structure, two wiring layers are used to form a ring-shaped power supply circulating ring for a positive power supply by one wiring layer, and a ring-shaped negative power supply ring is formed by another wiring layer. constitutes a power supply source orbiting ring both supply orbiting ring arranged so as to overlap in plan view, wherein a layer of interconnect layers
The first and second wirings for external terminal connection formed in a single wiring layer other than the wiring layer of the other layer, which are arranged in the middle, are respectively connected to the positive power source power supply ring and the negative power source. It is characterized in that it is connected to the power supply circulating ring by a through-hole contact, and a power supply wiring connecting the external terminal and the circuit element region is arranged by using the wiring layer other than the above and passing through the power supply circulating ring. Semiconductor integrated circuit device. 2. The semiconductor device according to claim 1, further comprising: a wiring layer which is formed in the same layer as the power supply circulating ring for the positive power supply, and which connects the outside with the power supply circulating ring for the positive power supply. Integrated circuit device. 3. The positive power supply circuit ring is formed in the same layer as the positive power supply circuit ring, and is insulated from the positive power supply circuit ring.
And a third wiring connected to the outside, a fourth wiring formed in the same layer as the negative power source power circulation ring and connected to the negative power source power circulation ring , and the third wiring . Wiring and the fourth
3. The semiconductor integrated circuit device according to claim 1, further comprising a through-hole contact that connects the wiring of FIG. 4. The power supply circulating ring and the circuit element region are connected to each other by a wiring layer in the same layer as each power supply circulating ring.
A semiconductor integrated circuit device according to item.