JP3358946B2 - Method of forming conductive bump on wiring board - Google Patents

Method of forming conductive bump on wiring board

Info

Publication number
JP3358946B2
JP3358946B2 JP21890296A JP21890296A JP3358946B2 JP 3358946 B2 JP3358946 B2 JP 3358946B2 JP 21890296 A JP21890296 A JP 21890296A JP 21890296 A JP21890296 A JP 21890296A JP 3358946 B2 JP3358946 B2 JP 3358946B2
Authority
JP
Japan
Prior art keywords
conductive bump
wiring board
mold
conductive
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP21890296A
Other languages
Japanese (ja)
Other versions
JPH1065322A (en
Inventor
悦四 鈴木
章 米沢
敏雄 奥野
Original Assignee
株式会社双晶テック
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社双晶テック filed Critical 株式会社双晶テック
Priority to JP21890296A priority Critical patent/JP3358946B2/en
Publication of JPH1065322A publication Critical patent/JPH1065322A/en
Application granted granted Critical
Publication of JP3358946B2 publication Critical patent/JP3358946B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3478Applying solder preforms; Transferring prefabricated solder patterns

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は配線板に他の電気
部品と電気的に加圧接触するための導電バンプを形成す
る方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a conductive bump on a wiring board for making electrical contact with another electric component.

【0002】[0002]

【従来の技術】従来、例えば配線板に上記導電バンプを
形成する場合、図1Aに示すように、リード4を有する
配線板1の表面にホトレジスト層2を形成し、該ホトレ
ジスト層2に形成された孔3の内底にリード4の極部を
露出させ、該リード4の露出部表面に孔内において導電
金属(導電バンプ)5を電解にてメッキ成長させ、図1
Bに示すように上記ホトレジスト層2を除去する方法
(方法Aと呼ぶ)や、リードの所定位置に導電ペースト
を印刷して上記導電バンプを形成する方法等が採られて
いた。
2. Description of the Related Art Conventionally, for example, when the above-mentioned conductive bumps are formed on a wiring board, as shown in FIG. 1A, a photoresist layer 2 is formed on the surface of a wiring board 1 having leads 4 and formed on the photoresist layer 2. The pole portion of the lead 4 is exposed at the inner bottom of the hole 3 and a conductive metal (conductive bump) 5 is electrolytically plated and grown on the exposed surface of the lead 4 in the hole.
As shown in B, a method of removing the photoresist layer 2 (referred to as method A), a method of forming a conductive bump by printing a conductive paste on a predetermined position of a lead, and the like have been adopted.

【0003】[0003]

【発明が解決しようとする課題】然しながら、上記方法
では配線板1に導電バンプを形成する個所が制限され
る。即ち、ホトレジスト層を形成でき且つ電解メッキの
ための電源供給の可能な個所となる。一般にホトレジス
ト層は感光性フィルムをラミネート(密着)することで
行なうが、その密着性を向上するため少なくとも配線板
1の導電バンプ形成部分を密着性向上のための酸処理や
表面粗化等の前処理が必要になる。従って、そのプロセ
スも複雑となる。従って又このプロセスを経るため、上
記導電バンプを配線板を含めた電気部品の所定位置に精
度良く設けることが難しい。更に印刷法による導電バン
プ形成では特に高い精度は望めない。即ち上記何れの方
法も導電バンプを均一の大きさにして所要形状(先端が
尖った形状等)を付与することが困難で、バンプの設置
位置と高さ、大きさ等にバラツキを生じ、形状付与の自
由度に欠ける問題を有していた。
However, in the above method, the places where the conductive bumps are formed on the wiring board 1 are limited. That is, it is a place where a photoresist layer can be formed and power can be supplied for electrolytic plating. Generally, the photoresist layer is formed by laminating (adhering) a photosensitive film. In order to improve the adhesion, at least a portion of the wiring board 1 where the conductive bumps are to be formed is subjected to acid treatment or surface roughening for improving the adhesion. Processing is required. Therefore, the process becomes complicated. Therefore, since this process is performed, it is difficult to accurately provide the conductive bumps at predetermined positions of electric components including the wiring board. Further, particularly high precision cannot be expected in the formation of conductive bumps by a printing method. In other words, it is difficult to make the conductive bumps uniform in size and to give a required shape (shape with a sharp tip, etc.) by any of the above methods. There was a problem that the degree of freedom of the application was lacking.

【0004】[0004]

【課題を解決するための手段】本発明は配線板のリード
表面に加圧接触用の導電バンプを形成する方法であっ
て、上記導電バンプを配置すべき位置と大きさと形状を
付与した凹所を有する導電金属板から成る型を用い、該
型の表面を上記凹所と対応する多数の孔を有するメッキ
レジスト層で覆い、上記凹所内で導電バンプをメッキ成
長により成形すると共に、該導電バンプを上記メッキレ
ジスト層の孔で制限しつつ該孔内に達する高さにメッキ
成長せしめ、上記メッキレジスト層を除去して上記型の
凹所の開口部から突出する導電バンプを成形する。
SUMMARY OF THE INVENTION The present invention relates to a method of forming a conductive bump for pressure contact on a lead surface of a wiring board, comprising a recess having a position, a size and a shape where the conductive bump is to be arranged. The surface of the mold is covered with a plating resist layer having a number of holes corresponding to the recesses, and a conductive bump is formed in the recess by plating growth. Is grown by plating to a height that reaches the inside of the hole while limiting the hole with the plating resist layer, and the plating resist layer is removed to form a conductive bump projecting from the opening of the concave portion of the mold.

【0005】そして上記型の表面に上記配線板を重ね、
該重合面に加圧力と加熱を与えて上記導電バンプを上記
突出部を以って上記配線板のリード表面に融着し、上記
型の離脱により上記リード表面への導電バンプの転着を
図る。
[0005] Then, the wiring board is placed on the surface of the mold,
The conductive bump is fused to the lead surface of the wiring board through the protrusion by applying pressure and heat to the superposed surface, and the conductive bump is transferred to the lead surface by releasing the mold. .

【0006】上記導電バンプを必要とする配線板はリー
ドフレームや配線回路基板である。リードフレームはフ
レキシブルな絶縁シート、例えば合成樹脂フィルムの表
面に多数のリードが微小ピッチで並列して延在してお
り、このリード端を液晶部品の電極に加圧接触させ、検
査装置と接続する接続媒体として用いられる。
The wiring board requiring the conductive bump is a lead frame or a wiring circuit board. The lead frame has a large number of leads extending in parallel at a fine pitch on the surface of a flexible insulating sheet, for example, a synthetic resin film. The lead ends are brought into pressure contact with the electrodes of the liquid crystal component, and connected to an inspection device. Used as a connection medium.

【0007】上記リードフレームにおけるリード端に上
記導電バンプを形成し、この導電バンプを以って電極に
対する加圧接触力を向上せしめる。
[0007] The conductive bump is formed on the lead end of the lead frame, and the pressure contact force to the electrode is improved by using the conductive bump.

【0008】[0008]

【発明の実施の形態】最初に上記導電バンプをメッキ成
長により形成する例を図2に基いて説明する。図2Aに
示すように、導電金属板1aの表面に、該表面で開口す
る凹所1bを多数形成したバンプ成形型1を準備する。
この型1は例えばステンレススチールから成る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, an example in which the conductive bumps are formed by plating growth will be described with reference to FIG. As shown in FIG. 2A, a bump forming die 1 having a large number of recesses 1b opened on the surface of a conductive metal plate 1a is prepared.
The mold 1 is made of, for example, stainless steel.

【0009】上記バンプ成形型1の表面をメッキレジス
ト層2で覆い、該メッキレジスト層2には上記凹所1b
と対応する多数の孔2aを形成する。
The surface of the bump mold 1 is covered with a plating resist layer 2, and the plating resist layer 2 has the recess 1b.
And a large number of holes 2a corresponding to are formed.

【0010】次で図2Bに示すように、上記凹所1b内
において導電金属をメッキ成長させ、該メッキ成長され
た導電金属により凹所1bの形状に応じた導電バンプ3
を成形する。
Next, as shown in FIG. 2B, a conductive metal is plated and grown in the recess 1b, and the conductive bump 3 corresponding to the shape of the recess 1b is formed by the plated and grown conductive metal.
Is molded.

【0011】この導電バンプ3は図2Bに示すように、
メッキレジスト層2の孔2aで制限しつつ、該孔2a内
に達する高さにメッキ成長せしめる。
The conductive bumps 3 are, as shown in FIG.
While being restricted by the holes 2a of the plating resist layer 2, plating is grown to a height reaching the inside of the holes 2a.

【0012】次に図2Cに示すように、上記図2Bのメ
ッキレジスト層2を除去して、型1の凹所1b内に該凹
所を満たしつつ、その開口面において露出する導電バン
プ3を成形し(図示の例においては凹所1bの開口面か
ら突出する導電バンプ3が成形される)、このようにメ
ッキレジスト層2を除去した後図2Dの工程を行う。
Next, as shown in FIG. 2C, the plating resist layer 2 shown in FIG. 2B is removed, and the conductive bump 3 exposed at the opening surface is filled in the recess 1b of the mold 1 while filling the recess. After forming (in the example shown, the conductive bumps 3 protruding from the opening surfaces of the recesses 1b), the plating resist layer 2 is removed in this way, and then the step of FIG. 2D is performed.

【0013】次で図2Dに示すように、上記型1の表面
に配線板4を重ね、重合面に加圧力を与えつつ加熱し、
上記導電バンプ3を配線板4のリード4aに融着し、図
2Eに示すように型1を離脱する。よって導電バンプ3
を配線板4のリード4aに転着する。
Next, as shown in FIG. 2D, a wiring board 4 is placed on the surface of the mold 1 and heated while applying pressure to the superposed surface.
The conductive bumps 3 are fused to the leads 4a of the wiring board 4, and the mold 1 is released as shown in FIG. 2E. Therefore, the conductive bump 3
Is transferred to the lead 4a of the wiring board 4.

【0014】図2Cにおける加圧と加熱は、図2D′に
示すようにヒータ5を内蔵するヒータブロック6を形成
し、該ヒータブロック6を配線板2の上面に重ねて、型
1の表面に重ねられた同配線板2を型1に向け加圧しつ
つ、ヒータ5により加熱することにより上記導電バンプ
3を配線板4のリード4aの表面に融着し、転着する。
Pressing and heating in FIG. 2C are performed by forming a heater block 6 having a built-in heater 5 as shown in FIG. 2D ', and superimposing the heater block 6 on the upper surface of the wiring board 2 so as to cover the surface of the mold 1. The conductive bumps 3 are fused to the surfaces of the leads 4a of the wiring board 4 by being heated by the heater 5 while the stacked wiring boards 2 are pressed toward the mold 1, and transferred.

【0015】上記配線板4のリード4aの表面には予め
ハンダ11を設置し、このハンダ11を上記加熱により
溶融しつつ導電バンプ3をリード4aに融着する方法を
採ることができる。又導電バンプ側に半田メッキを行い
リード4aに融着する方法を採ることもできる。又型1
の凹所1bから導電バンプ3を離反し易くする手段とし
て、換言すると型1の凹所1bから配線板4の導体部へ
の転着を容易にする手段として、上記凹所1bの内表面
に型1を形成する金属による金属酸化被膜12を形成し
て置く。この金属酸化被膜12によって導電バンプ3は
型1から離反し易くなり、配線板4への転着が確実にな
される。或いは凹所1bの内面にテフロン等の離型剤を
コートし、同様な効果を得ることができる。
A method can be adopted in which solder 11 is previously provided on the surface of the lead 4a of the wiring board 4, and the conductive bump 3 is fused to the lead 4a while the solder 11 is melted by the heating. Alternatively, a method of performing solder plating on the conductive bump side and fusing it to the lead 4a may be adopted. Mold 1
As means for facilitating separation of the conductive bumps 3 from the recesses 1b of the mold 1, in other words, as means for facilitating transfer from the recesses 1b of the mold 1 to the conductors of the wiring board 4, the inner surface of the recess 1b is provided. A metal oxide film 12 of the metal forming the mold 1 is formed and placed. The conductive bump 3 is easily separated from the mold 1 by the metal oxide film 12, and the transfer to the wiring board 4 is reliably performed. Alternatively, the same effect can be obtained by coating the inner surface of the recess 1b with a release agent such as Teflon.

【0016】斯くして図2Eに示すように、配線板4の
表面に形成されたリード4aの表面に導電バンプ3を突
出部を以って強固に付着し、この導電バンプ3を相手側
電気部品との加圧接触に供する。上記配線板4とはリー
ドフレーム又は配線回路基板の何れかである。
Thus, as shown in FIG. 2E, the conductive bump 3 is firmly attached to the surface of the lead 4a formed on the surface of the wiring board 4 with a protruding portion. Provide pressure contact with parts. The wiring board 4 is either a lead frame or a wiring circuit board.

【0017】図3A、Bに示すように、上記リードフレ
ーム7は可撓性を有する絶縁シート、例えば合成樹脂フ
ィルムの表面に微小ピッチで並列して延在する多数のリ
ード7aを有し、図2の方法によって該リード7aの端
部表面に上記導電バンプ3を強固に結合せしめる。
As shown in FIGS. 3A and 3B, the lead frame 7 has a large number of leads 7a extending in parallel at a fine pitch on the surface of a flexible insulating sheet, for example, a synthetic resin film. By the method 2, the conductive bumps 3 are firmly bonded to the end surfaces of the leads 7a.

【0018】上記リードフレーム7は図3Bに示すよう
に、液晶部品8の電極8aに加圧接触して検査装置等と
の接触媒体として機能し、上記導電バンプ3は液晶部品
等の接触対象との加圧接触手段となる。
As shown in FIG. 3B, the lead frame 7 comes into pressure contact with the electrode 8a of the liquid crystal component 8 to function as a contact medium with an inspection device or the like. Of pressure contact.

【0019】図3Bにおいて、9は上記フレキシブルリ
ードフレームの端部を液晶部品8等の接触対象に押圧す
る押え治具であり、該押え治具9の加圧により、リード
フレーム7の端部を撓ませつつ、上記導電バンプ3を電
極8aに加圧接触せしめる。
In FIG. 3B, reference numeral 9 denotes a pressing jig for pressing the end of the flexible lead frame against a contact object such as the liquid crystal component 8. The pressing jig 9 presses the end of the lead frame 7. While bending, the conductive bump 3 is brought into pressure contact with the electrode 8a.

【0020】又上記配線板4が電気回路を形成した配線
回路基板である場合には、電気回路を形成するリード表
面の導電バンプ3は上記リードフレーム7と同様、相手
側電気部品との加圧接触に供される。
When the wiring board 4 is a wiring circuit board on which an electric circuit is formed, the conductive bumps 3 on the surface of the lead forming the electric circuit are pressed against the mating electric component similarly to the lead frame 7. Provided for contact.

【0021】上記の通り型1はバンプの成形型と転写板
としての機能を有する。
As described above, the mold 1 has a function as a bump mold and a transfer plate.

【0022】上記型1に形成された凹所1bはバンプ3
に先端が尖った形状を付与する。或いは凹所1bによっ
てバンプ3を台形又は半球形に成形したり、これらバン
プ3の表面に突起を形成することが可能である。
The recess 1b formed in the mold 1 has bumps 3
To the tip. Alternatively, the bumps 3 can be formed into a trapezoidal or hemispherical shape by the recesses 1b, or projections can be formed on the surfaces of the bumps 3.

【0023】[0023]

【発明の効果】本発明によれば、配線板のリードの所定
位置に均一な導電バンプを高精度に付有せしめることが
できる。
According to the present invention, a uniform conductive bump can be provided at a predetermined position of a lead of a wiring board with high precision.

【0024】上記導電バンプの形状や位置、高さ、大き
さ等は型の凹所によって適正に定まり、又適用目的に応
じた形状を自由に与えることができる。
The shape, position, height, size, and the like of the conductive bump are properly determined by the concave portions of the mold, and the shape can be freely given according to the purpose of application.

【0025】又配線板におけるリードの微小ピッチ化に
有効に対処でき、微小ピッチの多数の導電バンプを一括
して簡単に付有せしめることができ、コストダウンを達
成できる。
Also, it is possible to effectively cope with the miniaturization of the leads in the wiring board, and it is possible to easily provide a large number of conductive bumps having a fine pitch in a lump, thereby achieving a cost reduction.

【図面の簡単な説明】[Brief description of the drawings]

【図1】A,Bは従来の配線板に導電バンプを付有せし
める例を工程順に示す断面図。
FIGS. 1A and 1B are cross-sectional views showing an example of attaching a conductive bump to a conventional wiring board in the order of steps.

【図2】A乃至Eは本発明におけるメッキ成長によって
成形した導電バンプを配線板に付有せしめる例を工程順
に説明する断面図。
FIGS. 2A to 2E are cross-sectional views illustrating an example of attaching a conductive bump formed by plating growth to a wiring board according to the present invention in the order of steps.

【図3】Aは導電バンプを付有させたリードフレームの
斜視図、Bは該リードフレームと液晶部品の加圧接触状
態を示す断面図。
FIG. 3A is a perspective view of a lead frame provided with conductive bumps, and FIG. 3B is a cross-sectional view showing a state of pressure contact between the lead frame and a liquid crystal component.

【符号の説明】[Explanation of symbols]

1 型 1a 導電金属板 1b 凹所 2 メッキレジスト層 3 導電バンプ 4 配線板 4a リード 7 リードフレーム Reference Signs List 1 mold 1a conductive metal plate 1b recess 2 plating resist layer 3 conductive bump 4 wiring board 4a lead 7 lead frame

───────────────────────────────────────────────────── フロントページの続き (72)発明者 奥野 敏雄 神奈川県横浜市港北区綱島東4丁目8番 29号 株式会社双晶テック内 (56)参考文献 特開 昭63−45888(JP,A) 特開 昭63−45891(JP,A) 特開 平3−73549(JP,A) 特開 平4−101371(JP,A) 特開 平5−325669(JP,A) 特開 平3−211741(JP,A) (58)調査した分野(Int.Cl.7,DB名) H05K 3/34 505 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Toshio Okuno 4-29, Tsunashimahigashi, Kohoku-ku, Yokohama-shi, Kanagawa Pref. JP-A-63-45891 (JP, A) JP-A-3-73549 (JP, A) JP-A-4-101371 (JP, A) JP-A-5-325669 (JP, A) JP-A-3-211741 (JP, A) (58) Field surveyed (Int. Cl. 7 , DB name) H05K 3/34 505

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】配線板のリード表面に加圧接触用の導電バ
ンプを形成する方法であって、表面で開口する多数の凹
所を有する導電金属板から成る型を用い、該型の表面を
上記凹所と対応する多数の孔を有するメッキレジスト層
で覆い、上記凹所内で導電バンプをメッキ成長により成
形すると共に、該導電バンプを上記メッキレジスト層の
孔で制限しつつ該孔内に達する高さにメッキ成長せし
め、上記メッキレジスト層を除去して上記型の凹所の開
口部から突出する導電バンプを成形し、該型の表面に配
線板を重ね、該重合面に加圧力と加熱を与えて上記導電
バンプを上記突出部を以って上記配線板のリード表面に
融着し、上記型を離脱して上記リード表面へ導電バンプ
転着することを特徴とする配線板に導電バンプを形成
する方法。
1. A conductive bar for pressure contact with a lead surface of a wiring board.
A method of forming a pump, using a mold consisting of a conductive metal plate having a number of recesses opening on the surface, covering the surface of the mold with a plating resist layer having a number of holes corresponding to the recesses, A conductive bump is formed in the recess by plating growth, and the conductive bump is grown by plating to a height reaching the inside of the hole while limiting the conductive bump with the hole in the plating resist layer. A conductive bump protruding from the opening of the recess is formed and disposed on the surface of the mold.
A wire plate is overlaid, a pressure and heat are applied to the overlapped surface, and the conductive bump is fused to the lead surface of the wiring board through the protrusion, the mold is released, and the conductive bump is applied to the lead surface.
A method of forming a conductive bump of the wiring board, characterized by transferred onto.
JP21890296A 1996-08-20 1996-08-20 Method of forming conductive bump on wiring board Expired - Fee Related JP3358946B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21890296A JP3358946B2 (en) 1996-08-20 1996-08-20 Method of forming conductive bump on wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21890296A JP3358946B2 (en) 1996-08-20 1996-08-20 Method of forming conductive bump on wiring board

Publications (2)

Publication Number Publication Date
JPH1065322A JPH1065322A (en) 1998-03-06
JP3358946B2 true JP3358946B2 (en) 2002-12-24

Family

ID=16727110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21890296A Expired - Fee Related JP3358946B2 (en) 1996-08-20 1996-08-20 Method of forming conductive bump on wiring board

Country Status (1)

Country Link
JP (1) JP3358946B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003059971A (en) * 2001-08-20 2003-02-28 Nec Kansai Ltd Wiring board and manufacturing method therefor, and semiconductor device
JP4793690B2 (en) * 2006-09-29 2011-10-12 大日本印刷株式会社 Method for forming conductive bump
WO2013153578A1 (en) * 2012-04-12 2013-10-17 株式会社Leap Method for manufacturing electroformed component
CN111634008A (en) * 2020-05-30 2020-09-08 江苏冠之星管道系统有限公司 Hot melting assembly arrangement method for heating wire of plastic electric melting pipe fitting

Also Published As

Publication number Publication date
JPH1065322A (en) 1998-03-06

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