JP3351613B2 - Microwave integrated circuit - Google Patents

Microwave integrated circuit

Info

Publication number
JP3351613B2
JP3351613B2 JP04292494A JP4292494A JP3351613B2 JP 3351613 B2 JP3351613 B2 JP 3351613B2 JP 04292494 A JP04292494 A JP 04292494A JP 4292494 A JP4292494 A JP 4292494A JP 3351613 B2 JP3351613 B2 JP 3351613B2
Authority
JP
Japan
Prior art keywords
conductor
integrated circuit
microwave integrated
line
strip conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP04292494A
Other languages
Japanese (ja)
Other versions
JPH07254661A (en
Inventor
英樹 高須
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP04292494A priority Critical patent/JP3351613B2/en
Publication of JPH07254661A publication Critical patent/JPH07254661A/en
Application granted granted Critical
Publication of JP3351613B2 publication Critical patent/JP3351613B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はマイクロ波集積回路に係
わり、特にモノリシックマイクロ波集積回路の低インピ
ーダンス線路の構成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microwave integrated circuit, and more particularly to a structure of a low impedance line of a monolithic microwave integrated circuit.

【0002】[0002]

【従来の技術】マイクロストリップ線路、コプレーナ線
路等はマイクロ波集積回路の基本伝送線路であり、マイ
クロ波平面回路を構成する基本の素子である。
2. Description of the Related Art Microstrip lines, coplanar lines and the like are basic transmission lines of a microwave integrated circuit, and are basic elements constituting a microwave planar circuit.

【0003】モノリシックマイクロ波集積回路は、砒化
ガリウム(GaAs)等の半絶縁性基板上に電界効果ト
ランジスタ(FET)などの能動素子や抵抗、キャパシ
タ、インダクタなどで構成されるマイクロ波集積回路
で、基本伝送線路としてコプレーナ線路を用いている。
通常マイクロ波回路では、50[Ω]系で回路を構成す
る。コプレーナ線路を用いて回路設計を行う場合、コプ
レーナ線路の特性インピーダンスは中心導体幅と導体厚
及び接地導体との間の間隔及び半絶縁性半導体基板の誘
電率で決定される。従って、回路設計に必要な線路のイ
ンピーダンスは、主として線路の中心導体幅と接地導体
との間の間隔を変えることにより得られる。
A monolithic microwave integrated circuit is a microwave integrated circuit including active elements such as field effect transistors (FETs), resistors, capacitors, inductors, and the like on a semi-insulating substrate such as gallium arsenide (GaAs). A coplanar line is used as a basic transmission line.
Usually, in a microwave circuit, a circuit is configured by a 50 [Ω] system. When a circuit is designed using a coplanar line, the characteristic impedance of the coplanar line is determined by the center conductor width and conductor thickness, the distance between the conductor and the ground conductor, and the dielectric constant of the semi-insulating semiconductor substrate. Therefore, the impedance of the line required for the circuit design is mainly obtained by changing the distance between the center conductor width of the line and the ground conductor.

【0004】[0004]

【発明が解決しようとする課題】叙上のモノリシックマ
イクロ波集積回路において、50[Ω]に対して低イン
ピーダンス線路を構成する際、コプレーナ線路の中心導
体幅を一定とし中心導体と接地導体間の距離を狭めるこ
とにより実現することが考えられるが、素子作製上困難
な場合がある。また、中心導体と接地導体間の距離を一
定とし、中心導体幅を広げることにより構成することも
考えられるが、この場合線路全体の寸法が大きくなって
しまう。
In the monolithic microwave integrated circuit described above, when forming a low impedance line with respect to 50 [Ω], the center conductor width of the coplanar line is fixed and the distance between the center conductor and the ground conductor is reduced. It can be realized by reducing the distance, but it is sometimes difficult to fabricate the device. In addition, it is conceivable that the distance between the center conductor and the ground conductor is fixed and the width of the center conductor is widened.

【0005】図4に従来用いられているコプレーナ線路
の構造を示す。同図において、23、24は接地導体で
あり、コプレーナ線路の特性インピーダンスは中心導体
22の導体幅と、中心導体厚と接地導体との間の間隔及
び半絶縁性半導体基板21の誘電率により決定される。
FIG. 4 shows the structure of a conventional coplanar line. In the figure, reference numerals 23 and 24 denote ground conductors, and the characteristic impedance of the coplanar line is determined by the conductor width of the center conductor 22, the distance between the center conductor thickness and the ground conductor, and the dielectric constant of the semi-insulating semiconductor substrate 21. Is done.

【0006】本発明はモノリシックマイクロ波集積回路
のチップサイズを縮小化するためになされたもので、コ
プレーナ線路で構成する伝送線路の線路幅及び線路間隔
を変えることなく接地導体の導体厚を変えることにより
低インピーダンス線路を構成するものであり、縮小され
てチップサイズの小さなモノリシックマイクロ波集積回
路を形成するものである。
SUMMARY OF THE INVENTION The present invention has been made to reduce the chip size of a monolithic microwave integrated circuit, and it is an object of the present invention to change the conductor thickness of a ground conductor without changing the line width and line interval of a transmission line composed of coplanar lines. To form a low-impedance line, thereby forming a monolithic microwave integrated circuit that is reduced in size and small in chip size.

【0007】[0007]

【課題を解決するための手段】本発明に係るマイクロ波
集積回路は、半絶縁性半導体基板と、所定の幅に形成さ
れた中心ストリップ導体および前記中心ストリップ導体
の両側に同じ間隔でかつ前記中心ストリップ導体よりも
厚く形成された接地導体を有し、前記半絶縁性半導体基
板上に形成されたコプレーナ線路とを具備していること
を特徴とする
Engaging luma microwave integrated circuit of the present invention According to an aspect of the semi-insulating semiconductor substrate, and at the same intervals on both sides of the center strip conductor and said center strip conductor formed in a predetermined width have thick formed grounding conductor than the center strip conductor, said semi-insulating semiconductor base
A coplanar line formed on a plate
It is characterized by .

【0008】[0008]

【作用】上記構成によるモノリシックマイクロ波集積回
路は、半絶縁性半導体基板上にストリップ導体を設け、
前記ストリップ導体上の両側に前記ストリップ導体との
間の間隔が等しく前記ストリップ導体の導体厚よりも厚
い接地導体を配置し、線路の中心導体幅及び接地導体と
の間隔を保ったまま接地導体の導体厚を変えることによ
り任意の低インピーダンス線路を構成することができ
る。
In the monolithic microwave integrated circuit having the above structure, a strip conductor is provided on a semi-insulating semiconductor substrate.
On both sides of the strip conductor, a ground conductor having the same distance between the strip conductor and the thicker than the conductor thickness of the strip conductor is arranged, and the center conductor width of the line and the distance between the ground conductor and the ground conductor are maintained. By changing the conductor thickness, an arbitrary low impedance line can be formed.

【0009】[0009]

【実施例】【Example】

(実施例1)以下、この発明の一実施例を図1を参照し
て詳細に説明する。
(Embodiment 1) Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG.

【0010】同図において21は半絶縁性砒化ガリウム
基板であり基板上には中心ストリップ導体である22
と、中心ストリップ導体22を両側から挟むように接地
導体13、14を配置する。接地導体13、14は中心
導体22の導体厚よりも厚い導体を有する。図1及び図
4に示す伝送線路において、線路の断面寸法が波長に対
して十分小さいとき、伝送線路の特性インピーダンスZ
0 は次式で表される。
In FIG. 1, reference numeral 21 denotes a semi-insulating gallium arsenide substrate, and a center strip conductor 22 is provided on the substrate.
Then, the ground conductors 13 and 14 are arranged so as to sandwich the center strip conductor 22 from both sides. The ground conductors 13 and 14 have conductors thicker than the conductor thickness of the center conductor 22. In the transmission line shown in FIGS. 1 and 4, when the cross-sectional dimension of the line is sufficiently small with respect to the wavelength, the characteristic impedance Z
0 is represented by the following equation.

【0011】[0011]

【数1】 ここで、V0 は光速、Cは単位長さ当りの静電容量、C
0 は図1及び図4において誘電体を取り除いた場合の単
位長さ当りの静電容量である。図2に図1に示す線路の
電界分布を、また、図に図に示す線路の電界分布を
示す。図からわかるように、図1に示す線路では接地導
体13、14の厚さを中心導体厚22より厚く構成して
いるため、中心導体22と接地導体13、14との間に
エネルギが集中し、単位長さあたりの静電容量が図4に
示す従来の構造に比べて増加している。また、絶縁保護
膜の比誘電率が半絶縁性半導体基板の比誘電率に近いも
のであればエネルギの集中がより顕著となる。(1)式
からもわかるように、線路の単位長さ当りの静電容量が
大きいほど線路のインピーダンスは低インピーダンスと
なる。従って、図4に示す従来の構造では、中心導体幅
あるいは接地導体との間の間隔を変えることにより、低
インピーダンス線路を構成していたが線路の構成が困難
となる、あるいは回路規模が大きくなるなどの欠点があ
った。これに対して、図1に示す本発明に係わる構造で
は、中心導体幅及び接地導体との間の間隔は変えること
なく接地導体厚を変えることにより低インピーダンス線
路を構成できるので、従来に比べてチップサイズの小さ
なモノリシックマイクロ波集積回路が実現できる。
(Equation 1) Here, V 0 is the speed of light, C is the capacitance per unit length, C
0 is the capacitance per unit length when the dielectric is removed in FIGS. The electric field distribution of the line shown in Figure 1 Figure 2 also shows the electric field distribution of the line shown in FIG. 3 in FIG. As can be seen from the drawing, in the line shown in FIG. 1, since the thickness of the ground conductors 13 and 14 is made larger than the center conductor thickness 22, energy concentrates between the center conductor 22 and the ground conductors 13 and 14. The capacitance per unit length is increased as compared with the conventional structure shown in FIG. If the relative dielectric constant of the insulating protective film is close to the relative dielectric constant of the semi-insulating semiconductor substrate, the concentration of energy becomes more remarkable. As can be seen from equation (1), the larger the capacitance per unit length of the line, the lower the impedance of the line. Therefore, in the conventional structure shown in FIG. 4, a low impedance line is formed by changing the center conductor width or the interval between the center conductor and the ground conductor. However, the line structure becomes difficult or the circuit scale becomes large. There were drawbacks such as. On the other hand, in the structure according to the present invention shown in FIG. 1, a low-impedance line can be formed by changing the thickness of the ground conductor without changing the width of the center conductor and the distance between the center conductor and the ground conductor. A monolithic microwave integrated circuit with a small chip size can be realized.

【0012】図に本発明に係わるモノリシックマイク
ロ波集積回路の特性を示す。
FIG. 5 shows the characteristics of the monolithic microwave integrated circuit according to the present invention.

【0013】図において、曲線101は本発明に係わ
る図1に示す線路の特性であり、図1に示す半絶縁性砒
化ガリウム基板21の基板厚は400[μm]、中心ス
トリップ導体22と接地導体13、14との間隔は50
[μm]であり、比誘電率は12.9である。また、絶
縁膜の比誘電率は7.0であり、中心ストリップ導体2
2の導体幅は75[μm]、導体厚は2[μm]であ
る。点102は図4に示す従来の構造の線路の特性であ
り、砒化ガリウム基板21の基板厚は400[μm]、
中心ストリップ導体22と接地導体23、24との間隔
は50[μm]であり、比誘電率は12.9である。ま
た、絶縁膜の比誘電率は7.0であり、中心ストリップ
導体22の導体幅は75[μm]、導体厚は2[μm]
である。図3に示されることから明らかなように、中心
導体と接地導体との間の間隔及び中心導体幅を一定とし
接地導体厚を変化させることにより任意の低インピーダ
ンスをもつコプレーナ線路を形成することができる。
In FIG. 5 , a curve 101 represents the characteristics of the line shown in FIG. 1 according to the present invention. The substrate thickness of the semi-insulating gallium arsenide substrate 21 shown in FIG. The distance between the conductors 13 and 14 is 50
[Μm] and the relative dielectric constant is 12.9. The relative dielectric constant of the insulating film is 7.0, and the center strip conductor 2
The conductor width of No. 2 is 75 [μm], and the conductor thickness is 2 [μm]. A point 102 is a characteristic of the line having the conventional structure shown in FIG. 4, and the thickness of the gallium arsenide substrate 21 is 400 [μm].
The distance between the center strip conductor 22 and the ground conductors 23 and 24 is 50 [μm], and the relative dielectric constant is 12.9. The relative permittivity of the insulating film is 7.0, the conductor width of the center strip conductor 22 is 75 [μm], and the conductor thickness is 2 [μm].
It is. As is apparent from FIG. 3, it is possible to form a coplanar line having an arbitrary low impedance by changing the thickness of the ground conductor while keeping the distance between the center conductor and the ground conductor and the width of the center conductor constant. it can.

【0014】(実施例2)マイクロ波集積回路(図示省
略)において、絶縁基板上に形成したストリップ導体と
前記ストリップ導体の両側に前記ストリップ導体との間
の間隔が等しく前記ストリップ導体の導体厚よりも厚い
接地導体を具備してなり、前記接地導体厚を変化させる
ことにより、従来のコプレーナ線路に比べて任意の低イ
ンピーダンス線路を形成することができる。
(Embodiment 2) In a microwave integrated circuit (not shown), the distance between a strip conductor formed on an insulating substrate and the strip conductor on both sides of the strip conductor is equal to each other, and is greater than the conductor thickness of the strip conductor. A thicker ground conductor is provided, and by changing the thickness of the ground conductor, an arbitrary low impedance line can be formed as compared with a conventional coplanar line.

【0015】なお、上記実施例では半絶縁性半導体基板
として砒化ガリウムを用いたが、他の材料を用いること
ができることはいうまでもない。また、ストリップ導体
及び接地導体上に絶縁膜を設けてもよい。
Although gallium arsenide is used as the semi-insulating semiconductor substrate in the above embodiment, it goes without saying that other materials can be used. Also strip conductor
Further, an insulating film may be provided on the ground conductor.

【0016】[0016]

【発明の効果】以上説明したようにこの発明によれば
来のコプレーナ線路に比べて小さな低インピーダンス
線路をもつマイクロ波集積回路を提供することができ
る。
As described above, according to the present invention ,
It is possible to provide a microwave integrated circuit having a small low impedance line in comparison with the traditional coplanar line.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るモノリシックマイクロ波集積回路
の断面図。
FIG. 1 is a cross-sectional view of a monolithic microwave integrated circuit according to the present invention.

【図2】本発明に係るモノリシックマイクロ波集積回路
の電界分布を示す模式図。
FIG. 2 is a schematic diagram showing an electric field distribution of the monolithic microwave integrated circuit according to the present invention.

【図3】従来例のモノリシックマイクロ波集積回路の断
面図。
FIG. 3 is a block diagram of a conventional monolithic microwave integrated circuit.
Area view.

【図4】従来例のモノリシックマイクロ波集積回路の電
界分布を示す模式図。
FIG. 4 shows a conventional monolithic microwave integrated circuit.
The schematic diagram which shows a field distribution.

【図5】モノリシックマイクロ波集積回路の特性を説明
する線図。
FIG. 5 illustrates characteristics of a monolithic microwave integrated circuit.
Diagram.

【符号の説明】[Explanation of symbols]

13,14,23,24…接地導体 21…半絶縁性半導体基板 22…中心ストリップ導体 101,102…伝送線路のインピーダンス 13, 14, 23, 24: ground conductor 21: semi-insulating semiconductor substrate 22: center strip conductor 101, 102: impedance of transmission line

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半絶縁性半導体基板と、所定の幅に形成
された中心ストリップ導体および前記中心ストリップ導
体の両側に同じ間隔でかつ前記中心ストリップ導体より
も厚く形成された接地導体を有し、前記半絶縁性半導体
基板上に形成されたコプレーナ線路とを具備しているこ
とを特徴とするマイクロ波集積回路。
[Claim 1 further comprising a semi-insulating semiconductor substrate, the thick formed grounding conductor than the same distance on both sides and the center strip conductor of the center strip conductor and said center strip conductor formed in a predetermined width, The semi-insulating semiconductor
A coplanar line formed on a substrate.
And a microwave integrated circuit.
【請求項2】 半絶縁性半導体基板と、所定の幅に形成
された中心ストリップ導体および前記中心ストリップ導
体の両側に同じ間隔でかつ前記中心ストリップ導体より
も厚く形成された接地導体を有し、前記半絶縁性半導体
基板上に形成されたコプレーナ線路とを具備しているこ
とを特徴とするモノリシックマイクロ波集積回路。
2. A comprises a semi-insulating semiconductor substrate, a ground conductor formed thicker than the same distance on both sides and the center strip conductor of the center strip conductor and said center strip conductor formed in a predetermined width, The semi-insulating semiconductor
A coplanar line formed on a substrate.
And a monolithic microwave integrated circuit.
【請求項3】 前記中心ストリップ導体上および前記接
地導体上を被覆する絶縁膜を具備してなることを特徴と
する請求項記載のモノリシックマイクロ波集積回路。
3. The monolithic microwave integrated circuit according to claim 2 , further comprising an insulating film covering the center strip conductor and the ground conductor.
JP04292494A 1994-03-15 1994-03-15 Microwave integrated circuit Expired - Lifetime JP3351613B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04292494A JP3351613B2 (en) 1994-03-15 1994-03-15 Microwave integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04292494A JP3351613B2 (en) 1994-03-15 1994-03-15 Microwave integrated circuit

Publications (2)

Publication Number Publication Date
JPH07254661A JPH07254661A (en) 1995-10-03
JP3351613B2 true JP3351613B2 (en) 2002-12-03

Family

ID=12649577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04292494A Expired - Lifetime JP3351613B2 (en) 1994-03-15 1994-03-15 Microwave integrated circuit

Country Status (1)

Country Link
JP (1) JP3351613B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011007507A1 (en) * 2009-07-17 2011-01-20 日本電気株式会社 Substrate for semiconductor package and method for manufacturing substrate for semiconductor package
JP2011101327A (en) * 2009-11-09 2011-05-19 Canon Inc Signal transmission line

Also Published As

Publication number Publication date
JPH07254661A (en) 1995-10-03

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