JP3351381B2 - Display device charge recovery method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and a circuit for collecting electric charges of a display device, and more particularly to a method and a circuit of collecting electric charges of a display device such as a plasma display panel.

[0002]

2. Description of the Related Art Pixels of a display device such as a plasma display panel are equivalently a capacitive load, and a high voltage of about several tens of volts is required to drive the capacitive load. Therefore, in the case of a display device such as a plasma display panel, a large loss of energy occurs when charging and discharging a charge to and from a capacitive load, which is a major cause of an increase in power consumption of the entire display device.

Further, since the capacitance value of a pixel of a display device such as a plasma display panel changes depending on a pattern to be displayed, electric charge accumulated in a capacitive load whose capacitance value changes in order to reduce power consumption of the display device. There is a demand for the realization of a charge recovery circuit that recovers high efficiency.

FIG. 6 is a circuit diagram showing a configuration of a conventional charge recovery circuit. As shown in FIG. 6, a conventional charge recovery circuit A includes a DC power supply 1, a charge / discharge signal generation circuit 3 for driving a charging transistor 2a and a discharge transistor 2b, and a recovery signal generation circuit 5 for driving a recovery transistor 4. , A diode 6a, a coil 8 for storing the energy of the charge stored in the load capacitor 7 as current energy,
b, and a capacitor 9 connected in parallel to the DC power supply 1.

The conventional charge recovery circuit A will be described in detail. As shown in FIG. 6, the positive electrode of the DC power supply 1 is connected to the cathode of the diode 6b, the positive electrode of the capacitor 9, and the source of the charging transistor 2a. The drain of the charging transistor 2a is connected to the positive electrode of the load capacitor 7 and the drain of the discharging transistor 2b. The gate of the charging transistor 2a and the gate of the discharging transistor 2b are connected to the output terminal of the charge / discharge signal generation circuit 3.

[0006] The output terminal of the charge / discharge signal generating circuit 3 is connected to the input terminal of the recovery signal generating circuit 5. The source of the discharging transistor 2b is connected to one end of the coil 8 and the cathode of the diode 6a. The anode of diode 6a is connected to the negative electrode of DC power supply 1. The other end of the coil 8 is connected to the anode of the diode 6b and the drain of the recovery transistor 4. The source of the collecting transistor 4 and the negative electrode of the capacitor 9 are connected to the negative electrode of the DC power supply 1, and the gate of the collecting transistor 4 is connected to the output terminal of the collecting signal generating circuit 5.

FIG. 7 is a timing chart for explaining the operation of the charge recovery circuit of FIG. As shown in FIG. 7, first, when the charging transistor 2a is turned on by the low level voltage V1 output from the charge / discharge signal generation circuit 3, each positive electrode of the DC power supply 1 and the capacitor 9 and the positive electrode of the load capacitor 5 The electrodes conduct.

At this time, the discharging transistor 2b is cut off by the low level voltage V1 output from the charge / discharge signal generating circuit 3, and the positive electrode of the load capacitor 7 and one end of the coil 8 are cut off. Voltage VC of positive electrode of load capacitance 7
Has reached the power supply voltage Vdd, the load capacitance 7 has C
Energy Ec of × Vdd ^2/2 is stored.

While the low level voltage V1 continues to be output from the output terminal of the charge / discharge signal generating circuit 3, the voltage VC of the positive electrode of the load capacitor 7 is maintained at the power supply voltage Vdd, and the charge energy stored in the load capacitor 7 is maintained. Ec is maintained at C × Vdd ^2/2.

Next, when the charging transistor 2a is turned off and the discharging transistor 2b is turned on by the high level voltage V1 output from the charge / discharge signal generating circuit 3, when the positive electrode of the DC power supply 1 and the capacitor 12 The positive electrode of the load capacitance 5 is shut off, and the positive electrode of the load capacitance 5 is electrically connected to one end of the coil 9.

At this time, the recovery signal generation circuit 5 outputs a high-level voltage V3 to the gate of the recovery transistor 4. Due to this high-level voltage, the recovery transistor 4 conducts, and the other end of the coil 8 conducts to the negative electrode of the DC power supply 1.

Due to the conduction between the other end of the coil 8 and the negative electrode of the DC power supply 1, the cathode voltages of the diodes 6a and 6b are higher than the anode voltages.
No current flows through the diodes 6a and 6b. Further, a series resonance circuit is formed by the capacitance value C of the load capacitance 7 and the inductance L of the coil 8, and a current i flows through the coil 8.

[0013]

In the conventional charge recovery circuit A, the rise of the high level voltage V3 output from the recovery signal generation circuit 5 to the gate of the recovery transistor 4 is output from the charge / discharge signal generation circuit 3. Voltage V1
Synchronizes with the rising edge of The period during which the high-level voltage V3 is continuously output from the recovery signal generation circuit 5 to the gate of the recovery transistor 4 is set to an arbitrary value ton. Therefore, the time during which the collection transistor 4 is in the conductive state is constant without depending on the capacitance value C of the load capacitance 7.

Therefore, if the conduction time ton of the recovery transistor 4 is longer than a quarter of the series resonance generated by the capacitance value C of the load capacitance 7 and the inductance L of the coil 8, the forward direction of the diode 6a The voltage VF, the current i1 flowing through the coil 8, and the forward current i
A product of the time t1 during which 1 flows, that is, an energy loss of VF × i1 × t1 occurs.

As a result, the current of the coil 8 is reduced by di1 from the maximum value, and the energy returning to the capacitor 9 is also reduced. Therefore, the energy C × Vdd ² stored in the load capacitor 7 is obtained.
The ratio of the energy returning to the capacity 9 with respect to / 2, that is, the energy recovery efficiency is reduced.

The conduction time t of the recovery transistor 4
When on is smaller than a quarter cycle of the series resonance generated by the capacitance value C of the load capacitance 7 and the inductance L of the coil 8, the capacitance value C of the load capacitance 7 and the voltage V3 are changed from the high level to the low level. , The product of one half of the square of the positive electrode voltage VC2 (t2) of the load capacitor 7 immediately before switching to C × V
C2 (t2) ^2/2 of the inability to recover the energy.

Therefore, the current of the coil 8 is larger than the maximum value by d.
Since the energy is reduced by i2 and the energy returning to the capacity 9 is also reduced, the energy recovery efficiency is reduced. That is, the efficiency of recovering the charge accumulated in the load capacitance 7 depends on the capacitance value C of the load capacitance 7, and thus it is difficult to reduce the power consumption in the case of a display device in which the capacitance value C of the load capacitance 7 fluctuates.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of recovering electric charge of a display device, in which the energy of the electric charge to be recovered does not depend on the capacitance value of the load capacitance, the energy recovery efficiency is increased, and the power consumption of the display device can be reduced. And to provide a circuit.

[0019]

In order to achieve the above object, a charge recovery circuit of a display device according to the present invention comprises: a charge recovery circuit that stores a charge energy stored in a load capacitance of a pixel of a display device ; One end is the charge energy of the load capacitance
Connected to a discharging transistor for discharging
Parallel connection to DC power supply for applying maximum voltage to load capacity
Connected via a diode to the
Depending on the inductance value of the coil connected to the transistor,
Of the display device to be recovered using the series resonance
In the load recovery method, the discharging transistor is turned on.
To recover the charge energy to the coil, the load capacity
And when the voltage is sufficiently higher than 0 V, the
The collection transistor is turned on to connect the other end of the coil.
When the voltage drops to 0V, the recovery truck
Shut off the transistor and stop collecting it into the coil.
Connect the charge energy recovered by the coil in parallel with the DC power supply.
It is characterized in that it is recovered through the diode to the continued capacity .

[0020] More above recovery method, the charge energy stored in the load capacitance of a pixel of a display device, is recovered by using a series resonance action determined by the capacitance value and the inductance value of the coil of the load capacitance, this time, The recovery time of the charge energy is adjusted based on the voltage detection result of the load capacitance. Thereby, the energy of the charge to be recovered does not depend on the capacitance value of the load capacitance, the energy recovery efficiency is increased, and the power consumption of the display device can be reduced.

Further, with the charge collecting circuit of the display device according to the present invention, the method of collecting charges of the display device can be realized.

[0022]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a circuit diagram showing a configuration of a charge recovery circuit of a display device according to a first embodiment of the present invention. As shown in FIG. 1, a charge recovery circuit 1 of a display device
0 denotes a DC power supply 11, a charging / discharging signal generating circuit 12, a charging transistor 13, a discharging transistor 14, a load capacitance 15, a voltage detecting circuit 16, a collecting signal generating circuit 17, a diode 18, a coil 19, a collecting transistor 20, It has a diode 21 and a capacitor 22.

The charge / discharge signal generation circuit 12 generates a charge signal for driving the charge transistor 13 or a discharge signal for driving the discharge transistor 14, and
6 detects the voltage VC of the positive electrode of the load capacitance 15. The recovery signal generation circuit 17 drives the recovery transistor 20, and the coil 19 stores the energy of the charge stored in the load capacitor 15 as the energy of the current. The capacitor 22 is connected to the DC power supply 11 in parallel.

The configuration of the charge recovery circuit 10 will be described in detail. As shown in FIG. 1, the positive electrode of the DC power supply 11 is connected to the cathode of the diode 21, the positive electrode of the capacitor 22, and the source of the charging transistor 13.

The drain of the charging transistor 13 is connected to the positive electrode of the load capacitor 15 and the drain of the discharging transistor 14. The gate of the charging transistor 13 and the gate of the discharging transistor 14 are connected to the output terminal of the charge / discharge signal generating circuit 12. Discharge transistor 14
To the input terminal of the voltage detection circuit 16 and the coil 19
, And the cathode of the diode 18.

The output terminal of the voltage detection circuit 16 is connected to the input terminal of the recovery signal generation circuit 17. The anode of the diode 18 is connected to the negative electrode of the DC power supply 11. The other end of the coil 19 is connected to the anode of the diode 21 and the drain of the collection transistor 20. The source of the collection transistor 20 and the negative electrode of the capacitor 22 are connected to the DC power supply 1
1, and the gate of the collection transistor 20 is connected to the output terminal of the collection signal generation circuit 17.

FIG. 2 is a timing chart for explaining the operation of the charge recovery circuit of FIG. As shown in FIG. 2, first, the charge / discharge signal generation circuit 12 is provided with a load capacitance 1 of the display device.
5, a voltage V1 for driving the charging transistor 13 and the discharging transistor 14 is output to charge and discharge the electric charge.

When the charging transistor 13 is turned on by the low level voltage V1 output from the output terminal of the charging / discharging signal generation circuit 12 to the gate of the charging transistor 13,
Each positive electrode of the DC power supply 11 and the capacitance 22 and the load capacitance 15
Are conducted.

At this time, since the discharging transistor 14 is cut off by the low level voltage V1 output from the charge / discharge signal generating circuit 12 to the gate of the discharging transistor 14, one end of the coil 19, the cathode of the diode 18, and Each of the input terminals of the voltage detection circuit 16 and the positive electrode of the load capacitance 15 are shut off.

When the voltage VC of the load capacitance 15 reaches the power supply voltage Vdd by the electric charge supplied from the capacitance 22 connected in parallel to the DC power supply 11, the load capacitance 15
The capacitance value C of the load capacitance 15 and the square of the power supply voltage Vdd squared,
Min 1 energy product, i.e., the energy Ec of C × Vdd ^2/2 accumulates.

While the low level voltage V1 continues to be output from the output terminal of the charge / discharge signal generation circuit 12, the voltage VC of the positive electrode of the load capacitor 15 is maintained at the power supply voltage Vdd, and the charge energy stored in the load capacitor 15 is maintained. Ec is C × Vdd ² /
Maintained at 2.

Next, the high-level voltage V1 output from the charge / discharge signal generation circuit 12 to each gate of the charging transistor 13 and the discharging transistor 14 shuts off the charging transistor 13 and turns on the discharging transistor 14. I do. As a result, the positive electrodes of the DC power supply 11 and the capacitor 22 and the positive electrode of the load capacitor 15 are cut off, and the positive electrode of the load capacitor 15 and one end of the coil 19 conduct.

The voltage detecting circuit 16 detects a voltage V2 generated at a contact point between the source of the discharging transistor 14 and one end of the coil 19. The voltage V detected by the voltage detection circuit 16
2 is sufficiently higher than zero, the recovery signal generation circuit 17 outputs the high level voltage V3, and when the voltage V2 detected by the voltage detection circuit 16 is zero or close to zero, the recovery signal generation circuit 17 outputs the low level voltage V3. Output.

When the voltage V2 detected by the voltage detection circuit 16 is sufficiently higher than zero, the high-level voltage V3 output from the recovery signal generation circuit 17 to the gate of the recovery transistor 20 makes the recovery transistor 20 conductive,
The other end of the coil 19 conducts with the negative electrode of the DC power supply 11.

At this time, since the respective cathode voltages of the diodes 18 and 21 are higher than the respective anode voltages, no current flows through the diodes 18 and 21. Further, a series resonance circuit is formed by the capacitance value C of the load capacitance 15 and the inductance L of the coil 19, and a current i flows through the coil 19. Furthermore, load capacity 1
5, the voltage VC of the positive electrode decreases, and part of the energy Ec of the electric charge stored in the load capacitance 15 changes to the energy El of the current flowing through the coil 19.

Next, when the voltage VC of the positive electrode of the load capacitor 15 decreases to near zero, the recovery signal generation circuit 1 is activated by the low level voltage V2 detected by the voltage detection circuit 16.
7 outputs the low level voltage V3 to the gate of the recovery transistor 20. Due to the low level voltage V3, the collecting transistor 20 is cut off, and the other end of the coil 19 is cut off from the negative electrode of the DC power supply 11.

When the voltage VC of the positive electrode of the load capacitor 15 becomes zero, the coil 19 has an inductance L of the coil 19 and a half of the square of the current I flowing in the coil 19 at this time. energy product, i.e., the energy of the L × I ^2/2 El is accumulated, the recovery of energy is completed from the load capacitor 15 to the coil 19.

Next, the diode 18 and the diode 21
The current i of the coil 19 is
8 and a diode 21, flows into a capacitor 22 connected between the positive and negative electrodes of the DC power supply 11,
Is returned to the capacity 22.

That is, the recovery signal generation circuit 17 functions as an adjusting means for adjusting the recovery time of the charge energy based on the voltage detection result of the load capacitance 15.

FIG. 3 is an explanatory diagram showing the energy recovery efficiency with respect to the load capacity in a table. As shown in FIG. 3, for the energy C × Vdd ^2/2 stored in the load capacitor 15, the ratio of the energy back to the capacitor 22, i.e., the load capacitance 1
5, the recovery efficiency of the charge energy stored in the load capacity 15
Does not depend on the capacitance value C.

For this reason, the charge recovery circuit 10 of the display device described above reduces the power consumption of the display device as compared with the conventional charge recovery circuit that depends on the capacitance value C of the load capacitor 15. (Second Embodiment) FIG. 4 is a circuit diagram showing a configuration of a charge recovery circuit of a display device according to a second embodiment of the present invention. As shown in FIG. 4, the charge recovery circuit 3 of the display device
0 has the same configuration and operation as the charge recovery circuit 10 except that a voltage fixing transistor 31 and a voltage fixing signal generation circuit 32 are added to the charge recovery circuit 10 (see FIG. 1). .

The drain of the voltage fixing transistor 31 is connected to the source of the discharging transistor 14. The voltage fixing signal generation circuit 32 has an input terminal connected to the output terminal of the collection signal generation circuit 17 and an output terminal connected to the gate of the voltage fixing transistor 31.

FIG. 5 is a timing chart for explaining the operation of the charge recovery circuit of FIG. As shown in FIG. 5, the voltage fixed signal generation circuit 32 has passed for a fixed time t, for example, L × I / Vdd, after the voltage V3 at the output terminal of the recovery signal generation circuit 17 switches from the high level to the low level. At this time, the voltage V4 at the output terminal is switched from the low level to the high level.

When the voltage V3 at the output terminal of the recovery signal generation circuit 17 switches from the low level to the high level, the voltage fixed signal generation circuit 32 switches the voltage V4 at the output terminal from the high level to the low level.

The high voltage V4 output from the output terminal of the voltage fixing signal generating circuit 32 to the gate of the voltage fixing transistor 31 causes the voltage fixing transistor 31 to conduct. At this time, since the discharging transistor 14 is also conductive, the positive electrode of the load capacitor 15 is conductive with the negative electrode of the DC power supply 11.

Therefore, even when an unnecessary charge flows from the outside of the charge recovery circuit 30, the voltage fixing transistor 3
1 is conducting, the voltage V of the positive electrode of the load capacitance 15 is
C is held at zero.

For this reason, the recovery efficiency of the charge energy stored in the load capacitance 15 does not depend on the capacitance value C of the load capacitance 15 (see FIG. 3). Power consumption is 1 load capacity
5 than the conventional charge recovery circuit that depends on the capacitance value C of 5.

After the energy returns to the capacitor 22 connected in parallel to the DC power supply 11, the voltage fixing transistor 31 fixes the voltage VC of the positive electrode of the load capacitor 15 to zero. A change in the positive electrode voltage VC of the load capacitor 15 due to unnecessary external charges can be prevented, and the display pattern can be stabilized.

As described above, according to the present invention, the energy of the electric charge accumulated in the load capacitance 15 of the display device is recovered by the coil 19 connected to the source of the discharge transistor 14, and at the same time, the positive electrode of the load capacitance 15 The voltage VC is detected. When the voltage VC of the positive electrode of the load capacitor 15 decreases to a value close to zero, the operation of recovering the coil 19 is stopped using the detection result of the voltage VC, and the energy recovered in the coil 19 is transferred to the positive electrode of the DC power supply 11. Capacitor 22 connected between negative electrodes
Operation to return to.

That is, since the operation of detecting the voltage of the load capacitor 15 to turn on or off the recovery transistor 20 and switching the operation of recovering energy to the coil 19 to the operation of returning the energy to the capacitor 22 connected in parallel to the DC power supply 11 is switched, The energy of the generated charge does not depend on the capacitance value C of the load capacitance 15.

[0051] Thus, for the energy C × Vdd ^2/2 stored in the load capacitor 15, the ratio of the energy back to the capacitor 22, i.e., the energy recovery efficiency is higher than the conventional charge recovery circuit, as a plasma display panel Therefore, the power consumption of the display device in which the capacitance value C of the load capacitance 15 changes can be reduced.

The charge recovery circuit 30 of the display device to which the voltage fixing transistor 31 and the voltage fixing signal generation circuit 32 are added provides the positive electrode voltage VC of the load capacitor 15 due to unnecessary charge from outside the charge recovery circuit 30. To prevent fluctuations,
The display pattern can be stabilized.

[0053]

As described above, according to the present invention, the charge energy stored in the load capacitance of the pixel of the display device is obtained.
Depends on the load capacitance value and the coil inductance value.
Is recovered using the series resonance action determined by
At this time, the recovery time of the charge energy is adjusted based on the voltage detection result of the load capacitance, so that the energy of the recovered charge does not depend on the capacitance value of the load capacitance, the energy recovery efficiency is increased, and the power consumption of the display device is increased. Can be reduced.
Further, it is possible to prevent a change in the positive electrode voltage of the load capacitance due to unnecessary charges from outside the charge recovery circuit, and to stabilize the display pattern.

Further, with the charge collecting circuit of the display device according to the present invention, the method of collecting charges of the above display device can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a charge recovery circuit of a display device according to a first embodiment of the present invention.

FIG. 2 is a timing chart illustrating the operation of the charge recovery circuit of FIG.

FIG. 3 is an explanatory diagram showing a table of energy recovery efficiency with respect to a load capacity;

FIG. 4 is a circuit diagram showing a configuration of a charge recovery circuit of a display device according to a second embodiment of the present invention.

FIG. 5 is a timing chart illustrating the operation of the charge recovery circuit of FIG.

FIG. 6 is a circuit diagram showing a configuration of a conventional charge recovery circuit.

FIG. 7 is a timing chart illustrating the operation of the charge recovery circuit of FIG. 6;

[Explanation of symbols]

 10, 30 Charge recovery circuit of display device 11 DC power supply 12 Charge / discharge signal generation circuit 13 Charging transistor 14 Discharge transistor 15 Load capacitance 16 Voltage detection circuit 17 Recovery signal generation circuit 18, 21 Diode 19 Coil 20 Recovery transistor 22 Capacity 31 voltage fixing transistor 32 voltage fixing signal generating circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/20 621 G09G 3/20 611 G09G 3/28 H04N 5/66 101

Claims (2)

(57) [Claims] 1. A method according to claim 1, wherein the charge energy stored in the load capacitance of the pixel of the display device is divided into a capacitance value of the load capacitance and one end of the load capacitance.
For discharging transistor that discharges charge energy of load capacity
Connect the other end to apply the maximum voltage to the load capacitance
Through a diode to a capacitor connected in parallel to the DC power supply
Of the coil connected to the collection transistor
Utilizing the series resonance action determined by the conductance value
In the method for collecting charge of a display device to be collected, the discharge
Charge transistor is turned on to transfer charge energy to the coil.
Detecting the voltage of the load capacitance,
When the voltage is sufficiently higher than V, the recovery transistor is turned on.
And ground the other end of the coil, and reduce the voltage to 0V.
After dropping, shut off the recovery transistor and connect the coil.
Stop collection and then charge energy collected in coil
The diode is connected to a capacitor connected in parallel with the DC power supply.
A charge collection method for a display device, wherein the charge is collected through a device. 2. The method according to claim 1, wherein the voltage of the load capacitor is fixed after the charge energy is collected in the capacitor.