JP3348479B2 - Error processing device and error processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an abnormality processing apparatus and a processing method, and more particularly to an abnormality processing when an abnormality that may develop into a fire occurs in an IC test apparatus or its control apparatus. The present invention relates to a processing apparatus and a processing method that can be performed accurately.

[0002]

2. Description of the Related Art FIG. 5 shows the configuration of an abnormality processing apparatus for an IC test apparatus according to the prior art. The IC test device 2 is controlled by the control device 1 and performs various tests on the IC elements. An operator can control the power switch 12 to set the various power supplies 11 of the control device 1 and the various power supplies 21 of the IC test apparatus 2 to an operation state or a stop state.

[0003] The IC test apparatus 2 is provided with various abnormality sensors 22 for detecting abnormalities such as a temperature sensor, a smoke sensor, a fan sensor and the like which may cause a fire. A sensor (not shown) for detecting is built in. When an abnormality such as a temperature abnormality, smoke, power supply abnormality, or fan stop occurs, the corresponding abnormality sensor 22 operates, and the abnormality detection output is transmitted to the abnormality monitoring circuit 15.
The display unit 16 is operated by the output to notify the occurrence of abnormality to the outside. The display unit 16 is usually composed of an LED, a buzzer, and the like, and aims to visually and audibly notify the operator of the occurrence of the abnormality.

When the abnormality monitoring circuit 15 interrupts the control computer 17 and the control computer 17 detects that this interrupt is an abnormal interrupt (S601) as shown in the flowchart of FIG. 6, it checks the cause of the abnormality. (S602), it is sent to the terminal 18 and displayed on the screen (S603). After that, the power control circuit 13
By sending an F command, the power supply 11 of the control device 1 and the power supply 21 of the IC test device 2 are cut off (S604).

[0005]

According to the prior art, even when an abnormality that does not affect the control device occurs, the abnormality occurs instantaneously due to, for example, an instantaneous interruption of power supplied to the IC test device. However, even when the power returns to the normal state with the return of the supplied power, all the power supplies of the IC test apparatus and the control apparatus are cut off.

When the power of the IC test apparatus is cut off, there is a problem that information such as measurement conditions and measurement results stored in hardware when an abnormality occurs is lost. Also, once the power of the control device is turned off, it takes a relatively long time in minutes to return the IC test device to the operating state again. This is because the operation system for the initial setting must be fetched from the external storage device and activated.

Therefore, in the case where an abnormality that does not affect the control device instantaneously occurs in the IC test device and immediately returns to the normal state, the risk of fire in the IC test device is avoided. Regardless of the state, there is a problem that the operation of the operator is required for the above processing, and time must be spent.

According to the present invention, when an abnormality that does not affect the control apparatus occurs instantaneously in the test apparatus, information such as measurement conditions and measurement results is not lost, and time is required to return to the operating state. It is an object of the present invention to provide an abnormality processing apparatus and an abnormality processing method that do not require spending.

[0009]

SUMMARY OF THE INVENTION To achieve this object, the present invention provides an IC test apparatus which operates when an abnormality occurs that may cause a fire, and processes an abnormality detection output. The output of the abnormality monitoring circuit interrupts the control computer, the control computer displays the cause of the abnormality on the terminal, and operates the power supply control circuit to turn off the power of the IC test apparatus and the control apparatus. In the processing device, various abnormality sensors of the IC test device and the control device classified according to the type of the cause of the abnormality, an abnormality monitoring circuit that processes the abnormality detection output and interrupts the control computer, and detects an abnormality in the power supplied to the control device. Monitors and supplies power to the control unit for a predetermined time when an abnormality occurs, and informs the abnormality monitoring circuit whether or not the unit is operating. A control computer for determining whether or not the IC test apparatus can be returned to the operating state by reading the apparatus, an abnormality cause and whether or not the instantaneous interruption power supply is operating from the abnormality monitoring circuit, and an output of the control computer Means for operating the power supply control circuit to cut off only the power supply of the IC test apparatus while the power supply of the control apparatus is operating, and to start the power supply of the IC test apparatus from a stopped state.

[0010]

When the abnormality of rank 2 is detected, the test information of the specific test equipment is temporarily evacuated, the power is turned off for a predetermined time, and the power is turned on again after the lapse of a predetermined time. The returned test information is returned to the specific test equipment, and the operation is restarted.

[0011]

FIG. 1 is a block diagram showing an abnormality processing apparatus according to an embodiment of the present invention. In FIG. 1, parts corresponding to those of the conventional apparatus shown in FIG. 5 are denoted by the same reference numerals. In the present invention, the various types of abnormal sensors are classified according to the types of abnormal factors detected. An abnormality occurring in the control apparatus 1 and an abnormality occurring in the IC testing apparatus 2 which are considered to affect the control apparatus 1 are regarded as rank 1 abnormalities.
Among the abnormalities that have occurred in the test apparatus 2, abnormalities that are not considered to directly affect the control apparatus 1 are referred to as rank 2 abnormalities. The abnormality sensor 14 and the abnormality sensor 22A are various abnormality sensors for detecting rank 1 abnormality, and the abnormality sensor 22B is various abnormality sensors for detecting rank 2 abnormality. The abnormality of the power supply 11 is rank 1 abnormality, and the abnormality of the power supply 21 is rank 2 abnormality.

The abnormality sensor 14 detects an abnormality such as an abnormal temperature inside the control device 1, smoke, or stop of the fan. The abnormality sensor 22A detects an abnormality such as a temperature abnormality or a smoke which has a high degree of danger and may immediately develop into a fire among the sensors for detecting an abnormality inside the IC test apparatus 2. It is considered that the control device 1 is affected. The abnormality sensor 22B detects an abnormality such as a fan stop, which is considered to have a relatively low degree of danger and does not affect the control device 1, among sensors for detecting an abnormality inside the IC test apparatus 2.

A power supply unit 3 is provided between the power supply 11 and the power supply to the control unit 1 so as to supply power for a predetermined time. Control device 1 or IC test device 2
When an abnormality occurs that could develop into a fire,
The abnormality detection output is processed by the abnormality monitoring circuit 15, and the display 16 is operated by the output to notify the outside of the occurrence of the abnormality. At the same time, the uninterruptible power supply 3 monitors the voltage of the power supplied to the power supply 11 of the control device 1, and if there is an abnormality, starts the power supply to the power supply 11 instead, and monitors the abnormality. An operating signal is output to the circuit 15. Further, the abnormality monitoring circuit 15 which has processed the abnormality detection output interrupts the control computer 17, and the control computer 17 performs the processing as shown in FIG. This is the same as the conventional procedure shown.

The subsequent processing will be described with reference to the flowchart shown in FIG. Next, the control computer 17 reads the cause of the abnormality from the abnormality monitoring circuit 15 to determine whether the abnormality is rank 1 abnormality or rank 2 abnormality (S203). This is to determine whether it is necessary to immediately turn off all the power supplies by examining the cause of the abnormality, or whether there is a possibility that the IC test apparatus 2 may return to the operating state.

When the abnormality is rank 1 abnormality, it is considered that there is no possibility of returning to the operation state, and the cause of the abnormality is sent to the terminal 18 and displayed on the screen as in the prior art (S204). Then, an OFF command is sent to the power supply control circuit 13 to supply the power supply 11 of the control device 1 and the power supply 2 of the IC test device 2.
1 is turned off (S205), and the process ends. This state is the same as the conventional state. In order to return the IC test apparatus 2 to the operation state after removing the abnormality, the operation system for the initial setting must be fetched from the external storage device and activated. .

However, if the abnormality is rank 2 abnormality, it is considered that there is a possibility that the IC test apparatus 2 may return to the operating state, and tester information of hardware registers which cannot be lost at that time, for example, various Information such as measurement conditions and various measurement results is saved in the memory of the control computer 17 (S
206), after sending the cause of the abnormality to the terminal 18 and displaying it on the screen (S207), the power control circuit 13
An F command is sent to cut off only the power supply 21 of the IC test apparatus 2 (S208). In this state, since the power supply 11 of the control device 1 is in the operating state and the control device 1 is in the operating state,
It is possible to perform processing on the IC test apparatus 2.

The control computer 17 waits for a predetermined time in this state (S209). This is the time when it is considered that the IC test apparatus 2 returns to the normal state again during the period when the abnormality ends instantaneously, for example, about 3 seconds. Next, the abnormal condition monitoring circuit 15
It is determined whether or not the operation of the control device 1 can be continued by checking whether or not a signal during operation has been input from (S210). This is IC test equipment 2
This is because, in order to return to the operating state, the condition that the control device 1 continues to operate is a condition.

When the instantaneous interruption power supply 3 is operating, it is determined that the original power supply to the power supply 11 has stopped, and it is determined that the operation of the control apparatus 1 cannot be continued. The file of the test program and the like stored in the memory of No. 17 and the information of the saved hardware register are stored in the external storage device (S211), and the process is ended. This state is the same as the conventional state. In order to return the IC test apparatus 2 to the operation state after removing the abnormality, the operation system for the initial setting must be fetched from the external storage device and activated. . However, by reading the file and information stored in the external storage device by the above processing, the measurement state at the time of occurrence of the abnormality can be reproduced.

When the non-interruptible power supply 3 is not operating, the following processing is continuously performed. Power supply 11
Control device 1 assuming that there was no abnormality in the power supplied to
It is determined that the operation of the IC test apparatus 2 can be continued, and an ON command is sent to the power supply control circuit 13 to return the IC test apparatus 2 to the operation state to turn on the power supply 21 of the IC test apparatus 2 (S21).
2). In this state, the process waits for a further predetermined time (S213). This is to determine whether the abnormality is instantaneous or continuous based on whether an abnormality occurs again during this time (S214), for example, about 20 seconds.

When an abnormality occurs during the waiting time for a predetermined time and the abnormality monitoring circuit 15 interrupts the control computer 17 and the control computer 17 detects that the interrupt is an abnormal interrupt, the abnormality is continuous. Immediately assuming that the cause is abnormal, the cause of the abnormality is checked (S216), and is sent to the terminal 18 and displayed on the screen (S217). Is turned off (S218) and the process ends.
In this state, the control device 1 continues to operate, and the control computer 17 waits to transfer the information saved in the above-mentioned memory to the hardware register again when the power supply 21 of the IC test device 2 is turned on. Therefore, in order to return the IC test apparatus 2 to the operating state after removing the abnormality, the operator only has to operate the power switch 12 to turn on the power supply 21 of the IC test apparatus 2.

If no abnormal interrupt has occurred even after the predetermined time has elapsed, the control computer 17 regards the information saved in the above-mentioned memory as a hardware register again, assuming that the abnormality was instantaneous. Transfer (S21
5) Return the IC test apparatus 2 to the operating state and end the process. In this state, the information such as the measurement results up to the occurrence of the abnormality is stored in the memory of the control computer 17, and the hardware reproduces the measurement conditions at the time of occurrence of the abnormality, so that the operator immediately executes the test. be able to.

FIG. 3 is a block diagram showing an abnormality processing apparatus according to another embodiment of the present invention. Test control device frames 31 and 32 are provided as devices corresponding to the IC test device 2 shown in the embodiment of FIG. 1, and an abnormal sensor (not shown) is mounted in the frame. When an error occurs, an alarm is generated. The alarms generated from the test control units 31 and 32 are transmitted to the alarm analysis processor 33, where the analysis of the alarm contents and various processes are performed intensively. This corresponds to the abnormality monitoring circuit 15 and the control computer 17 of the apparatus shown in FIG.

The power control circuit 34 turns on and off the power of the test control units 31 and 32 in response to a control signal from the processor 33. Further, when the processor 33 receives an alarm from a specific test control device frame, the processor 33 once saves the test data stored in the frame to the test data save / return control unit 35, and then controls the power control circuit 34.
Command to turn off the power supply of the frame corresponding to. The data saved in the test data save / restore control unit 35 is stored in the memory 3
6 is stored. After the power of the specific frame is turned off, wait for a stable state for a certain period, turn on the power of the specific frame again, and then analyze the alarm again. If the alarm does not occur again, save the test data / The test data saved in the memory 36 is returned to the test control units 31 and 32 through the return control unit 35. By executing these control methods, some alarms can continue testing without stopping the system.

FIG. 4 is a flowchart showing the sequence at that time. When an alarm is generated from the test controller racks 31 and 32, the alarm is analyzed by the alarm analyzer processor 33 (S401), and it is determined whether or not an alarm is generated (S402). When an alarm occurs, the frame on which the alarm occurred is specified (S403), and the test information stored in the specified frame is temporarily saved in the control unit 35 (S404).
Further, the power-on state of each of the frames included in the system is saved (S405), and the power of the frame where an alarm is generated due to an alarm is turned off (S406). Then, a state stabilization wait is performed for a predetermined time (S407), and the power is turned on again (S408). The alarm analyzer processor 33 observes again whether an alarm is generated (S40).
9), it is determined whether or not a re-alarm is due to the same factor (S
410).

If no re-alarm has occurred, it is determined that the frame can be restored, and the test data saved by the test data save / return control unit 35 is restored to the frame (S411). If a re-alarm occurs, it is determined that the frame cannot be restored, and the power is turned off (S41).
2). Then, an alarm buzzer (not shown) is sounded (S41).
3) Stop the system (S414).

In this embodiment, 50% of the alarms
Since temporary alarms such as the instantaneous interruption of power supply, which indicate the above ratio, can be relieved, it can greatly contribute to an increase in the operation rate of the semiconductor test performed in the mass production system.

[0027]

According to the present invention, when an abnormality occurs, if the abnormality does not affect the control device, the control device can continue its operation state, so that hardware information is lost. In addition, if the abnormality is instantaneous, the test equipment can be automatically returned to the operating state in a short time, so the operator can understand that the abnormality was instantaneous. The test can be executed immediately under the same measurement conditions as before the occurrence of the abnormality.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an abnormality processing device according to an embodiment of the present invention.

FIG. 2 is a flowchart showing processing when an abnormality occurs in the embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of an abnormality processing device according to another embodiment of the present invention.

FIG. 4 is a flowchart showing processing when an abnormality occurs in another embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a conventional abnormality processing device.

FIG. 6 is a flowchart illustrating processing performed when an abnormality occurs in a conventional abnormality processing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Control apparatus 2 IC test apparatus 3 Instantaneous interruption power supply 11/21 Power supply 13 Power supply control circuit 15 Abnormality monitoring circuit 14 / 22A / 22B Abnormality sensor 17 Control computer 18 Terminal 31/32 Test control unit frame 33 Alarm analysis unit processor 34 power control circuit 35 test data save / restore control unit 36 memory

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/66 G01R 31/26 G08B 25/00 510

Claims (2)

(57) [Claims] 1. An abnormality sensor for detecting occurrence of an abnormality, and an abnormality monitoring circuit for processing an abnormality detection output from the abnormality sensor.
(15), the cause of the abnormality is notified to the terminal (18) in response to the interrupt signal from the abnormality monitoring circuit (15), and the test equipment is
(2) or an abnormality processing device including a test device (2) and a control computer (17) for turning off the power of the control device (1), wherein the abnormality processing device is provided in the control device (1) and the test device (2). Rank 1 abnormality sensor (14,22A) for detecting high risk abnormalities and Rank 2 abnormality sensor (22B) for detecting low risk abnormalities
Monitors the power supply (11) of the power supply (11) of the control device (1) for abnormality, and when the abnormality occurs, supplies power to the control device (1) for a predetermined time and indicates whether or not the device is operating. A power supply (3) for notifying a signal to the abnormality monitoring circuit, and a power supply (21) of only the test device (2) when an abnormality detection output of the rank-2 abnormality sensor (22B) occurs, for a predetermined time. wherein when the after elapse uninterruptible power supply (3) is in non-operation
An abnormality processing apparatus comprising: the control computer for controlling the power supply (21) of the test apparatus (2) to be turned on again. 2. Influence on a control device for controlling a test device.
If it is not of rank 2 abnormality is detected, by temporarily saving the test information of a particular test device to turn off the power for a predetermined time, Oite after a predetermined time has elapsed, at the time of abnormality occurrence
The uninterruptible power supply that supplies power to the controller is
An abnormality processing method, characterized in that the power of the test apparatus is turned on again only in such a case, the saved test information is returned to the specific test apparatus, and the operation is restarted.