JP3347777B2 - Phase controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase control apparatus for rotating a motor with high precision in a synchronous manner in an apparatus having a motor with poor rotational precision as a drive system.

[0002]

2. Description of the Related Art When a control motor is rotated in synchronism with a reference motor which generates only one reference signal during one rotation, a control system as shown in FIG. 6 is used. . That is, only one PG signal is generated during one rotation so that the rotational position of the control motor can be known, and a value determined based on the time difference t between the reference signal generated from the reference motor and this PG signal. Is given as an operation amount of the control motor, and the control motor is synchronized by changing the rotation speed of the control motor.

In order to achieve synchronization even when the control motor rotates at twice or three times the speed of the reference motor, a speed signal generated from the PG signal and a signal obtained by adding the time difference are naturally manipulated variables. Was adopted.
A signal obtained by adding a compensation for reducing the steady-state error and increasing the response to the manipulated variable is used as a speed command or a torque command of the control motor.

Further, when the positional relationship (phase) in which the reference motor and the control motor are synchronized is changed, control is performed by changing the target time difference between the reference signal and the PG signal.

[0005]

However, in the above-described control method, the reference signal for detecting the rotational position of the reference motor and the PG signal for detecting the rotational position of the control motor can be detected only once in one rotation. In addition to the case where the time difference between the reference signal and the PG signal is set to 0, there is a problem that accurate synchronization cannot be achieved if there is uneven rotation in the reference motor.

In addition, since the time difference can be detected only once during one rotation, the gain of the phase control cannot be increased.
Therefore, there is a problem that it is difficult to quickly synchronize at the changed position when changing the synchronization position, that is, when changing the target time difference.

SUMMARY OF THE INVENTION In view of the above-mentioned conventional problems, the present invention allows a control motor to be accurately synchronized with a reference motor even when there is uneven rotation, and to quickly settle even when the synchronization position is changed. It is intended to provide a device.

[0008]

According to a first aspect of the present invention, there is provided a phase control apparatus which generates a reference signal once or several times during one rotation, and a control motor which rotates in synchronization with the reference motor. , Which occurs only once during one revolution of the control motor
Means for generating a G signal, means for generating an FG signal generated a plurality of times based on the PG signal during one revolution of the control motor, means for detecting a time difference between the reference signal and the FG signal immediately after the reference signal,
Synchronous FG signal detecting means for detecting, as a synchronous FG signal, an FG signal to be controlled with a predetermined time difference from the reference signal when the reference motor and the control motor are rotating in synchronization, Time difference calculating means for calculating a time difference between the reference signal and the synchronous FG signal from a time difference between the FG signal and the synchronous FG signal; and a time difference which should be present when the reference motor and the control motor are rotating synchronously from the calculated time difference. And detecting means for detecting the true time difference, wherein the rotation speed of the control motor is controlled based on the true time difference.

The phase control device according to the second aspect of the present invention generates the same number of synthesized synchronous signals as the FG signals by equally dividing the interval between the reference signal of the reference motor and the immediately preceding reference signal into the number of FG signals. Means for generating a synchronizing signal, means for detecting the time difference between each synchronizing signal and the FG signal immediately after the synchronizing signal, and adding the time difference estimated from the relationship between the FG signal immediately after the synchronizing signal and the synchronizing FG signal to the detected time difference. And a true time difference detecting means for detecting a true time difference by subtracting a time difference between a reference signal to be controlled and a synchronous FG signal when the reference motor and the control motor are rotating synchronously. .

The composite synchronizing signal generating means sets the reference motor to 1
If the time to rotate is known, the time to make one rotation is FG
A signal can be generated by dividing the signal into the same number as the number of signals, and the time difference detecting means can use a reference signal or It is also possible to detect a time difference immediately before the synthesized synchronizing signal or an FG signal closest to the synchronizing signal.

[0011]

According to the above configuration of the present invention, the reference signal and P
By using the time difference between the reference signal and the FG signal immediately after the reference signal instead of using the time difference between the G signals, even when the reference motor has uneven rotation, it is possible to more accurately synchronize when the reference signal is detected.

[0012] Further, a time difference is estimated based on each synthesized synchronizing signal and an immediately following FG signal by using a synthesized synchronizing signal obtained by equally dividing the reference signals by the number of FG signals, and an operation amount of the control motor is determined based on the estimated time difference. Is determined, the number of times of sampling can be made a multiple of the number of FG signals, the gain of the phase control system can be increased, and even when the synchronous position is changed, it is possible to settle quickly.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of the present invention will be described with reference to FIG.

In this embodiment, the number of FG signals in one rotation is M = 8, b is the period of the reference signal, and t0 is the target time difference between the reference signal and the PG signal. The number of each FG signal is 0 for the FG signal when the PG signal is output.
The numbers are given in the order of occurrence. The number of the FG signal generated immediately after the reference signal is k (No. 5 in the figure)
Assuming that a time difference between the reference signal and the k-th FG signal immediately after the reference signal is t1, the synchronization deviation T is T = t0− {t1 + (8−k) · b / 8} (1) It becomes. Therefore, the manipulated variable P with various compensations is given by P = f (T) = F (t1), which is applied to the control motor.

Next, a phase control device according to a second embodiment of the present invention will be described with reference to FIG.

In this embodiment, as in the first embodiment, the number of FG signals during one rotation is M = 8, and b is the time between reference signals. The synthesized synchronizing signal is obtained by equally dividing the time b between the reference signals into the number M of the FG signals, and is actually created using the clock signal CLK. However, the clock signal at the time b is not always a multiple of the number M of the FG signals, so that a shift less than the cycle of the clock signal occurs. However, a clock signal fast enough to be ignored is used. The time difference between each synthesized synchronizing signal and each FG signal generated immediately thereafter is represented by t2m (m = 1, 2,
.. M), and in the same manner as above, each synchronous deviation is obtained to determine the operation amount. As is clear from the figure, the sampling frequency becomes about M times.

Next, FIG. 3 shows a specific circuit configuration for realizing the processing of the second embodiment. COUNT in FIG.
Is a counter that counts up the number of CLK signals (clock signals) from when the RSTSTT signal is turned on until the STP signal is turned on, and outputs the count result, as shown in FIG. COMP is a comparator that outputs ON only when the signal (plural) input to A and the signal (plural) input to B match as shown in FIG. ADD is an adder that adds an input and outputs the result.
MUL is a multiplier for calculating the product of the inputs, and CHANG is an output switch.

In FIG. 3, B1, B2, B3,...
Bm is a unit that outputs a synchronization deviation for each of the M synthesized synchronization signals. In the case of the first embodiment, Bm is composed of only B1. Each unit has the same configuration, and only the unit B1 will be described below.

The counter 1 has a clock signal C between the reference signals.
LK is counted and output. Comparator 3
When the output of the counter 1 becomes the same as the value set in the first setting device 11, a synthesized synchronizing signal is output. The count number corresponding to the time until is set. The counter 4 counts the number of clocks from the generation of the composite synchronization signal to the generation of the next FG signal. The counter 6 counts the number k of the FG signal. The number M of FG signals is set in the second setting unit 12. The adder 7 outputs (M−k). In the third setting unit 13, a value obtained by dividing the number of clock signals at time b between reference signals by the number M of FG signals, that is, b / M is set.

The multiplier 8 calculates and outputs the product of the output value of the adder 7 and the set value of the third setter 13, that is, (M−k) · b / M. In the fourth setting unit 14, a target time difference t0 from the reference signal to the target FG signal is set.
The adder 9 adds the output values of the counter 4, the multiplier 8, and the fourth setting unit 14, and according to the target synchronizing signal (1)
Outputs the synchronous deviation of the calculation result of the expression. Then, the synchronous deviation output of each unit B1, B2,... Bm is switched at each timing by the output switch 2, and the control motor is driven and controlled in accordance with the synchronous deviation output, thereby synchronizing with the reference motor. And rotate.

In the above embodiment, the time difference between the reference signal or the combined synchronizing signal and the FG signal immediately after the reference signal or the combined synchronizing signal is detected. It is also possible to detect a time difference and control based on the time difference.

[0022]

According to the present invention, instead of using the time difference between the reference signal and the PG signal as described above, the time difference between the reference signal and the FG signal immediately after, immediately before, or closest to the PG signal is used. Even when the reference signal and the PG signal are shifted due to uneven rotation of the motor, accurate synchronization can be achieved when the reference signal is detected.

Further, a composite synchronization signal obtained by equally dividing the reference signals by the number of FG signals is used.
By estimating the time difference from the immediately preceding or nearest FG signal and determining the operation amount of the control motor based on the estimated time difference, the number of times of sampling can be made a multiple of the number of FG signals, and the phase control system Can increase the gain,
Even when the time difference between the reference signal and the PG signal is changed, it is possible to settle quickly.

[Brief description of the drawings]

FIG. 1 is an operation timing chart of a phase control device according to a first embodiment of the present invention.

FIG. 2 is an operation timing chart of a phase control device according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a phase control device according to a second embodiment of the present invention.

FIG. 4 is an explanatory diagram of a counter in the embodiment.

FIG. 5 is an explanatory diagram of a comparator in the embodiment.

FIG. 6 is an operation timing chart of a conventional phase control device.

[Explanation of symbols]

 Reference Signs List 1 counter 3 comparator 4 counter 6 counter 7 adder 8 multiplier 9 adder 11 first setting device 12 second setting device 13 third setting device 14 fourth setting device

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H02P 5/52

Claims (4)

(57) [Claims] 1. A reference motor for generating a reference signal once or several times during one rotation, a control motor for rotating in synchronization with the reference motor, and a PG signal generated only once during one rotation of the control motor And PG during one rotation of the control motor.
Means for generating an FG signal generated a plurality of times with reference to the signal, means for detecting the time difference between the reference signal and the FG signal immediately after the signal, and means for detecting when the reference motor and the control motor are rotating in synchronization. Synchronous FG signal detecting means for detecting an FG signal to be controlled with a predetermined time difference as a synchronous FG signal, and a reference signal and a synchronous FG signal based on the detected time difference and a time difference between the FG signal immediately after the reference signal and the synchronous FG signal. Time difference calculating means for calculating the time difference between the reference time and the true time difference which is obtained by removing the time difference that should be present when the reference motor and the control motor are rotating synchronously from the calculated time difference, based on the true time difference. A phase control device, wherein a rotation speed of a control motor is controlled. 2. A reference motor for generating a reference signal once or several times during one rotation, a control motor for rotating in synchronization with the reference motor, and a PG signal generated only once during one rotation of the control motor. And PG during one rotation of the control motor.
Means for generating an FG signal that is generated a plurality of times based on the signal, and generating the same number of synthesized synchronization signals as the FG signal by equally dividing the number of the FG signal between the reference signal and the immediately preceding reference signal Synthetic synchronizing signal generating means, detecting means for detecting a time difference between each of the synchronizing signals and the FG signal generated immediately after the synchronizing signal, Synchronous FG signal detecting means for detecting an FG signal to be controlled as a synchronous FG signal; adding a time difference estimated from the relationship between the FG signal immediately after the synthesized synchronous signal and the synchronous FG signal to the detected time difference; And a true time difference detecting means for detecting a true time difference by subtracting a time difference between a reference signal to be controlled and a synchronous FG signal when the motor is rotating synchronously, and controlling the control motor based on the true time difference. Phase controlling apparatus is characterized in that so as to control the rotational speed. 3. The method according to claim 1, wherein when the time for rotating the reference motor by one rotation is known, the time for rotating the synthesized synchronous signal by one rotation is F.
3. The phase control device according to claim 2, wherein the signal is generated by equally dividing the number of the G signals. 4. The time difference detecting means, in place of the time difference between the reference signal or the combined synchronization signal and the FG signal immediately after the reference signal or the combined synchronization signal, an FG signal immediately before the reference signal or the combined synchronization signal or an FG signal closest to the signal. 4. The phase control device according to claim 1, wherein a time difference is used.