JP2788546B2 - Servo motor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a servomotor device, and is useful when applied to a case where error calculations of motor rotation speed control and rotation phase control cannot be processed in parallel.

<Prior art> Conventionally, in a phase control of a motor for relatively rotating a video head and a recording medium for recording a video signal, such as a VTR or a video floppy disk, a vertical synchronization signal of the video signal is used as a reference signal phase of a phase system. And the PG signal representing the phase of one rotation of the motor is used as the comparison signal phase to perform the phase comparison.

However, in the motor phase control of the electronic still camera,
A fast start-up of the motor is required from the function of a camera. However, if control is performed by comparing the phase of the vertical synchronizing signal and the PG signal, the phase comparison operation is 60 Hz for the NTSC signal.

Therefore, a high-speed signal is generated by the synchronization signal generator (SSG) of the imaging system of the electronic still camera as the reference phase,
By using the FG signal representing the rotation speed of the motor as the comparison phase signal and performing the phase comparison operation at a higher frequency than in the case of the PG signal, the phase pull-in is completed in a short time. However, in this state, the vertical sync signal and PG
Since the phase with the signal does not match, that is, the mechanical phase of the recording medium and the position of the vertical synchronizing signal do not have a predetermined relationship on the magnetic pattern. Usually, after the motor is servo-locked, only the SSG video synchronization signal is reset, and the phase of the PG signal and the leading edge of the vertical synchronization signal is adjusted to 7H (H is a horizontal scanning period).

With this technique, phase pull-in is completed in a few hundred milliseconds. Accordingly, the time required for recording an object as an electronic still camera is reduced, and even if the release switch of the camera is pressed quickly, inconvenience such as missing a photo opportunity is reduced.

However, in the electronic still camera system, the time until the recording is actually enabled is the time until the PG signal and the vertical synchronization signal are stably and reliably synchronized. Most of the time is the time until the motor is servo-locked before resetting the SSG. Therefore, it is further desired that the servo lock be performed quickly and without variation.

Here, there are several servo lock determination methods serving as a reference for resetting the SSG.

A method of detecting a phase error (voltage) and determining that servo lock has been performed when the phase error has reached a predetermined value.

A method of estimating that servo lock has been performed when a certain period of time has elapsed since the motor was started, without specially performing servo lock determination.

However, in the method (1), although there is a certainty that the lock has been completed, there is a problem that the variation in the time until the servo lock is essentially obtained as it is.

On the other hand, in the method (1), there is no variation in the time until it is determined that the servo is locked.However, it is necessary to take into account various variations until the lock is actually achieved and a margin for not directly detecting the servo lock. Because of this, there is a problem that the time until SSG reset has to be considerably long.

In other words, in either method, it is only necessary to make the variation in the time until the servo lock is fixed and to pull in in a short time. However, in order to pull in in a short time, the phase system band of the servo is usually widened. That is, the f (frequency) characteristics must be improved.

However, if the f-characteristic of the servo is expanded, it also responds to noise or disturbance inside the system, so that the f-characteristic cannot be broadened unnecessarily. In particular, if the f-characteristic is set so as not to respond to the "encoder FG error" that occurs once per motor rotation, the step response time is determined by the f-characteristic. Can not. Therefore, there is a problem that the variation in the time until locking finally becomes maximum.

<Related Technology> Therefore, the inventor of the present invention has been engaged in the research and development of a stable motor servo device that responds quickly even when the motor is started or when the reference speed is changed, has a short time until the motor is servo-locked, and has no variation every time. Efforts were made to file a patent application filed on December 1, 1999, stating, "A loop is provided outside the phase control loop including the motor speed control, and the difference between the first input reference phase and the output phase of the motor rotation is detected. Means for shifting the first input reference phase in accordance with the detected amount; providing the output of this phase shift means as an input to a phase control loop as a second input reference phase; With
The motor servo device or the switch means that sets the shift amount of the phase shift means only at the moment when the motor rotation speed approaches the steady speed from the unsteady speed, or the switch means is turned on when the motor rotation speed is the unsteady speed, and A motor servo device that turns off when the speed is within the speed "has already been proposed.

FIG. 4 shows a phase control loop, and FIG. 5 shows an equivalent circuit thereof. FIG. 6 shows a motor servo device provided with an outer loop and a switch, 201 is a first reference phase (reference pulse), 202 is a phase control loop, 203 is a motor rotation output phase, 204 is an outer loop, and 205 is Adder, 206 is a phase shift circuit, 207 is a second input reference phase, 208 is a switch, 20
9 is a motor servo device.

In the above-described motor servo device 209, the first input reference phase 201, which is the target of the phase system of the motor, is set to have the same phase as the motor rotation output phase that the speed system reaches near steady-state rotation and the phase system retracts. , The second input reference phase 207 is set. Accordingly, the target set value of the phase control loop 202 is reduced, so that the time until phase pull-in is shortened, and the pull-in time is stable without variation every time the motor is started.

<Problem to be Solved by the Invention> The first input reference phase 201 to the second input reference phase 207 are set to shorten the time until servo lock,
If the motor servo device for eliminating the variation is to be realized by software processing of a microprocessor, a microcomputer or the like (hereinafter, referred to as a microcomputer), there are the following problems.

That is, if the motor servo device is configured using analog or logic hardware, in the case of a phase system, even if the reference phase signal (pulse) and the comparison phase signal (pulse) are input almost simultaneously, the respective signals are parallelized. Since the processing is performed, an output proportional to the phase difference can be obtained immediately.

However, if this is to be processed by the microcomputer, it depends on the operation method and architecture of the microcomputer itself, but basically only series (serial) processing can be performed. Arithmetic processing is performed, but any of (i) a processing system that does not allow multiple interrupts and (ii) a processing system that allows multiple interrupts has disadvantages. This will be described with reference to FIGS. 7 to 9.

(I) In the case of a processing system that does not allow multiple interrupts: Since the input timings of the reference phase signal and the FG signal as the comparison phase signal are undefined, the microcomputer is interrupted by the reference phase signal as shown in FIG. If the FG signal is input while the phase error calculation is being performed, the phase error calculation is terminated, and then the speed error calculation is performed using the FG signal.
Time a1 is the time from the input of the reference phase signal to the output of the phase error data, and time b1 is the time from the input of the FG signal to the output of the speed error data.

Conversely, as shown in FIG. 7B, if the reference phase signal is input while the speed error calculation is being performed by the interruption by the FG signal, the microcomputer ends the speed error calculation and then performs the phase error calculation. a'1 is the time until the phase error data is output, b'1 is the time until the speed error data is output, and a'1> a1 and b1>b'1.

Therefore, there is a disadvantage that the output timing of the error data is delayed depending on the input order of the reference phase signal and the FG signal, and the fluctuation thereof is large. In particular, in a general servo motor, since the locked reference phase signal and the FG signal are generated with jitter near the phase difference of zero, the output timing of the speed error data fluctuates greatly like b1 and b'1. , The servo performance is significantly impaired.

(Ii) In the case of a processing system permitting multiple interrupts: As shown in FIG. 8 (a), when the FG signal is input while the phase error calculation is being performed in the interrupt processing using the reference phase signal,
The microcomputer temporarily suspends the phase error calculation process, starts an interrupt process by the FG signal, performs a speed error calculation, and after completing the speed error calculation, restarts the phase error calculation. a2 is the time until the phase error data is output, and b2 is the time until the speed error data is output.

Conversely, as shown in FIG. 8B, if the reference phase signal is input while the speed error calculation is being performed by the interrupt processing using the FG signal, the microcomputer temporarily suspends the speed error calculation and performs the interrupt processing using the reference phase signal. Is started and the phase error calculation is performed. After this is completed, the speed error calculation is restarted. a '
2 is the time to output the phase error data, b'2 is the time to output the speed error data, and a2> a '
2, b'2> b2.

Therefore, as in the case of the processing system (i), the output timing of the error data is delayed due to the input order of the reference phase signal and the FG signal, and the fluctuation thereof is large, and the servo with jitter near the zero phase difference is generated. Servo performance in the locked state is impaired. In addition, there is a disadvantage that it is necessary to secure a data memory (RAM) for saving a program address and data necessary for restarting the interrupt processing.

Also, in any of the processing systems (i) and (ii), when the phase error calculation is performed in the interrupt processing by the reference phase signal, the FG signal input immediately before the input of the reference phase signal is generally used. , A phase error is calculated from the input time difference from the reference phase signal. Therefore, as shown in FIG. 9, when an interrupt process is performed by the nth reference phase signal, the FG signal is generated between the nth reference phase signal and the (n−1) th reference phase signal immediately before the nth reference phase signal. If not, the phase error calculation will be performed using the input time data of the FG signal generated before the input time point of the (n-1) th reference phase signal, and the phase relationship will not be correct.

As a result, when the same input time data of the FG signal must be used for the interrupt processing by the n-th reference phase signal and the interrupt processing by the (n-1) -th reference phase signal, the (n-1) -th reference phase signal If it is calculated that the phase is slightly advanced in the phase error calculation by
In the phase error calculation using the second reference phase signal, the calculation result indicates that the phase is significantly delayed by 360 degrees (one cycle) or more, and phase error data having a large value is output. Performing phase control using this phase error data is as follows:
This is an operation of pulling the phase into the immediately preceding (n-1) th reference phase signal. Since the number of phase comparisons is substantially reduced and the gain of the phase system is reduced, it takes time to pull in the phase. Fast phase pull-in cannot be realized.

In order to eliminate such a defect, it is only necessary to determine whether the vehicle is delayed by 360 ° or more. However, the processing time required for this determination increases, and the memory (RO
Another disadvantage is that M) is additionally required.

As shown in FIG. 9, the case where no FG signal is generated between two adjacent reference phase signals is caused not only when the rotation speed of the motor is slower than the set value, such as when the motor is started or when disturbance is applied. Even in a normal servo lock state, there is a case where no FG signal is generated between the reference phase signals because of jitter.

The present invention solves the above-mentioned drawbacks, and responds quickly even when the motor is controlled by software using a microcomputer or the like when the motor is started or when the reference speed is changed, and the time until the servo lock of the motor is activated ( Lock time)
The present invention is to provide a servomotor device which is short and stable without any variation in lock time every time.

<Means for Solving the Problems> The configuration of the servomotor device according to the present invention is as follows. The central processing unit processes the detection of the rotational speed error and the detection of the rotational phase error in series based on the interrupt signal, and obtains the obtained rotational speed. A servo motor device that controls the motor based on the error and the rotation phase error; a means for setting a target rotation speed of the motor; a rotation speed detection means for detecting a rotation speed of the motor and outputting a rotation speed signal; A rotation speed error detection unit that operates by using the rotation speed signal as an interrupt signal, detects an error between the target rotation speed and the detected rotation speed, and sets the rotation speed error as the rotation speed error, a synchronization signal generation unit that generates a synchronization signal, Based on the synchronization signal, the first rotation phase is set as the target rotation phase of the motor.
A reference rotation phase generating means for generating a reference phase signal of the following, a rotation phase detection means for detecting a rotation phase of the motor and outputting a rotation phase signal, and a rotation speed of the motor near the target rotation speed based on the rotation speed error. A stationary speed detecting means for determining whether or not the rotational speed is within a stationary speed range; a first reference phase signal and a rotational phase signal of the motor when the rotational speed of the motor reaches a stationary speed range near a target rotational speed; Is detected and compared with the minimum phase amount. If the detected phase difference is equal to or greater than the minimum phase amount, the phase difference is stored as an initial phase. An initial phase detection and memory means for storing a phase amount as an initial phase; and a phase shift of the phase of the first reference phase signal by the initial phase stored in the initial phase detection and memory means, and a second reference phase signal is obtained. A reference phase shifter, a rotation phase error detector that detects a phase error between a rotation phase signal of the motor and the second reference phase signal and sets the rotation phase error as the rotation phase error, Detecting the advance and leakage of the rotation phase of the motor with respect to the second reference phase signal from the phase difference corresponding to the half cycle of the rotation phase of the motor, and adding a sign indicating the phase advance or delay to the data of the rotation phase error. Sign adding means; stationary phase detecting means for determining whether or not the rotational phase of the motor is within a steady phase range near the target rotational phase based on the rotational phase error; and a rotational phase of the motor near the target rotational phase. A reset means is provided for resetting the synchronizing signal generation means with a rotation phase signal of the motor detected by the rotation phase detection means when the rotation phase reaches the stationary phase range.

In this case, if necessary, the initial phase detection and memory means and the rotation phase error detection means may replace the rotation phase signal detected by the rotation phase detection means with the rotation speed signal detected by the rotation speed detection means. The signal is input as a signal to perform the predetermined processing.

<Operation> In the present invention, the larger of the phase difference between the first reference phase signal and the rotational phase signal when the speed is within the steady speed range and the minimum phase amount by the initial phase detection and memory means. Is stored as an initial phase, and the first reference phase signal is phase-shifted by the initial phase by the reference phase shifting means to obtain a second reference phase signal, and the phase of the second reference phase signal and the rotational phase signal is The error is detected by the rotation phase error detecting means. Thus, when the rotation phase control is started, the phase difference between the first reference phase signal and the rotation phase signal only fluctuates near the initial phase, and the rotation phase signal always advances from the reference phase signal according to the initial phase. Or, only by always delaying, the rotational phase signal does not randomly advance or delay from the reference phase signal near the phase difference of zero unlike the related art.
That is, the input order of the rotation phase signal and the reference phase signal does not change and is always constant.

Therefore, even when the central processing unit cannot detect the rotational speed error and the rotational phase error in parallel because the rotational speed error and the rotational phase error cannot be detected in parallel based on the interrupt signal, the error calculation of the rotational speed control and the rotational phase control cannot be performed in parallel. Even when the target rotation speed is changed, the phase comparison can be performed with the correct phase relationship, the servo lock time from the start of the phase pull-in to the completion of the phase pull-in is reduced, and the servo lock time does not vary every time and becomes stable.

When the phase falls within the steady phase range, the synchronous signal generating means is reset to set the rotation phase of the motor at the completion of the phase pull-in to a predetermined value.

Further, by adding a sign to indicate the advance or delay of the phase, the rotational phase difference with respect to the second reference phase signal can be represented within a range of ± 180 °, and the amount of phase control is reduced.

When the initial phase detection and memory means and the rotation phase error detection means use the rotation speed signal of the motor as the rotation phase signal, the phase comparison operation is performed at a high frequency.

<Embodiment> FIG. 1 shows an embodiment in which the present invention is applied to an electronic still camera, which will be described below.

In FIG. 1, a flexible magnetic disk (VF;
A video floppy 2 is chucked by the spindle of the motor 1 and rotates. At the time of recording, a signal obtained from the imaging device 6 is signal-processed by the recording / reproducing circuit 5 to supply a recording current to the video head 3 so that a magnetic 2 is recorded with a video signal. At the time of reproduction, the video head 3 reproduces the magnetic disk 2 rotated by the motor 1, and the recording / reproduction circuit 5 performs signal processing to output a video signal.

Circuits 8, 9, 10, and 1 in a portion 22 surrounded by a chain line in FIG.
1, 12, 13, 14, 15 and 16 are constituted by microprocessors. Among these circuits, the system control circuit 8 includes a recording / reproducing circuit 5 and an imaging circuit 6, a reference rotation speed generation circuit 9, a rotation speed error detection circuit 10, and a steady speed detection circuit 1.
1, initial phase detection and memory circuit 12, reference phase shift circuit 1
3. Control the rotational phase error detection circuit 14, the fixed bias circuit 15, and the stationary phase detection circuit 16.

 First, the speed system will be described.

The reference rotation speed generation circuit 9 is for setting a target rotation speed of the motor 1, and provides the target rotation speed output B to a rotation speed error detection circuit 10.

The rotation speed error detection circuit 10 includes a rotation speed signal (FG signal) C obtained from a rotation speed detection frequency generator FG attached to the motor 1 and a target rotation speed output B set by the reference rotation speed generation circuit 9. Then, the error of the motor rotation speed with respect to the target rotation speed is detected, and the rotation speed error signal D is supplied to the steady speed detection circuit 11 and the rise compensation and phase compensation and MIX (mixing) circuit 18, respectively.

The steady speed detection circuit 11 is a circuit that determines whether or not the current motor speed is within a steady speed range near the target speed based on the speed error signal D. 8 and also switch 20
As a control signal.

The switch 20 outputs one of the rotation phase error signal H output from the rotation phase error detection circuit 14 and the fixed bias signal I (the center value of the operation range of the phase comparison in this embodiment) output from the fixed bias circuit 15. Is selected in accordance with the judgment output E of the steady-state speed detection circuit 11 and given to the phase compensation circuit 17. That is, the fixed bias signal I is selected when the content of the judgment output E is “out of the steady speed range”, and the rotational phase error signal H is selected when the content is “in the steady speed range”. Now, assuming that the motor is moving, the switch 21 is turned on and a command to start the motor is issued.
The switch 20 selects the fixed bias signal I, and thereafter approaches the target rotation speed, so that it becomes “within the steady speed range”, and the switch 20 selects the rotation phase error signal H.

Next, the phase system will be described. Here, in the present embodiment, the rotation speed signal C from the FG of the motor 1 is used as the rotation phase signal. The second reference phase signal G obtained by shifting the first reference phase signal A is used as the target rotation phase for the rotation phase number C.

First, the reference rotation phase generation circuit 7 receives a clock of a synchronization signal generator (SSG) included in the imaging circuit 6,
This clock is divided to obtain a first reference phase signal A of the phase system.
Is generated and supplied to the reference phase shift circuit 13 and the initial phase detection and memory circuit 12, respectively.

The reference phase shift circuit 13 converts the phase of the first reference phase signal A into a phase difference output F from the initial phase detection and memory circuit 12.
, Ie, a phase shift circuit that offsets only by the initial phase set in the circuit 12. The signal G shifted in phase by the reference phase shift circuit 13 is the second reference phase signal, and is supplied to the rotation phase error detection circuit 14.

Initial phase detection and memory circuit 12, steady speed detection circuit 11
When the determination output E becomes "within the steady speed range", the phase difference between the first reference phase signal A and the rotation speed signal C from the FG of the motor 1 is detected in response to a command from the system control circuit 8. , And this is stored as the initial phase. However, when the phase difference is less than the minimum phase amount, the minimum phase amount is stored as the initial phase.

The rotation phase error detection circuit 14 detects a phase difference between the second reference phase signal G and the rotation speed signal C from the FG of the motor 1, and generates a rotation phase error signal H therefrom to generate a switch 20.
To the stationary phase detection circuit 16.

However, as for the detection of the phase difference in the rotation phase error detection circuit 14, the phase difference is detected when the rotation speed signal C of the motor 1 is inputted after storing the phase in the second reference phase signal G. Further, since the rotation speed signal C is used as the rotation phase signal, the phase error is detected with respect to the second reference phase signal G after the detection of the rotation speed error. Further, in detecting the phase error, in order to reduce the amount of phase control and speed up the phase pull-in, the rotation phase error detection circuit 14 calculates so that the phase difference is apparently within the range of ± 180 °, and calculates the phase error. A sign is added to the data No. 1 to indicate the advance and delay of the phase.

The rotation phase error signal H is supplied to the phase compensation circuit 17 through the switch 20 when the determination output E of the steady speed detection circuit 11 is “within the steady speed range”.

 The phase compensation circuit 17 is a phase compensation filter.

The rise compensation and phase compensation and MIX circuit 18 includes a speed error signal D from the rotational speed error detection circuit 10 and a phase compensation circuit.
The output K of the signal 17 is signal-processed and supplied to the motor drive circuit 19. The motor drive circuit 19 supplies a current to the motor 1 by the output L of the circuit 18 to rotate the motor.

The stationary phase detection circuit 16 receives the rotational phase error signal H, detects whether the motor 1 is rotating within a stationary phase range close to the target rotational phase, and outputs a result J to the system control circuit 8. . That is, when within the steady phase range, the servo lock signal j indicating that the phase lock-in is completed is output to the system control circuit 8.

In response to the servo lock signal J, the system control circuit 8 resets the SSG of the imaging device 6 with PG4 that detects one rotation, and adjusts the rotation phase of the magnetic disk 2 and the phase of the video signal to a predetermined phase difference.

Next, with reference to FIG. 2, the flow of operation as a microprocessor in the dashed line portion 22 in FIG. 1 will be described.

In FIG. 2, steps 121 to 124 are processing of the speed system, and the speed system operates by interruption of the rotation speed signal C from the FG of the motor 1. First, at step 122, the input time of the rotational speed signal C interrupted is stored. Next, in step 123, as the rotation speed error detection, the rotation speed of the motor is obtained from the cycle calculation result of the rotation speed signal C, and the target rotation speed B is subtracted therefrom to obtain the speed error D. Then, in step 124, the speed error D of the calculation result is output.

If the first reference phase signal A is interrupted during the speed-related processing in steps 121 to 124, only the recording processing of the time data when the reference phase signal A is input is performed, and the speed error D is reduced with a minimum time delay. Output.

After the processing of the motor speed system, that is, the calculation of the rotation speed error detection is completed, the process proceeds to the calculation processing of the rotation phase error after step 125 to perform the motor phase system processing.

First, at step 126, it is determined whether the motor speed system is locked. If the motor speed system is not locked,
That is, the output E of the steady speed detecting circuit 11 is "out of the steady speed range".
, The process proceeds to step 146, where any phase error is regarded as zero, and the fixed bias signal I, which is the center value of the operation range set in the fixed bias circuit 15, is used as a phase error signal through the switch 20 for phase compensation. The signal is output to the circuit 17, and the process goes to step 142 to end the interrupt processing and wait for the next FG interrupt.

If it is determined in step 126 that the motor speed system is locked, that is, if the output E of the steady speed detection circuit 11 indicates “within the steady speed range”, the flow proceeds to step 127 and the reference rotation phase generation circuit 7 It is determined whether the first reference phase signal A has been input. If the first reference phase signal A has not been input, the process proceeds to step 146, in which the phase error is regarded as zero, and the fixed bias signal I, which is the center value of the operating range, is output as the phase error signal. The interrupt processing ends.

If the first reference phase signal A has been input in step 127, the process proceeds to step 128 to calculate the phase difference ε between the first reference phase signal A and the motor rotation speed signal C from the input time of each signal. Then, in step 129, it is determined whether or not the initial phase a has been set in the initial phase detection and memory circuit 12, and if not set, the process proceeds to step 143.
If set, go to step 130.

In step 143, the minimum phase amount b of the initial phase offset phase amount is compared with the phase difference ε calculated in step 128. If the minimum phase amount b is larger, the process proceeds to step 144, and the initial phase is set as a = b. If the phase difference ε is larger, the process proceeds to step 145, and the initial phase is set as a = ε. Proceed to. In either case,
In step 146, the phase error is regarded as zero, and the fixed bias signal I, which is the center value of the operation range, is output as the phase error signal, and the interrupt processing ends.

If it is determined in step 129 that the initial phase a has already been set, then in step 130, a calculation (α = ε−a) of phase error detection is performed. That is, a value obtained by subtracting the initial phase a from the phase difference ε calculated in step 128 is set as a phase error α. This is because the second reference phase signal G and the rotation speed signal C
Corresponding to the phase difference.

Next, in step 131, it is determined whether or not a borrow has been generated in the calculation of α = ε−a. If no borrow has been generated, the calculation result (the phase error α) in step 130 is adopted and step 1 is performed.
Proceed to 34. If there is a borrow, the inverse calculation α = a−ε in step 132, that is, the value obtained by subtracting the phase difference ε from the initial phase a is obtained as the phase error α, and this indicates that the calculation has been inverted. After setting the sign flag in step 133, the process proceeds to step 134. By this sign flag,
It can be considered that the phase of the motor rotation speed signal C has advanced.

In step 134, it is determined whether or not the phase error α calculated in step 130 or 132 exceeds 180 °. If the phase error α does not exceed 180 ° (180 ≧ α), the process proceeds to step 137. If the phase error α exceeds 180 °, proceed to step 135, set a sign flag to indicate that the phase error α has exceeded ± 180 °, and then in step 136, when the phase is shifted by 360 ° The above phase error α is subtracted from the above phase error value, and the result of the subtraction is set as a new phase error α, and the routine proceeds to step 137.

In step 137, it is determined whether or not the sign flag of step 133 or 135 is set. If the sign flag is set, it is determined that the motor rotation speed signal C is ahead of the second reference phase signal G. In step 138, the phase error α is subtracted from the center value of the operation range. If the sign flag is not set, it is considered that the motor rotation speed signal C is behind the second reference phase signal G, and in step 139, the phase error α is added to the center value of the operation range.

Thereafter, in step 140, the result of the subtraction in step 138 or the result of the addition in step 139 is output as the final phase error amount. Next, the sign flag is cleared in step 141, and the interrupt processing is terminated in step 142. I do.

By repeating such processing of the speed system and the phase system,
When the phase is pulled, a servo lock signal J is output.

Here, introduction of the sign flag will be described with reference to FIG. In FIG. 3, the input time of the first reference phase signal A is T _ref , and the input time of the motor rotation phase signal C is T
_{If fg} , the phase difference ε is given by ε = T _fg −T _ref ... On the other hand, consider the phase difference ε ′ given by the following equation (2).

ε ′ = ε−360 ° = T _fg −T _ref −360 ° Equation (2) The relationship between ε and ε ′ has a difference in phase advance / delay, but apparently the first reference phase signal A Are in the same phase relationship. Therefore, in the example shown in FIG. 3, detecting the phase difference by the calculation of the equation (2) makes the phase pull-in faster than performing the calculation of the equation (1) having a large phase control amount.

Generally, in the case of the operation flow of FIG.
4, the phase difference 1 corresponding to a half cycle of the motor rotation speed signal C
80 ° is compared with the phase difference α calculated in step 130 or 132. If α ≦ 180 °, leave it as is, if α> 180 °, α
= 360 ゜ −α, that is, the operation of the above equation (2) is adopted. Thus, the phase difference α falls within ± 180 °. However, in step 135, a sign flag is set to clarify that the calculation is performed by the equation (2).

Since the magnitude difference between the phase difference α and 180 ° is determined by the amount of α, it can be determined only by the processing of the comparison operation. Therefore, since a normal microcomputer has a comparison operation instruction, it can be determined if there is only one instruction, and the number of operation instructions is smaller and processing is faster than in the conventional determination as to whether or not the phase is delayed by 360 °. The reason is that if the signal is as shown in Fig. 9 in the past, it is necessary to compare and control the input FG signal with the previous one.
Further, since there is a phase relationship with the reference phase signal, it cannot be controlled only by comparison.

<Effects of the Invention> According to the present invention, the initial phase detection and memory means determine the difference between the phase difference between the first reference phase signal and the rotation phase signal when the speed is within the steady speed range, and the minimum phase amount. The larger one is stored as the initial phase, and the reference phase shift means shifts the phase of the first reference phase signal by the initial phase to form a second reference phase signal. The second reference phase signal and the rotational phase signal The rotation phase error detection means detects the phase error between the first reference phase signal and the rotation phase signal. When the rotation phase control starts, the phase difference between the first reference phase signal and the rotation phase signal only fluctuates near the initial phase. Accordingly, the rotational phase signal always leads or lags the reference phase signal. That is, unlike the related art, the rotational phase signal does not randomly advance or lag the reference phase signal near the phase difference of zero.

Therefore, even if the error calculation of the rotation speed control and the rotation phase control cannot be performed in parallel because the central processing unit processes the detection of the rotation speed error and the detection of the rotation phase error in series based on the interrupt signal, Since the input order with the reference phase signal does not change and is always constant, the phase comparison can be performed with the correct phase relationship even when the motor is started or the target rotation speed is changed. And the servo lock time is stable without any variation in the servo lock time.

In the present invention, the sign adding means adds a sign indicating the advance or delay of the phase to the data of the rotational phase error, so that an arithmetic expression with a small phase control amount can be used for detecting the rotational phase error. , Which leads to a faster phase pull-in.

Further, by resetting the synchronizing signal generating means when the phase falls within the steady phase range, the rotation phase of the motor at the completion of the phase pull-in can be set to a predetermined value.

On the other hand, in the case of the invention in which the initial phase detection and memory means and the rotation phase error detection means use the rotation speed signal of the motor as the rotation phase signal, the phase comparison operation can be performed at a high frequency.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment in which the present invention is applied to an electronic still camera, FIG. 2 is a flowchart of processing by a microprocessor, FIG.
FIG. 5, FIG. 5 and FIG. 6 are explanatory views of the related art of the present invention, and FIG. 7, FIG. 8 and FIG. In the drawing, FG is a frequency generator that outputs a motor rotation speed signal, 1 is a motor, 4 is a PG, 6 is an imaging device, 7 is a reference rotation phase generator, 8 is a system control circuit, and 9 is a reference rotation speed generation circuit. , 10 is a rotation speed error detection circuit, 11 is a steady speed detection circuit, 12 is an initial phase detection and memory circuit, 13 is a reference phase shift circuit, 14 is a rotation phase error detection circuit, 16 is a steady phase detection circuit, 22 is It is a microprocessor.

Continuation of the front page (56) References JP-A-63-208106 (JP, A) JP-A-1-264587 (JP, A) JP-A-2-65685 (JP, A) JP-A-2-79788 (JP) , A) JP-A-2-237487 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H02P 5/00-5/52 G11B 19/28

Claims (2)

(57) [Claims] 1. A servo motor, wherein a rotation speed error detection and a rotation phase error detection are processed in series by a central processing unit based on an interrupt signal, and a motor is controlled based on the obtained rotation speed error and rotation phase error. Means for setting a target rotation speed of the motor, rotation speed detection means for detecting a rotation speed of the motor and outputting a rotation speed signal, and operating with the rotation speed signal of the motor as an interrupt signal, A rotational speed error detecting means for detecting an error between the detected rotational speed and the rotational speed error, a synchronous signal generating means for generating a synchronous signal, and a first rotational target motor phase based on the synchronous signal.
A reference rotation phase generating means for generating a reference phase signal of the following, a rotation phase detection means for detecting a rotation phase of the motor and outputting a rotation phase signal, and a rotation speed of the motor near the target rotation speed based on the rotation speed error. A stationary speed detecting means for determining whether or not the rotational speed is within a stationary speed range; a first reference phase signal and a rotational phase signal of the motor when the rotational speed of the motor reaches a stationary speed range near a target rotational speed; Is detected and compared with the minimum phase amount. If the detected phase difference is equal to or greater than the minimum phase amount, the phase difference is stored as an initial phase. An initial phase detection and memory means for storing a phase amount as an initial phase; and a phase shift of the phase of the first reference phase signal by the initial phase stored in the initial phase detection and memory means, and a second reference phase signal is obtained. Reference phase shifting means, a rotation phase error detection means for detecting a phase error between the rotation phase signal of the motor and the second reference phase signal and obtaining the rotation phase error, Detecting the lead and lag of the rotational phase of the motor with respect to the second reference phase signal from the phase difference corresponding to the half cycle of the rotational phase of the motor, and adding a sign indicating the advance or lag of the phase to the data of the rotational phase error. A sign adding means; a stationary phase detecting means for determining whether or not the rotational phase of the motor is within a stationary phase range near the target rotational phase based on the rotational phase error; and a rotational phase of the motor near the target rotational phase. A servo motor comprising reset means for resetting a synchronizing signal generating means with a rotation phase signal of the motor detected by the rotation phase detection means when the rotation phase reaches the stationary phase range. Location. 2. The method according to claim 1, wherein the initial phase detecting and memory means and the rotational phase error detecting means replace the rotational phase signal detected by the rotational phase detecting means with the rotational speed detected by the rotational speed detecting means. A servo motor device, which is means for inputting a speed signal as a rotation phase signal and performing the predetermined processing.