JP3338334B2 - Amplifier circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, an audio amplifier, and more particularly, to an amplifier circuit which obtains high current efficiency by push-pull amplification of an input signal.

[0002]

2. Description of the Related Art FIG. 8 shows a circuit applied to an output stage of a conventional audio amplifier described in Japanese Patent Application Laid-Open No. 4-111507. 8, an input signal A is supplied to an input terminal 71 via a capacitor C2, and an input signal / A having a phase opposite to that of the input signal A is supplied to an input terminal 72 via a capacitor C3. The input terminal of the driving circuit A1 is connected to the input terminal 71, and the input terminal of the driving circuit A2 is connected to the input terminal 72. The output terminal of the driving circuit A1 is connected to a transistor Q11 which forms a current mirror circuit.
And the bases of the transistors Q11 and Q13. The collector of the transistor Q13 is connected to the power supply terminal 73, and the emitter is connected to the output terminal 74 together with the emitter of the transistor Q11. Drive circuit A2
Is connected to the collector of the transistor Q12 and the bases of the transistors Q12 and Q14 forming the current mirror circuit. Transistor Q14 has a collector connected to output terminal 74, and an emitter connected to transistor Q12.
It is connected to the ground terminal 75 together with the emitter. FIG.
Operates as a push-pull amplifier. That is, when a load RL is connected to the output terminal 74 of this circuit, the circuit generates a current obtained by multiplying the output current of the drive circuits A1 and A2 by a current ratio (mirror ratio) set in the current mirror circuit. Supply.

In the circuit shown in FIG. 8, a driving circuit A1
And a transistor Q11, Q13, a first amplifier circuit for amplifying the positive half wave of the input signal, a drive circuit A2, and transistors Q12, Q14,
The configurations of the second amplifier circuits for amplifying the negative half wave of the input signal are equal. For this reason, the circuit shown in FIG. 8 has a small distortion factor.

The driving circuits A1 and A2 output an idling current even when there is no signal, and an idling current that is a mirror ratio of the current value flows through the transistors Q13 and Q14. Therefore, this circuit has a small crossover distortion.

However, in the circuit configuration shown in FIG.
To obtain a high amplification factor, it is necessary to increase the mirror ratio. If the mirror ratio is increased, the idling current flowing through the transistors Q13 and Q14 when there is no signal increases, and a problem occurs that the current consumption increases.

FIG. 9 shows a class B push-pull amplifier disclosed in Japanese Patent Application Laid-Open No. 8-2009. In this circuit, when the input terminals 71 and 72 have no signal, the transistors Q8 and Q10 are turned on, the emitter current paths of the diode-connected transistors Q7 and Q9 are turned on, and the transistors Q7, Q8, Q11 and the transistor Q7 are turned on.
9, Q10 and Q12 each constitute a current mirror circuit. For this reason, the output idling current is twice the mirror ratio of the bias current when there is no signal.

On the other hand, when an input signal is applied to the input terminals 71 and 72, the transistors Q8 and Q10 are turned off alternately according to the polarity of the input signal. As a result, the emitter current paths of the transistors Q7 and Q9 are turned off alternately. Therefore, when the transistor Q7 or Q9 is off, the collector current of the transistor Q5 or Q3 is all supplied to the base of the transistor Q11 or Q12. Therefore, the current output from the output terminal has a value corresponding to the current amplification factor β of the transistor Q11 or Q12.

[0008]

However, in the circuit shown in FIG. 9, when the input terminals 71 and 72 have no signal, the transistors Q8 and Q10 are on, and these transistors Q8 and Q10 have VCE (SAT). ) (Collector-emitter saturation voltage) has occurred. This VCE (SAT)
Transistors Q7, Q9 and transistors Q11, Q12
Causes an error in the idling current according to the emitter area ratio. Moreover, VCE (S) of the transistors Q8 and Q10
Since it is difficult to control the value of AT) at the time of manufacturing, the idling current tends to vary.

In this circuit, when the current amplification is maximized, the transistors Q3 and Q4 or the transistor Q3
5, Q6 becomes inactive. Moreover, the transistor Q
8, Q10 is saturated during operation. Therefore, when the operation of each transistor switches, the operation is delayed, and ringing is likely to occur.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to reduce idling current variation without increasing idling current and to have high current efficiency. An object of the present invention is to provide an amplifier circuit capable of preventing oscillation and performing a stable operation.

[0011]

According to the present invention, there is provided a first emitter follower having an emitter connected to an output terminal, a collector connected to a power supply terminal, and a signal current supplied to a base. A transistor, an emitter is grounded, a collector is connected to the output terminal, a signal current is supplied to a base, a second transistor which forms a push-pull amplifier together with the first transistor, and a signal is supplied to a first input terminal. A first driving circuit that outputs an idling current from the first output terminal when the first output terminal is connected to the base of the first transistor and the first input terminal is non-signal, A second input terminal is supplied with an inverted signal of a signal supplied to the first input terminal, and a second output terminal is connected to a base of the second transistor. , A second input terminal at the time of no signal,
A second drive circuit that outputs an idling signal from an output terminal, and is connected between a base and an emitter of the first transistor and is responsive to a constant current supplied from a first constant current source.
A third transistor that operates, and allows a large amount of idling current output from the first output terminal to flow when the signal is absent to reduce the idling current flowing to the base of the first transistor; A first control circuit for controlling a base-emitter voltage of the first transistor according to the input signal when an input signal is supplied to the first input terminal; and a base-emitter of the second transistor. Supplied from a second constant current source
A fourth transistor that operates according to the constant current
In addition, the idling current output from the second output terminal at the time of the non-signal is made to flow to reduce the idling current flowing to the base of the second transistor, and the input signal is supplied to the second input terminal. A second control circuit for controlling the base-emitter voltage of the second transistor in response to the input signal.

A first transistor of an emitter follower having an emitter connected to the output terminal, a collector connected to the power supply terminal and a signal current supplied to the base, an emitter grounded, and a collector connected to the output terminal And
A signal current is supplied to a base, a second transistor forming a push-pull amplifier together with the first transistor, and a first resistor provided between a collector and a base;
A third transistor having a first constant current source connected to the base, a fourth transistor having a second resistor provided between the collector and the base, and having a second constant current source connected to the base; The first transistor is connected between the base of the first transistor and the collector of the third transistor, and the collector potential of the third transistor is used as a bias power supply between the base and the emitter of the first transistor. A third resistor applied to the base, connected between the base of the second transistor and the collector of the fourth transistor, and connecting the collector potential of the fourth transistor to the base / emitter of the second transistor And a fourth resistor applied to the base of the second transistor as a bias power supply between them.

Further, when an input signal is supplied to the base and the collector is connected to the power supply terminal, the emitter is connected to the output terminal, and when the collector is connected to the output terminal, the emitter is grounded. Transistors and
A second transistor having an emitter connected to the emitter of the first transistor; a first resistor connected between a base and a collector of the second transistor; a base connected to the base of the first transistor; A second resistor provided between the collectors of the first and second transistors, and a first resistor connected between the base of the second transistor and the power supply terminal.
And a constant current source.

Further, when an input signal is supplied to the base and the collector is connected to the power supply terminal, the emitter is connected to the output terminal, and when the collector is connected to the output terminal, the emitter is grounded. A transistor, a second transistor having an emitter connected to the emitter of the first transistor, and a first transistor having an anode connected to the base of the second transistor and a cathode connected to the collector of the second transistor. A second diode having an anode connected to the base of the first transistor and a cathode connected to the collector of the second transistor; and a second diode connected between the base of the second transistor and the power supply terminal. And a constant current source connected to the

[0015]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of the present invention.
In the conventional example, the above-described problem occurs because the amplifier circuit at the output stage is configured by a current mirror circuit having a fixed amplification factor. Therefore, in this embodiment, the current amplification factor of the amplifier circuit is changed according to the amplitude of the input signal.

In FIG. 1, an input signal A is supplied to an input terminal 11 via a capacitor C2, and an input signal / A having a phase opposite to that of the input signal A is supplied to an input terminal 12 via a capacitor C3. The input terminal 11 is a driving circuit A1
Is connected to the input terminal of The output terminal of the drive circuit A1 is
Connected to the collector of transistor Q1 via resistor R3 and to the base of transistor Q3. One end of the constant current source I1 is connected to the power supply terminal 13, and the other end of the constant current source I1 is connected to the base of the transistor Q1 and to the collector of the transistor Q1 via the resistor R1. The collector of the transistor Q3 is connected to the power supply terminal 13, and the emitter of the transistor Q3 is connected to the output terminal 14 together with the emitter of the transistor Q1.
Connected to.

The input terminal 12 is connected to an input terminal of the driving circuit A2. The output terminal of the driving circuit A2 is connected to a resistor R4
, Is connected to the collector of the transistor Q2 and to the base of the transistor Q4. One end of the constant current source I2 is connected to the power supply terminal 13, and the other end of the constant current source I2 is connected to the base of the transistor Q2 and to the collector of the transistor Q2 via the resistor R2. The collector of the transistor Q4 is connected to the output terminal 14, and the emitter of the transistor Q4 is connected to the ground terminal 15 together with the emitter of the transistor Q2. Power is supplied to the drive circuits A1 and A2 from the power supply terminal 13.

The operation of the circuit shown in FIG. 1 will be described below. First, when the input terminal 11 has no signal, the driving circuit A1 outputs the idling current I3. The base-emitter voltages of the transistors Q1 and Q3 are
Assuming that BEQ1 and VBEQ3, VBEQ3 = VBEQ1 + (− R1 · I1 + R3 · I
3) Here, in order to prevent crossover distortion from occurring, VBEQ3 is set, for example, to a value in the vicinity of the rise of the emitter current in accordance with VBEQ3. Therefore, most of I3 flows through the resistor R3, and the transistor Q3
Hardly flows to the base. By setting the ratio of I1 to I3 or the ratio of R1 to R3 and setting the ratio of the emitter area of transistor Q1 to the area of transistor Q3, that is, the current mirror ratio, for example, the emitter current of transistor Q3, ie, the idling current I5 is set. can do.

For example, I1: I3 = 1: N1, R1: R
3 = N1: 1 and the emitter area of the transistor Q1 is:
Assuming that the emitter area of the transistor Q3 = 1: N2,
The idling current I5 is expressed by the following equation.

I5 = N2 · (1 / N1 + 1) · I3 = N2 · (N1 + 1) · I1 Here, N1 is an arbitrary number of 1 or more, for example, “2”, N2 is an arbitrary number of 1 or more, For example, “4”.

As described above, the idling current I5 when there is no signal is a current amplified according to the current mirror ratio. Therefore, by appropriately selecting the resistance values of the resistors R1 and R3, the current value I1 of the constant current source, and the current mirror ratio, it is possible to set the idling current I5 such that the crossover distortion is reduced.

Transistors Q2 and Q4, resistors R2 and R
4. Regarding the amplifier circuit composed of the constant current source I2, if the output current of the drive circuit A2 when there is no signal is I4 and the collector current of the transistor Q4, that is, the idling current is I6, I6 is set in the same manner as I5. be able to. In this case, since the emitter current of transistor Q1 flows through the collector of transistor Q4, it is necessary to increase the emitter area of transistor Q4 so that the current can be absorbed.

Next, the signal A is supplied to the input terminal 11,
A case where the signal / A having the opposite phase to the signal A is supplied to the input terminal 12 will be described. The change currents of the drive circuits A1 and A2 with respect to the output current when there is no signal are ΔIS1,
ΔIS2. Further, the amounts of change in the output currents of the transistors Q3 and Q4 with respect to the load RL at this time are ΔI5 and ΔI6, respectively.

In the region where the input signal A has a relatively small amplitude, Δ
Most of the IS1 flows through the resistor R3, and the VBEQ3 increases by a voltage drop R3 · ΔIS1 at the resistor R3. Therefore, ΔI5 increases exponentially with respect to ΔIS1. The same applies to ΔIS2 and ΔI6.

When the amplitude of the input signal A further increases, ΔI5 increases exponentially with respect to VBEQ3. Therefore, even if ΔI5 increases, VBEQ3 hardly increases. VBEQ3 hardly changes and V
BEQ3 = VBEQ1- (voltage drop at resistor R1)
Since + (voltage drop at the resistor R3) is established, the increment of ΔIS1 hardly flows to the resistor R3. Therefore, ΔIS1 flows through the base of the transistor Q3, and when the current gain of the transistor Q3 is β, ΔI5 gradually approaches β · ΔIS1.
The same can be said for ΔIS2 and ΔI6.

As described above, in the present embodiment, the amplification factor of the amplifier circuit can be set separately for no signal and for large amplitude. Therefore, by setting the mirror ratio smaller than the current gain β of the output transistors Q3 and Q4, large power can be supplied to the load without increasing the idling current. Further, since the mirror ratio can be reduced, the area of the output transistors Q3 and Q4 can be reduced, and the chip area can be reduced.

In addition, in the case of this circuit, the current setting when there is no signal depends on the ratio between the resistors R1 and R3 (the ratio between the resistors R2 and R4) and the emitter area ratio between the transistors Q1 and Q3 (the emitter area ratio between the transistors Q2 and Q4). ), The variation in idling current can be reduced. In addition, when the transistor of one of the circuits that amplifies current is in the operating state, the transistor of the circuit on the opposite phase to this does not turn off. Therefore, unlike the conventional circuit, there is no delay in the operation of each transistor, and stable operation can be performed without oscillation.

FIG. 2 is a modification of the embodiment of the present invention shown in FIG. This shows an example of the circuits of the drive circuits A1 and A2 and the constant current sources I1 and I2 in the embodiment shown in FIG. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals.

In FIG. 2, an input terminal 11 is connected to one end of a resistor R7 and the base of a transistor Q9.
7 has the other end connected to one end of the resistor R5, the collector of the transistor Q5, and the base of the transistor Q7. Resistance R5
Is connected to the base of the transistor Q5, and the collector of the transistor Q5 is connected to the ground terminal 15 via the constant current source I7. The transistors Q5, Q7, Q9
Are connected to the power supply terminal 13. The collector of the transistor Q7 is the output terminal of the constant current source I1 in the embodiment shown in FIG. 1, and is connected to one end of the resistor R1 and the base of the transistor Q1. Also, the transistor Q
A collector 9 is an output terminal of the driving circuit A1.

The input terminal 12 to which the inverted signal is supplied is connected to one end of the resistor R8 and the base of the transistor Q10, and the other end of the resistor R8 is connected to one end of the resistor R6 and the transistor Q10.
6 is connected to the base of the transistor Q8. The other end of the resistor R6 is connected to the base of the transistor Q6, and the collector of the transistor Q6 is connected to the ground terminal 15 via the constant current source I8. The transistor Q
The emitters of 6, Q8 and Q10 are connected to the power supply terminal 13. The collector of the transistor Q8 is the output terminal of the constant current source I2 in the embodiment shown in FIG. 1, and is connected to the base of the transistor Q2 and to the collector of the transistor Q2 via the resistor R2. The collector of the transistor Q10 is the output terminal of the drive circuit A2.

The operation of the circuit shown in FIG. 2 is the same as that of FIG. FIG. 3 shows a second embodiment of the present invention. In this embodiment, the resistors R1, R2, R3, and R4 of the circuit shown in FIG. 1 are replaced with diodes D1, D2, D3, and D4, respectively.

In the circuit shown in FIG.
The anode of the transistor D1 is connected to the output terminal of the constant current source I1 and the base of the transistor Q1, and the cathode of the diode D1 is connected to the collector of the transistor Q1. The anode of the diode D3 is connected to the output terminal of the driving circuit A1, and the cathode is connected to the collector of the transistor Q1. The anode of the diode D2 is connected to the output terminal of the constant current source I2 and the base of the transistor Q2, and the cathode of the diode D2 is connected to the collector of the transistor Q2. The anode of the diode D4 is connected to the output terminal of the drive circuit A2, and the cathode is connected to the collector of the transistor Q2.

In this circuit, the diodes D1, D3
Are VFD1 and VFD3, respectively, when the input terminal 11 has no signal, the base-emitter of the transistor Q3 is biased with a voltage of VBEQ1-VFD1 + VFD3. Therefore, similarly to the embodiment shown in FIG. 1, the ratio of I1 to I3, the ratio of the element area of the diode D1 to the element area of the diode D3, and the transistor Q
1 and the emitter area of the transistor Q3, the desired idling current I5
Can be obtained.

The input terminal 11 has a small amplitude input signal A.
Is supplied, the output current of the drive circuit A1 when there is no signal increases by ΔIS1. This current increase ΔI
S1 flows to the diode D3 and the base of the transistor Q3 to increase VFD3 and VBEQ3 simultaneously. In this case, the current flowing through the diode D3 is prevented from reaching the base of the transistor Q1 by the diode D1. Therefore, unlike the first embodiment, the output current of the driving circuit A1 flows to the base of the transistor Q1 via the resistors R3 and R1, and the base current does not increase. Therefore, the base current of transistor Q1 hardly increases, and as a result, the current flowing through diode D3 does not increase much. For this reason, compared to the case of the circuit shown in FIG.
When the amplitude of IS1 is small, most of ΔIS1 flows to the base of transistor Q3.

Further, when the amplitude of the input signal A increases, the increase in VBEQ3 is suppressed as in the embodiment shown in FIG. 1, so that the current gain of the transistor Q3 becomes β
Then, I5 becomes close to β · ΔIS1.

The same holds for the amplifier circuit composed of the transistors Q2 and Q4, the diodes D2 and D4, and the constant current source I2. Also according to the second embodiment, it is possible to increase the current amplification factor of the input signal without increasing the idling current as in the first embodiment.

FIG. 4 shows a third embodiment of the present invention in which the circuit shown in FIG. 2 is modified. A class A amplifier is constituted by using only one side of the push-pull circuit shown in FIG. . 4, the same parts as those in FIG. 2 are denoted by the same reference numerals, and only different parts will be described.

In FIG. 4, a resistor R9 is connected between the emitters of the transistors Q1 and Q3 and the ground terminal 15. According to this embodiment, the same effect as that of the first embodiment can be obtained.

Further, in this circuit, the input terminal 11
When there is no signal, the current set by the transistors Q1, Q2, Q4, Q5 and the resistors R1 and R2 and the resistance value of the resistor R9 are adjusted to output the signal from the output terminal 14 corresponding to the signal to the input terminal 11 from the output terminal 14. The potential at the midpoint of the signal to be generated (voltage at the center of the amplitude) can be set arbitrarily. In the case of this embodiment, the midpoint potential can be set to (Vcc-VF) / 2. Here, Vcc is a power supply voltage, and VF is a forward voltage of the transistor Q3.

FIG. 5 shows a fourth embodiment of the present invention which is a modification of FIG. 4, and the same parts as those in FIG. In FIG. 5, the emitters of the transistors Q1 and Q3 are connected to the ground terminal 15, and the collector of the transistor Q3 is connected to the output terminal 14. A resistor R1 is connected between the collector of the transistor Q3 and the power supply terminal 13.
0 is connected. According to this embodiment, effects similar to those of the third embodiment can be obtained. In the case of this embodiment, the midpoint potential can be set to Vcc / 2.

FIG. 6 shows a fifth embodiment of the present invention obtained by modifying FIG. 4, and FIG. 7 shows a sixth embodiment of the present invention obtained by modifying FIG. 6 and 7, the same parts as those in FIGS. 4 and 5 are denoted by the same reference numerals.

6 and 7, the resistors R1 and R3 shown in FIGS. 4 and 5 are replaced by diodes D1 and D3, respectively. According to the fifth and sixth embodiments, the third and fourth
The same effect as that of the embodiment can be obtained. Moreover, the use of the diode has an advantage that the degree of integration can be improved as compared with the case where the resistor is used. Of course, various modifications can be made without departing from the spirit of the present invention.

[0043]

As described in detail above, according to the present invention, when the input signal is no signal, the output currents of the first and second drive circuits are amplified by the current mirror ratio, and the input signal is When the amplitude is large, the current is amplified by the current gain β of the first and second transistors. Therefore, a sufficient current can be output while reducing the idling current. Further, since the area of the first and second transistors can be reduced, the chip area can be reduced when this circuit is integrated.

Further, the variation in the idling current can be reduced without increasing the idling current.
The current use efficiency can be improved. Further, in the push-pull amplifier circuit of the present invention, when amplifying the inverted signal, the circuit for amplifying the non-inverted signal is not stopped, so that a delay in operation when amplifying the non-inverted signal can be prevented. For this reason, stable operation is possible by preventing oscillation.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram specifically showing a first embodiment of the present invention.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram showing a fifth embodiment of the present invention.

FIG. 7 is a circuit diagram showing a sixth embodiment of the present invention.

FIG. 8 is a circuit diagram showing a conventional example.

FIG. 9 is a circuit diagram showing another conventional example.

[Explanation of symbols]

 A: input signal, / A: inverted input signal, A1, A2: drive circuit, I1, I2: constant current source, Q1, Q2, Q3, Q4: transistor, R1, R2, R3, R4: resistor, D1, D2 , D3, D4 ... diode, RL ... load.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03F 3/30

Claims (17)

(57) [Claims] 1. A first transistor of an emitter follower having an emitter connected to an output terminal, a collector connected to a power supply terminal and a signal current supplied to a base, an emitter grounded, and a collector connected to the output terminal. A signal current is supplied to the base, a second transistor forming a push-pull amplifier together with the first transistor, a signal is supplied to a first input terminal, and a first output terminal is connected to the first transistor. A first drive circuit connected to the base of the first input terminal and outputting an idling current from the first output terminal when the first input terminal has no signal; supplying a second input terminal to the first input terminal The second output terminal is connected to the base of the second transistor, and when the second input terminal has no signal, the output terminal outputs an inverted signal. The second that outputs the dring signal
And a drive circuit connected between the base and the emitter of the first transistor and operated in response to a constant current supplied from a first constant current source.
A third transistor that operates, and allows a large amount of idling current output from the first output terminal to flow when there is no signal to reduce the idling current flowing to the base of the first transistor; When an input signal is supplied to the input terminal of the first transistor, the first transistor controls the base-emitter voltage of the first transistor in accordance with the input signal.
And a control circuit connected between the base and the emitter of the second transistor and operated in accordance with a constant current supplied from a second constant current source.
A fourth transistor that operates, and allows a large amount of idling current output from the second output terminal to flow when the signal is absent to reduce the idling current flowing to the base of the second transistor; When an input signal is supplied to the input terminal of the second transistor, a second transistor for controlling a base-emitter voltage of the second transistor in accordance with the input signal.
And a control circuit. 2. The first control circuit according to claim 1, wherein a first resistor is provided between the collector and the base, and the first resistor is connected to the base.
Wherein said third transistor first constant current source is connected, it is connected between the collector of base and the third transistor of the first transistor, the collector potential of the third transistor 2. The amplifier circuit according to claim 1, further comprising: a second resistor applied to a base of said first transistor as a bias power supply between a base and an emitter of said first transistor. 3. The second control circuit according to claim 1, wherein a third resistor is provided between the collector and the base, and
Wherein said fourth transistor second constant current source is connected, it is connected between the collector of the base and the fourth transistor of the second transistor, the collector potential of the fourth transistor 2. The amplifier circuit according to claim 1, further comprising: a fourth resistor applied to a base of the second transistor as a bias power supply between a base and an emitter of the second transistor. 4. The device according to claim 2, wherein a ratio of an emitter area of said first transistor to an emitter area of said third transistor is smaller than a grounded emitter current amplification factor of said first transistor. Amplifier circuit. 5. The circuit according to claim 3, wherein a ratio of an emitter area of the second transistor to an emitter area of the fourth transistor is smaller than a grounded emitter current amplification factor of the second transistor. Amplifier circuit. Wherein said first control circuit includes a first diode is connected between the collector and the base, and the third transistor, wherein the first constant current source is connected to the base, the first A collector potential of the third transistor is connected between a base of the transistor and a collector of the third transistor, and a collector potential of the third transistor is applied to a base of the first transistor as a bias power between a base and an emitter of the first transistor. 2. The amplifier circuit according to claim 1, further comprising a second diode that performs the operation. Wherein said second control circuit, the third diode is provided between the collector and the base, and the second of said fourth constant current source is connected to the transistor base, the second A collector potential of the fourth transistor is connected between a base of the transistor and a collector of the fourth transistor, and a collector potential of the fourth transistor is applied to a base of the second transistor as a bias power between a base and an emitter of the second transistor. The amplifier circuit according to claim 1, further comprising a fourth diode. 8. A first transistor of an emitter follower having an emitter connected to the output terminal, a collector connected to the power supply terminal, and a signal current supplied to the base, an emitter grounded, and a collector connected to the output terminal. A signal current is supplied to the base, a second transistor forming a push-pull amplifier together with the first transistor, a first resistor is provided between the collector and the base, and a first constant current source is provided at the base. A third transistor connected to the second transistor, a second resistor provided between a collector and a base, and a second constant current source connected to the base; a base of the first transistor; And the collector potential of the third transistor is connected between the base and the emitter of the first transistor. A third resistor applied as a bias power source to the base of the first transistor; a third resistor connected between the base of the second transistor and the collector of the fourth transistor; and a collector potential of the fourth transistor. An amplifier circuit comprising: a fourth resistor applied to a base of the second transistor as a bias power supply between a base and an emitter of the second transistor. 9. A ratio of an emitter area of the first transistor to an emitter area of the third transistor is smaller than a grounded emitter current amplification factor of the first transistor, and a ratio of an emitter area of the second transistor to an emitter area of the second transistor. 9. The amplifier circuit according to claim 8, wherein an emitter area ratio of the fourth transistor is smaller than a common emitter current amplification factor of the second transistor. 10. A signal is supplied to a first input terminal, a first output terminal is connected to a base of the first transistor, and the first input terminal has no signal. A first drive circuit that outputs an idling current from an output terminal; an inverted signal of a signal supplied to the first input terminal is supplied to a second input terminal; and a second output terminal is the second transistor. 9. The amplifier circuit according to claim 8, further comprising: a second drive circuit connected to the base of said second input terminal and outputting an idling signal from said output terminal when said second input terminal has no signal. 11. A first transistor having an input signal supplied to a base, a power supply voltage supplied to a collector, an emitter connected to the output terminal of the first transistor, and a second transistor connected to the emitter of the first transistor. A second diode, a first diode having an anode connected to the base of the second transistor, a cathode connected to the collector of the second transistor, and an anode connected to the base of the first transistor; A second diode having a cathode connected to the collector of the second transistor; a first constant current source connected between the base of the second transistor and a power supply voltage; and an input signal supplied to the base; A third transistor having a collector connected to the output terminal and an emitter grounded, and an emitter connected to the third transistor; A fourth transistor connected to the emitter of the fourth transistor, a third diode having an anode connected to the base of the fourth transistor, a cathode connected to the collector of the fourth transistor, and an anode connected to the third transistor. A fourth diode having a cathode connected to the collector of the fourth transistor, and a second constant current source provided between the base of the fourth transistor and a power supply voltage. An amplifier circuit, comprising: 12. A ratio of an emitter area of the first transistor to an emitter area of the second transistor is smaller than a grounded emitter current amplification factor of the first transistor, and is smaller than an emitter area of the third transistor. The amplifier circuit according to claim 11, wherein the ratio of the emitter area of the fourth transistor is smaller than the common emitter current amplification factor of the third transistor. 13. A first drive circuit, wherein a signal is supplied to an input terminal, an output terminal is connected to a base of the first transistor, and the input terminal outputs an idling current from the output terminal when there is no signal, A second driving circuit that supplies a signal to the terminal, the output terminal is connected to the base of the third transistor, and the input terminal outputs an idling current from the output terminal when there is no signal. The amplifier circuit according to claim 8, wherein 14. An input signal is supplied to a base, an emitter is connected to the output terminal when a collector is connected to a power supply terminal, and an emitter is grounded when a collector is connected to the output terminal. A second transistor having an emitter connected to the emitter of the first transistor; a first resistor connected between a base and a collector of the second transistor; a base of the first transistor And a second resistor provided between the collector of the second transistor and a first constant current source connected between the base of the second transistor and the power supply terminal. Amplifier circuit. 15. An input signal is supplied to a base, an emitter is connected to an output terminal when a collector is connected to a power supply terminal, and an emitter is grounded when a collector is connected to the output terminal. A second transistor having an emitter connected to the emitter of the first transistor; a first transistor having an anode connected to the base of the second transistor and a cathode connected to the collector of the second transistor; A second diode having an anode connected to the base of the first transistor and a cathode connected to the collector of the second transistor; and a diode between the base of the second transistor and the power supply terminal. And a constant current source connected to the amplifier circuit. 16. When the collector of the first transistor is connected to a power supply terminal, the first transistor is connected between the output terminal and ground. When the collector is connected to the output terminal, the output terminal and the power supply terminal are connected. 16. The system according to claim 14, further comprising a second constant current source connected between the two.
The amplifier circuit according to any one of the above. 17. The semiconductor device according to claim 14, wherein a ratio of an emitter area of said first transistor to an emitter area of said second transistor is smaller than a grounded emitter current amplification factor of said first transistor. The amplifier circuit according to any one of the above.