JP3324124B2 - Ashing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to relates to a single wafer ashing method which is particularly suitable for resist removal of the injection of a high dose ion.

[0002]

2. Description of the Related Art In recent years, with the enlargement of the diameter of a semiconductor substrate, a single-wafer type ashing apparatus having good controllability has come to be used in many cases.

As a conventional ashing device, a configuration as shown in FIG. 2 is generally used. Hereinafter, the configuration will be described with reference to FIG.

As shown in the figure, a processing system 1 made of quartz forms a vacuum system with a support plate 2 made of aluminum and a first electrode 3. The second electrode 4 is electrically grounded,
On the other hand, a high frequency is applied to the third electrode 5 by a high-frequency power supply 6 and a matching network 7, and the oxygen flowing from the gas inlet 8 is converted into plasma by the second electrode 4 and the third electrode 5 on the semiconductor substrate 9. Was removed. Normal ashing conditions are as follows: oxygen flow rate = 100 cc / m
in, high frequency power = 400 W, pressure = 400 mTorr
r, and the lower electrode 3 was kept at 150 ° C. by a heater to further increase the ashing speed.

[0005]

In such a conventional device, the plasma generation region is located at a position distant from the semiconductor substrate 9 and is hardly damaged by charge-up.
A highly reliable semiconductor can be manufactured. However, in a semiconductor substrate after high-dose (1 × 10 ¹⁴ cm ⁻² or more) ion implantation, the surface of the resist has a thickness of about 500 to 2000 °
Due to the formation of a hardened layer with a low ashing rate at the thickness of, the hardened layer cracks when exposed to plasma,
Scattered and adhered to the reaction chamber, or the semiconductor substrate 9
Attached on top, resist cannot be sufficiently removed.

An object of the present invention is to solve the above-mentioned problems, and an object of the present invention is to provide an ashing method capable of removing a resist which is difficult to remove by the above-described plasma.

[0007]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention removes a cured layer on the surface of a resist by applying a high frequency to an electrode holding a semiconductor substrate to generate plasma. Ashing is performed by generating plasma at a position distant from the semiconductor substrate.

[0008]

According to the present invention, the cured layer on the surface of the resist after the ion implantation is removed by using the ion sputtering, and the remaining resist is removed by plasma generated at a position separated from the semiconductor substrate. I do. As a result, the cured layer on the resist surface can be sufficiently removed, and the resist does not adhere to the reaction chamber. Further, since the plasma generation region is separated from the semiconductor substrate in a state where the resist remains, the semiconductor device is not damaged by charge-up or the like, so that a stable and highly reliable device can be manufactured.

[0009]

An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, the same parts as those in FIG. 2 of the conventional example are denoted by the same reference numerals, and description thereof will be omitted. That is, a feature of the present invention is that a switch 10 is provided between the first electrode 3 and the ground so that the high-frequency power supply 6 and the matching network 7 can be switched between the first electrode 3 and the third electrode 5 by the switch 11 . A switch 12 is provided between the third electrode 5 and the ground ,
The second electrode is configured to be directly connected to ground . By using such a device, one oxygen gas is supplied from the gas inlet 8.
Flow into the processing chamber at a flow rate of 00 cc / min, and the pressure is 500 m
Torr, first , the third electrode 5 is connected to the ground by the switch 12 , and the switch 11
High frequency power supply 6, matching network 7 as first electrode
After the connection to the first electrode 3, a high frequency of 13.56 MHz is applied to the first electrode 3 at a power of 500 W to generate plasma, and ashing of the hardened layer on the surface of the resist on the semiconductor substrate 9 is performed. At this time, the temperature of the lower first electrode 3 is 100 ° C. In this state, since the resist remains on the semiconductor substrate 9, the damage to the semiconductor substrate 9 was at a level that does not usually cause a problem.

Next, the application of the high frequency to the first electrode 3 is stopped, and the first electrode is connected to the ground by the switch 10.
And high frequency power supply 6 by switch 11
After connecting the switching network 7 to the third electrode 5, the third
A high frequency of 13.56 MHz is applied to the electrode 5 with a power of 500 W. At this time, the first electrode 3 was kept at 150 ° C. to 200 ° C. in order to increase the ashing speed. As a result, the plasma is generated by the second electrode 4 and the third electrode 5, so that the semiconductor substrate 9 is not directly exposed to the plasma, and is less likely to be damaged by plasma. With such a method, the resist could be sufficiently removed even after ion implantation at a high dose of 1 × 10 ¹⁴ cm ⁻² or more.

[0011]

As is clear from the above embodiments, according to the present invention, the high frequency is applied to the electrode holding the semiconductor substrate to generate plasma, thereby removing the cured layer on the surface of the resist. Since the ashing is performed by generating plasma at a position away from the semiconductor substrate,
The resist after ion implantation can be more completely removed.
An ashing method which is effective for removing a resist having a high dose of 10 ¹⁴ cm ^-2 or more and can improve the yield can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic sectional front view of an apparatus for performing an ashing method according to an embodiment of the present invention.

FIG. 2 is a schematic sectional front view of an apparatus for performing a conventional ashing method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Processing chamber 2 Support plate 3 1st electrode 4 2nd electrode 5 3rd electrode 6 High frequency power supply 7 Matching network 8 Gas inlet 9 Semiconductor substrate 10 Switch 11 Switch 12 Switch

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/3065 H01L 21/027

Claims (1)

(57) [Claims] 1. A method for ashing a photoresist having a hardened layer formed on its surface by high-dose ion implantation, comprising: applying high-frequency power to a first electrode holding a semiconductor substrate on which the photoresist is formed; The second electrode and the third electrode, which are located apart from the semiconductor substrate, are connected to the ground to generate a first plasma, and a sputter action by the first plasma is applied to the surface of the photoresist. A first ashing step of removing the formed hardened layer; connecting the first electrode and the second electrode to ground; applying high-frequency power to the third electrode to generate a second plasma; The second, which occurs at a position distant from the semiconductor substrate.
Ashing step of removing a photoresist remaining on the semiconductor substrate by the plasma of the first ashing step and the second ashing step, wherein the first ashing step and the second ashing step use the same ashing apparatus to perform the first ashing step. The ashing method, wherein the second ashing step is performed subsequently to the ashing step.