JP3315057B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP3315057B2 JP3315057B2 JP13017597A JP13017597A JP3315057B2 JP 3315057 B2 JP3315057 B2 JP 3315057B2 JP 13017597 A JP13017597 A JP 13017597A JP 13017597 A JP13017597 A JP 13017597A JP 3315057 B2 JP3315057 B2 JP 3315057B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- sealing
- sealing material
- semiconductor device
- defoaming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Processing And Handling Of Plastics And Other Materials For Molding In General (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、封止処理を含む半
導体装置の製造方法に関し、特に、封止処理の際に封止
材に対して脱泡処理を行なう半導体装置の製造方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device including a sealing process, and more particularly to a method of manufacturing a semiconductor device which performs a defoaming process on a sealing material during the sealing process.
【０００２】[0002]
【従来の技術】たとえば、μＢＧＡ（ｍｉｃｒｏ ｂａ
ｌｌ ｇｒｉｄ ａｒｒａｙ）と呼ばれる半導体装置の
製造では、図５（ａ）に示されるように、導体回路パタ
ーン５１を設けたＴＡＢテープ等のフレキシブル基板５
２上に、半導体チップと前記フレキシブル基板５２の熱
膨張の差異を吸収するエラストマー５３を設け、このエ
ラストマー５３を介して半導体チップ５４を搭載し、前
記導体回路パターン５１と半導体チップ５４をワイヤー
５５で接続する。その後、前記ワイヤー接続箇所に対し
ては、断線や損傷防止等のために、封止材５６によりエ
ンキャップと呼ばれる封止処理が施される。2. Description of the Related Art For example, μBGA (micro ba
In the manufacture of a semiconductor device called an "ll grid array", as shown in FIG. 5A, a flexible substrate 5 such as a TAB tape provided with a conductor circuit pattern 51 is provided.
An elastomer 53 for absorbing a difference in thermal expansion between the semiconductor chip and the flexible substrate 52 is provided on the semiconductor chip 2, a semiconductor chip 54 is mounted via the elastomer 53, and the conductor circuit pattern 51 and the semiconductor chip 54 are connected by wires 55. Connecting. Thereafter, the wire connection portion is subjected to a sealing process called encapsulation by a sealing material 56 in order to prevent disconnection or damage.
【０００３】この封止処理は、ゲル状の封止材５６を塗
布することにより行われるが、この際に空気が混入する
ことは避けられないので、封止材５６が硬化する前に脱
泡処理が施される。[0003] This sealing treatment is performed by applying a gel-like sealing material 56. At this time, since air is inevitably mixed in, the defoaming is performed before the sealing material 56 is cured. Processing is performed.
【０００４】ところが、この脱泡処理で混入空気が抜け
る際に、図５（ｂ）に示されるように、封止材５６の一
部が局部的に膨らんで風船状となり、この風船状の封止
材５６ａが破れて封止材が飛び散り、この飛び散った封
止材５６ｂが半導体チップ５４の表面およびその周辺に
付着することがある。However, when the mixed air escapes in the defoaming process, as shown in FIG. 5B, a part of the sealing material 56 is locally expanded to form a balloon. The sealing material may be scattered when the stopper 56a is broken, and the scattered sealing material 56b may adhere to the surface of the semiconductor chip 54 and the periphery thereof.
【０００５】このように、封止材が周囲に付着すると半
導体チップが汚れてしまい、信頼性を損なったり、外観
を劣化させる原因となる。また、半導体チップの表面に
封止材が付着すると、半導体チップの表面に各種のマー
キングを印刷する際に、印刷がきれいにできないという
問題がある。このため、半導体チップの表面に付着した
封止材を除去する必要がある。[0005] As described above, if the sealing material adheres to the surroundings, the semiconductor chip becomes contaminated, which causes a loss of reliability and a deterioration in appearance. Further, when the sealing material adheres to the surface of the semiconductor chip, there is a problem that when printing various kinds of markings on the surface of the semiconductor chip, the printing cannot be performed clearly. Therefore, it is necessary to remove the sealing material attached to the surface of the semiconductor chip.
【０００６】また従来、この封止材の除去は、こさぎ治
具を使用して人手により削り取られているので、長い時
聞と多大の労力を必要とし、生産性を低下させる大きな
原因となっていた。更に、この削り取り作業の際に、半
導体チップを傷付けるおそれがあるとともに、エラスト
マー５３とフレキシブル基板５２の接着部分に剥離が生
じたり、半導体チップ５４と導体回路パターン５１を接
続しているワイヤー５５が外れたりして半導体装置の不
良の原因となる。Conventionally, since the removal of the sealing material has been manually scraped off using a squirrel jig, it requires a long time and a great deal of labor, and is a major cause of lowering the productivity. I was Further, during the shaving operation, the semiconductor chip may be damaged, the adhesive portion between the elastomer 53 and the flexible substrate 52 may be separated, or the wire 55 connecting the semiconductor chip 54 and the conductive circuit pattern 51 may be disconnected. In some cases, this may cause a failure of the semiconductor device.
【０００７】[0007]
【発明が解決しようとする課題】そこで本発明は、半導
体装置を製造する際の封止材の脱泡処理において、封止
材の飛び散りを減らすとともに、半導体チップへの付着
を無くして生産性を高め、併せて半導体チップを汚すこ
となく、また傷めることなく、信頼性の高い半導体装置
を得ることを目的とする。SUMMARY OF THE INVENTION Therefore, the present invention reduces the scattering of the sealing material in the defoaming treatment of the sealing material when manufacturing the semiconductor device, and eliminates the adhesion to the semiconductor chip to improve the productivity. It is another object to obtain a highly reliable semiconductor device without contaminating and damaging a semiconductor chip.
【０００８】[0008]
【課題を解決するための手段】本発明は、導体回路パタ
ーンを設けた基板上にエラストマーを介して、あるい
は、直接に搭載した半導体チップと前記導体回路パター
ンとをワイヤーで接続し、この接続箇所を封止材で封止
して封止部を形成し、その後に封止部を脱泡処理する工
程を含む半導体装置の製造方法において、前記接続箇所
を封止材で封止後、離型剤を前記半導体チップ及び前記
接続箇所を覆う封止部に塗付し、真空雰囲気下で脱泡処
理することを特徴とする。According to the present invention, a semiconductor chip mounted directly on a substrate on which a conductor circuit pattern is provided via an elastomer or directly is connected to the conductor circuit pattern by a wire, and the connecting portion is provided. In a semiconductor device manufacturing method including a step of forming a sealing portion by sealing the sealing portion with a sealing material, and thereafter defoaming the sealing portion. An agent is applied to a sealing portion covering the semiconductor chip and the connection portion, and degassing is performed in a vacuum atmosphere.
【０００９】また本発明は、導体回路パターンを設けた
基板上にエラストマーを介して、あるいは、直接に搭載
した半導体チップと前記導体回路パターンとをワイヤー
で接続し、この接続箇所を封止材で封止して封止部を形
成し、その後に封止部を脱泡処理する工程を含む半導体
装置の製造方法において、前記接続箇所を封止材で封止
後、離型剤を前記半導体チップの表面に塗付し、真空雰
囲気下で脱泡処理することを特徴とする。Further, according to the present invention, a semiconductor chip mounted directly on a substrate on which a conductive circuit pattern is provided or via an elastomer or is connected to the conductive circuit pattern by a wire, and the connecting portion is sealed with a sealing material. In a method for manufacturing a semiconductor device, the method further includes a step of sealing to form a sealing portion, and then defoaming the sealing portion. And defoaming in a vacuum atmosphere.
【００１０】[0010]
【発明の実施の形態】本発明の半導体装置の製造方法
を、μＢＧＡ半導体装置を製造する場合を例に挙げて説
明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to the present invention will be described with reference to an example of manufacturing a μBGA semiconductor device.
【００１１】図１は、基板部に対してエラストマーを介
して半導体チップを搭載する工程を示す概略断面図であ
る。FIG. 1 is a schematic sectional view showing a step of mounting a semiconductor chip on a substrate portion via an elastomer.
【００１２】基板部１は、絶縁性フィルム２の表面に、
エッチングにより所定のパターンに形成された銅箔３と
金めっき層４からなり、絶縁性フィルム２の所定箇所に
透孔５を形成し、この透孔５の部分に半田ボール６が設
けられる。なお、本明細書においては、パターン化され
た銅箔３と金めっき層４を合わせて導体回路パターンと
称し、この導体回路パターンは絶縁フィルムと積層さ
れ、たとえば、ＴＡＢテープとして供給される。The substrate 1 is provided on the surface of the insulating film 2.
A copper foil 3 and a gold plating layer 4 are formed in a predetermined pattern by etching. A through hole 5 is formed in a predetermined portion of the insulating film 2, and a solder ball 6 is provided in the through hole 5. In the present specification, the patterned copper foil 3 and the gold plating layer 4 are collectively referred to as a conductor circuit pattern, and the conductor circuit pattern is laminated with an insulating film and supplied as, for example, a TAB tape.
【００１３】半導体装置を製造する際には、基板部１の
導体回路パターン側にエラストマー７を介して半導体チ
ップ８を取り付け、この半導体チップ８のボンディング
パッド９と導体回路パターンとを、キャピラリ１０を使
用してワイヤー１１で接続する。図２は、このようにし
て、半導体チップ８と基板部１とを接続した状態の半導
体装置を示す一部切欠斜視図である。When a semiconductor device is manufactured, a semiconductor chip 8 is attached to the conductive circuit pattern side of the substrate portion 1 via an elastomer 7, and a bonding pad 9 and a conductive circuit pattern of the semiconductor chip 8 are connected to a capillary 10. And connected by wire 11. FIG. 2 is a partially cutaway perspective view showing the semiconductor device in a state where the semiconductor chip 8 and the substrate unit 1 are connected in this manner.
【００１４】半導体装置は、図３に示すように、半導体
チップ８と基板部１とのワイヤー接続箇所を、ゲル状に
した、たとえば、シリコン樹脂等の封止材で封止して封
止部１２を形成する。In the semiconductor device, as shown in FIG. 3, a wire connection portion between the semiconductor chip 8 and the substrate 1 is formed in a gel-like shape, for example, by sealing with a sealing material such as silicon resin. 12 is formed.
【００１５】なお、この実施例では、基板部１に半田ボ
ール６を設けた後に、半導体チップ８と基板部１とのワ
イヤー接続箇所を封止するようにしているが、これに限
らず封止した後に半田ボール６を設けるようにしてもよ
い。In this embodiment, after the solder balls 6 are provided on the substrate 1, the wire connection portions between the semiconductor chip 8 and the substrate 1 are sealed, but the present invention is not limited to this. After that, the solder balls 6 may be provided.
【００１６】その後、たとえばフッ素系、シリコン系等
の離型剤を封止部１２および半導体チップ８の表面に塗
付する。Thereafter, a release agent such as a fluorine-based or silicon-based release agent is applied to the surface of the sealing portion 12 and the semiconductor chip 8.
【００１７】次いで、真空雰囲気下で、封止部１２に混
入している空気を脱泡処理する。このとき、封止部１２
に離型剤を塗布し、これがその上面に存在しているの
で、脱泡現象で生じる封止部１２の膨れは小さくなり、
或いは、存在しなくなり、飛び散りが殆どなくなる。こ
の様な効果が得られる理由は、現時点では必ずしも明確
ではないが、離型剤により封止材の表面層部の粘性が低
下し、気泡が大きくなる前に、空気が封止部１２の外部
に抜けてしまうことが、封止部１２の膨れが大きくなら
ないことの理由の一つとして考えられる。また仮に、飛
散した封止剤が半導体チップ８上に付着したとしても、
この半導体チップ上の離型剤に付着するので、付着した
封止剤は、こさぎ落とし、或いは、切削落としのような
外力を加えることなく容易に除去できる。Next, air mixed in the sealing portion 12 is subjected to a defoaming treatment in a vacuum atmosphere. At this time, the sealing portion 12
Since the release agent is applied on the upper surface of the mold, the swelling of the sealing portion 12 caused by the defoaming phenomenon is reduced,
Or, it is not present, and there is almost no scattering. The reason why such an effect is obtained is not always clear at the present time, but before the release agent lowers the viscosity of the surface layer of the sealing material and air bubbles increase before the bubbles become larger, This is considered as one of the reasons that the swelling of the sealing portion 12 does not increase. Also, even if the scattered sealant adheres to the semiconductor chip 8,
Since the sealant adheres to the release agent on the semiconductor chip, the adhered sealant can be easily removed without applying an external force such as scraping or cutting.
【００１８】図４は、本発明の半導体装置の製造方法の
他の例を示す。なお、図１〜図３に示す実施例と対応す
る部材には同一符号を付している。FIG. 4 shows another example of a method of manufacturing a semiconductor device according to the present invention. The members corresponding to those in the embodiment shown in FIGS. 1 to 3 are denoted by the same reference numerals.
【００１９】図４に示す実施例においては、半導体チッ
プ８の周囲を囲むようにマスク１３を配置し、このマス
ク１３を使用し、離型剤を半導体チップ８に塗付する。In the embodiment shown in FIG. 4, a mask 13 is arranged so as to surround the periphery of the semiconductor chip 8, and a release agent is applied to the semiconductor chip 8 using the mask 13.
【００２０】次いで、真空雰囲気下で脱泡処理すると、
封止部１２の封止材からの脱泡現象により封止材の一部
が半導体チップ８の表面に付着することがあるが、半導
体チップ８の表面には離型剤が塗布されているので、こ
の半導体チップ８に付着した封止剤は、前述と同様に外
力を要さず容易に除去でき、生産性が阻害されることが
ない。Next, when defoaming treatment is performed in a vacuum atmosphere,
A part of the sealing material may adhere to the surface of the semiconductor chip 8 due to the defoaming phenomenon of the sealing portion 12 from the sealing material, but since the release agent is applied to the surface of the semiconductor chip 8, As described above, the sealant attached to the semiconductor chip 8 can be easily removed without external force, and the productivity is not hindered.
【００２１】また、半導体チップ８や基板部１を傷める
ことや、エラストマー７と基板部１の接着部に剥離等の
問題が全く生じない。Further, there is no problem such as damage to the semiconductor chip 8 and the substrate 1 and no peeling at the bonded portion between the elastomer 7 and the substrate 1.
【００２２】なお、上述した各実施例においては、基板
と半導体チップの間にエラストマーを介在させたが、基
板と半導体チップを直接接合するようにしてもよい。In each of the above embodiments, the elastomer is interposed between the substrate and the semiconductor chip. However, the substrate and the semiconductor chip may be directly joined.
【００２３】[0023]
【発明の効果】半導体装置を製造する際の封止材の脱泡
処理において、離型剤を封止部に塗付したので以下の効
果を奏する。According to the present invention, in the defoaming treatment of the sealing material at the time of manufacturing the semiconductor device, since the release agent is applied to the sealing portion, the following effects can be obtained.
【００２４】（１）封止材の飛び散りを減らすことがで
きる。(1) The scattering of the sealing material can be reduced.
【００２５】（２）飛散した封止材が半導体チップに付
着しないので、半導体チップを損傷させず、信頼性を維
持することができる、また、外観の汚れを防止すること
ができる。(2) Since the scattered sealing material does not adhere to the semiconductor chip, the semiconductor chip is not damaged, the reliability can be maintained, and the appearance can be prevented from being stained.
【００２６】（３）飛散した封止材が半導体チップに付
着しないので、封止材を除去する手間がかからず、生産
性を飛躍的に高めることができる。(3) Since the scattered encapsulant does not adhere to the semiconductor chip, there is no need to remove the encapsulant, and the productivity can be dramatically improved.
【００２７】（４）飛散した封止材が半導体チップに付
着したとしても、容易に除去することができる。(4) Even if the scattered sealing material adheres to the semiconductor chip, it can be easily removed.
【００２８】（５）飛散した封止材は不要な外力を要す
ることなく除去でき、良品の半導体装置を安定して製造
することができる。(5) The scattered sealing material can be removed without unnecessary external force, and a good semiconductor device can be stably manufactured.
【図１】 基板部に対してエラストマーを介して半導体
チップを搭載する工程を示す概略断面図である。FIG. 1 is a schematic cross-sectional view showing a step of mounting a semiconductor chip on a substrate via an elastomer.
【図２】 半導体チップと基板部とを接続した状態の半
導体装置を示す一部切欠斜視図である。FIG. 2 is a partially cutaway perspective view showing a semiconductor device in a state where a semiconductor chip and a substrate unit are connected.
【図３】 半導体チップと基板部との接続箇所を封止材
で封止した状態を示す部分斜視図である。FIG. 3 is a partial perspective view showing a state where a connection portion between a semiconductor chip and a substrate unit is sealed with a sealing material.
【図４】 本発明の半導体装置の製造方法の他の例を示
す。FIG. 4 shows another example of the method for manufacturing a semiconductor device of the present invention.
【図５】 従来の半導体装置の製造方法の問題点を説明
するための概略断面図である。FIG. 5 is a schematic cross-sectional view for explaining a problem of a conventional method of manufacturing a semiconductor device.
１…基板部、２…絶縁性フィルム、３…銅箔、４…金め
っき層、５…透孔、６…半田ボール、７…エラストマ
ー、８…半導体チップ、９…ボンディングパッド、１０
…キャピラリ、１１…ワイヤー、１２…封止部、１３…
マスクDESCRIPTION OF SYMBOLS 1 ... board part, 2 ... insulating film, 3 ... copper foil, 4 ... gold plating layer, 5 ... through-hole, 6 ... solder ball, 7 ... elastomer, 8 ... semiconductor chip, 9 ... bonding pad, 10
... capillary, 11 ... wire, 12 ... sealing part, 13 ...
mask
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平１−199440（ＪＰ，Ａ) 特開 平６−97230（ＪＰ，Ａ) 特開 平７−45765（ＪＰ，Ａ) 特開 平７−226420（ＪＰ，Ａ) 特開 平７−273246（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/28 B29C 71/00 B29L 31:34 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-199440 (JP, A) JP-A-6-97230 (JP, A) JP-A-7-45765 (JP, A) JP-A-7-45 226420 (JP, A) JP-A-7-273246 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/28 B29C 71/00 B29L 31:34
Claims (3)
ストマーを介して、あるいは、直接に搭載した半導体チ
ップと前記導体回路パターンとをワイヤーで接続し、こ
の接続箇所を封止材で封止して封止部を形成し、その後
に封止部を脱泡処理する工程を含む半導体装置の製造方
法において、 前記接続箇所を封止材で封止後、離型剤を前記半導体チ
ップ及び前記接続箇所を覆う封止部に塗付し、真空雰囲
気下で脱泡処理することを特徴とする半導体装置の製造
方法。1. A semiconductor chip mounted directly on a substrate on which a conductor circuit pattern is provided or through an elastomer or connected to the conductor circuit pattern by a wire, and the connection portion is sealed with a sealing material. Forming a sealing portion by performing a defoaming process on the sealing portion thereafter, after sealing the connection portion with a sealing material, applying a release agent to the semiconductor chip and the connection. A method for manufacturing a semiconductor device, wherein the method is applied to a sealing portion covering a portion and defoaming treatment is performed in a vacuum atmosphere.
ストマーを介して、あるいは、直接に搭載した半導体チ
ップと前記導体回路パターンとをワイヤーで接続し、こ
の接続箇所を封止材で封止して封止部を形成し、その後
に封止部を脱泡処理する工程を含む半導体装置の製造方
法において、 前記接続箇所を封止材で封止後、離型剤を前記半導体チ
ップの表面に塗付し、真空雰囲気下で脱泡処理すること
を特徴とする半導体装置の製造方法。2. A semiconductor chip mounted directly on a substrate on which a conductive circuit pattern is provided or via an elastomer or connected to the conductive circuit pattern by a wire, and the connection portion is sealed with a sealing material. Forming a sealing portion by performing a step of defoaming the sealing portion thereafter, after sealing the connection portion with a sealing material, applying a release agent to the surface of the semiconductor chip. A method for manufacturing a semiconductor device, comprising applying and defoaming in a vacuum atmosphere.
を形成した後、この封止部にマスクを設けて前記半導体
チップに離型剤を塗付し、真空雰囲気下で脱泡処理する
ことを特徴とする請求項２記載の半導体装置の製造方
法。3. A sealing portion is formed by sealing the connection portion with a sealing material. Then, a mask is provided on the sealing portion, a release agent is applied to the semiconductor chip, and the semiconductor chip is placed in a vacuum atmosphere. 3. The method for manufacturing a semiconductor device according to claim 2, wherein a defoaming process is performed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13017597A JP3315057B2 (en) | 1997-05-20 | 1997-05-20 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13017597A JP3315057B2 (en) | 1997-05-20 | 1997-05-20 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10321767A JPH10321767A (en) | 1998-12-04 |
| JP3315057B2 true JP3315057B2 (en) | 2002-08-19 |
Family
ID=15027844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13017597A Expired - Fee Related JP3315057B2 (en) | 1997-05-20 | 1997-05-20 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3315057B2 (en) |
-
1997
- 1997-05-20 JP JP13017597A patent/JP3315057B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10321767A (en) | 1998-12-04 |
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