JP3307234B2 - Ceramic electronic components - Google Patents
Ceramic electronic componentsInfo
- Publication number
- JP3307234B2 JP3307234B2 JP19554796A JP19554796A JP3307234B2 JP 3307234 B2 JP3307234 B2 JP 3307234B2 JP 19554796 A JP19554796 A JP 19554796A JP 19554796 A JP19554796 A JP 19554796A JP 3307234 B2 JP3307234 B2 JP 3307234B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- external electrode
- electronic component
- ceramic element
- shoulder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000919 ceramic Substances 0.000 title claims description 80
- 230000002093 peripheral effect Effects 0.000 claims description 24
- 239000003985 ceramic capacitor Substances 0.000 description 22
- 238000000034 method Methods 0.000 description 11
- 229910000679 solder Inorganic materials 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Capacitors (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、電子部品に関し、
詳しくは、セラミック素子の長手方向両端面を含む両端
側部分に外部電極が配設された構造を有するセラミック
電子部品に関する。TECHNICAL FIELD The present invention relates to an electronic component,
More specifically, the present invention relates to a ceramic electronic component having a structure in which external electrodes are provided at both end portions including both end surfaces in the longitudinal direction of a ceramic element.
【０００２】[0002]
【従来の技術及び発明が解決しようとする課題】表面実
装型のセラミック電子部品の一つに、例えば、図３及び
図４に示すように、セラミック層３１を介して複数の電
極（内部電極）３２が互いに対向するように積層、配設
されたセラミック素子３３の両端部に、内部電極３２と
導通するように外部電極３４が配設された構造を有する
積層セラミックコンデンサ（セラミック電子部品）３５
がある。2. Description of the Related Art As shown in FIGS. 3 and 4, for example, as shown in FIGS. 3 and 4, a plurality of electrodes (internal electrodes) are interposed on a ceramic electronic component of a surface mount type. A multilayer ceramic capacitor (ceramic electronic component) 35 having a structure in which external electrodes 34 are provided so as to be electrically connected to the internal electrodes 32 at both ends of a ceramic element 33 laminated and provided so that the ceramic elements 32 face each other.
There is.
【０００３】そして、電子機器が小型化するにつれて、
このようなセラミック電子部品３５も小型化し、セラミ
ック素子３３の長さ（Ｌ）が１．０mm以下、高さ（Ｈ）
及び幅（Ｗ）が０．５mm以下というようなきわめて小型
のセラミック電子部品が用いられるに至っている。[0003] As electronic devices become smaller,
Such a ceramic electronic component 35 is also miniaturized, and the length (L) of the ceramic element 33 is 1.0 mm or less and the height (H).
Very small ceramic electronic components having a width (W) of 0.5 mm or less have been used.
【０００４】そして、このような小型のセラミック電子
部品３５においては、例えば、セラミック素子３３の長
手方向両端面３３ａから周囲面３３ｃに回り込む部分で
ある肩部（エッジ部）３３ｂが曲率半径５０μm程度の
丸み（Ｒ）が与えられており、さらに、その上に形成さ
れた外部電極３４の肩部３４ｂは曲率半径８０μm程度
の丸み（Ｒ）が与えられている。また、外部電極３４の
セラミック素子３３の端面３３ａに形成された部分３４
ａは、約５０μm程度の厚みｔを有している。In such a small-sized ceramic electronic component 35, for example, a shoulder (edge portion) 33b, which is a portion extending from both longitudinal end surfaces 33a of the ceramic element 33 to the peripheral surface 33c, has a radius of curvature of about 50 μm. The shoulder 34b of the external electrode 34 formed thereon is rounded (R) with a radius of curvature of about 80 μm. Further, a portion 34 formed on the end face 33a of the ceramic element 33 of the external electrode 34
a has a thickness t of about 50 μm.
【０００５】ところで、上記のような小型のセラミック
電子部品３５の場合、例えば、はんだリフローによる実
装工程でセラミック電子部品３５が、図５に示すよう
に、実装基板３６のランド３７上で立ち上がってしまう
ツームストーン現象が発生するという問題点がある。In the case of the above-described small ceramic electronic component 35, for example, the ceramic electronic component 35 rises on the land 37 of the mounting board 36 in a mounting process by solder reflow as shown in FIG. There is a problem that the tombstone phenomenon occurs.
【０００６】このツームストーン現象は、セラミック素
子３３の肩部３３ｂや外部電極３４の肩部３４ｂの丸み
（Ｒ）などの形状的な条件、はんだリフロー工程などの
実装工程の操作条件などに関連して発生するものであ
り、実装の信頼性に大きな影響を与えるものである。The tombstone phenomenon is related to geometrical conditions such as the roundness (R) of the shoulder 33b of the ceramic element 33 and the shoulder 34b of the external electrode 34, and operating conditions of a mounting process such as a solder reflow process. This has a significant effect on the reliability of the implementation.
【０００７】本発明は、上記問題点を解決するものであ
り、実装工程でツームストーン現象の発生しない、実装
信頼性の高い小型のセラミック電子部品を提供すること
を目的とする。An object of the present invention is to solve the above-mentioned problems, and an object of the present invention is to provide a small-sized ceramic electronic component having high mounting reliability and free from tombstone phenomenon in a mounting process.
【０００８】[0008]
【課題を解決するための手段】上記目的を達成するため
に、本発明のセラミック電子部品は、長さ（Ｌ）≦１．
０mm、高さ（Ｈ）≦０．５mm、幅（Ｗ）≦０．５mmのセ
ラミック素子の長手方向両端面を含む両端側部分に外部
電極が配設された構造を有するセラミック電子部品にお
いて、前記セラミック素子の長手方向両端面から周囲面
に回り込む前記外部電極の肩部に曲率半径６０μm以下
の丸み（Ｒ）をつけるとともに、前記外部電極のセラミ
ック素子の端面に形成された部分の略中央部に、その周
辺部との間に５〜３５μmの段差が形成されるような突
出部を設けたことを特徴としている。In order to achieve the above object, a ceramic electronic component according to the present invention has a length (L) ≦ 1.
A ceramic electronic component having a structure in which external electrodes are provided at both end portions including both end surfaces in a longitudinal direction of a ceramic element having a height of 0 mm, a height (H) of 0.5 mm, and a width (W) of 0.5 mm, A shoulder (R) having a radius of curvature of 60 μm or less is rounded at the shoulder of the external electrode extending from both end surfaces in the longitudinal direction to the peripheral surface of the ceramic element, and the external electrode is formed substantially at the center of a portion formed on the end face of the ceramic element. And a peripheral portion thereof is provided with a protruding portion for forming a step of 5 to 35 μm.
【０００９】外部電極の肩部の丸み（Ｒ）が曲率半径６
０μm以下と小さいため、セラミック電子部品が立ち上
がりにくくなるとともに、セラミック素子の端面側の外
部電極の中央部に、周辺部との段差が５〜３５μmの突
出部が形成されており、セラミック電子部品が立ち上が
りかけた場合、この突出部とその周辺部との段差部分
が、セラミック電子部品がそれ以上立ち上がることを抑
制する機能を果す。その結果、実装工程でツームストー
ン現象が発生することを効率よく、抑制、防止すること
が可能になり、実装信頼性を向上させることができる。The roundness (R) of the shoulder of the external electrode has a radius of curvature of 6
Since the ceramic electronic component is difficult to stand up because it is as small as 0 μm or less, a protruding portion having a step difference of 5 to 35 μm from the peripheral portion is formed at the center of the external electrode on the end face side of the ceramic element. In the case of rising, the step between the protruding portion and the peripheral portion has a function of suppressing the ceramic electronic component from further rising. As a result, the occurrence of the tombstone phenomenon in the mounting process can be efficiently suppressed and prevented, and the mounting reliability can be improved.
【００１０】また、本発明のセラミック電子部品は、前
記セラミック素子の両端側肩部が曲率半径２５μm以上
の丸み（Ｒ）を有しており、かつ、前記外部電極の、前
記セラミック素子の端面に形成された部分の最大厚みが
４０μm以下であることを特徴としている。In the ceramic electronic component of the present invention, the shoulders on both ends of the ceramic element have a radius (R) of a radius of curvature of 25 μm or more, and the external electrode is provided on an end face of the ceramic element. The maximum thickness of the formed portion is not more than 40 μm.
【００１１】このように、セラミック素子の両端側肩部
に曲率半径２５μm以上の丸み（Ｒ）をもたせるととも
に、外部電極の、セラミック素子の端面に形成された部
分の最大厚みを４０μm以下とすることにより、容易
に、外部電極の肩部に曲率半径６０μm以下の丸み
（Ｒ）をもたせることが可能になるとともに、外部電極
の、セラミック素子の端面に形成された部分に、その周
辺部との段差が５〜３５μmの突出部を形成することが
できるようになる。As described above, the shoulders at both ends of the ceramic element are rounded (R) with a radius of curvature of 25 μm or more, and the maximum thickness of the external electrode formed on the end face of the ceramic element is 40 μm or less. Accordingly, the shoulder of the external electrode can easily have a roundness (R) having a radius of curvature of 60 μm or less, and a step formed between the peripheral portion of the external electrode and the portion formed on the end face of the ceramic element. Can form protrusions of 5 to 35 μm.
【００１２】[0012]
【発明の実施の形態】以下、本発明の実施形態を示して
その特徴とするところをさらに詳しく説明する。なお、
この実施形態では、表面実装型の積層セラミックコンデ
ンサを例にとって説明する。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described, and features thereof will be described in more detail. In addition,
In this embodiment, a description will be given by taking a surface mount type multilayer ceramic capacitor as an example.
【００１３】図１は本発明の一実施形態にかかる積層セ
ラミックコンデンサ（セラミック電子部品）の正面断面
図、図２はその平面図である。FIG. 1 is a front sectional view of a multilayer ceramic capacitor (ceramic electronic component) according to an embodiment of the present invention, and FIG. 2 is a plan view thereof.
【００１４】この実施形態の積層セラミックコンデンサ
５は、図１及び図２に示すように、内部にセラミック層
１を介して複数の容量形成用の電極（内部電極）２が互
いに対向するように積層、配設されたセラミック素子３
の両端側に外部電極４を配設した構造を有している。As shown in FIGS. 1 and 2, a multilayer ceramic capacitor 5 of this embodiment has a plurality of electrodes (internal electrodes) 2 for forming a capacitance, which are interposed via a ceramic layer 1 inside. , Disposed ceramic element 3
Have external electrodes 4 disposed at both ends.
【００１５】この積層セラミックコンデンサ５のセラミ
ック素子３の寸法は次の通りである。 長さ（Ｌ）＝０．６mm 高さ（Ｈ）＝０．３mm 幅（Ｗ） ＝０．３mmThe dimensions of the ceramic element 3 of the multilayer ceramic capacitor 5 are as follows. Length (L) = 0.6mm Height (H) = 0.3mm Width (W) = 0.3mm
【００１６】また、セラミック素子３の端面３ａと周囲
面３ｃ（上下面、両側面など）との境界部である肩部
（エッジ部）３ｂには曲率半径が約３０μmの丸み
（Ｒ）がつけられている。さらに、この積層セラミック
コンデンサ５の、セラミック素子３の長手方向両端面３
ａから周囲面３ｃに回り込む部分である外部電極４の肩
部４ｂには曲率半径が約５５μmの丸み（Ｒ）がつけら
れている。また、外部電極４のセラミック素子３の端面
３ａに形成された部分４ａの最大厚みｔは約３５μmで
あり、その略中央部には突出部１０が形成されている。
そして、この突出部１０とその周辺部１１との間には約
２５μmの段差Ｇが形成されている。A shoulder (edge) 3b which is a boundary between the end surface 3a of the ceramic element 3 and the peripheral surface 3c (upper and lower surfaces, both side surfaces, etc.) is rounded (R) with a radius of curvature of about 30 μm. Have been. Further, both ends 3 of the multilayer ceramic capacitor 5 in the longitudinal direction of the ceramic element 3 are formed.
The shoulder 4b of the external electrode 4, which is a part that goes from the position a to the peripheral surface 3c, is rounded (R) with a radius of curvature of about 55 μm. The maximum thickness t of the portion 4a of the external electrode 4 formed on the end face 3a of the ceramic element 3 is about 35 μm, and a protrusion 10 is formed substantially at the center.
A step G of about 25 μm is formed between the protruding portion 10 and its peripheral portion 11.
【００１７】上記のように構成された積層セラミックコ
ンデンサ（セラミック電子部品）５においては、セラミ
ック素子３の長手方向両端面３ａから周囲面３ｃに回り
込む部分である外部電極４の肩部４ｂに曲率半径が約５
５μmの、従来より小さいＲがつけられているため、は
んだリフロー工程においても積層セラミックコンデンサ
５が立ち上がりにくく、また、セラミック素子３の端面
３ａに形成された外部電極部分４（４ａ）の略中央部
に、その周辺部１１との段差Ｇが約２５μmの突出部１
０が設けられているので、はんだリフロー工程において
積層セラミックコンデンサ５が立ち上がりかけても、突
出部１０とその周辺部１１との段差部分が、積層セラミ
ックコンデンサ５が立ち上がることを阻止する。その結
果、実装工程でツームストーン現象が発生することが効
率よく、抑制、防止され、実装信頼性が大幅に向上す
る。In the multilayer ceramic capacitor (ceramic electronic component) 5 configured as described above, the radius of curvature is formed on the shoulder 4b of the external electrode 4, which is the portion that goes from the longitudinal end surfaces 3a of the ceramic element 3 to the peripheral surface 3c. Is about 5
Since the R of 5 μm, which is smaller than that of the related art, is attached, the multilayer ceramic capacitor 5 is hard to rise even in the solder reflow process, and the center of the external electrode portion 4 (4a) formed on the end face 3a of the ceramic element 3 is formed. The protrusion 1 has a step G with the peripheral portion 11 of about 25 μm.
Since 0 is provided, even when the multilayer ceramic capacitor 5 rises in the solder reflow process, the step between the protrusion 10 and the peripheral portion 11 prevents the multilayer ceramic capacitor 5 from rising. As a result, the occurrence of the tombstone phenomenon in the mounting process is efficiently suppressed, prevented, and the mounting reliability is greatly improved.
【００１８】また、この実施形態の積層セラミックコン
デンサ５においては、セラミック素子３の肩部３ｂ及び
外部電極４の肩部４ｂに所定の丸み（Ｒ）をもたせてい
るので、積層セラミックコンデンサ５が他の部品などと
接触した場合に外部電極４が、その肩部（エッジ部）４
ｂで削られて断線することを防止することが可能にな
り、接続信頼性を向上させることができる。In the multilayer ceramic capacitor 5 of this embodiment, the shoulder 3b of the ceramic element 3 and the shoulder 4b of the external electrode 4 have a predetermined radius (R). When the external electrode 4 comes into contact with a part or the like of the
This makes it possible to prevent the wire from being cut off by b, thereby improving the connection reliability.
【００１９】なお、上記実施形態の積層セラミックコン
デンサ５においては、セラミック素子３の両端側肩部３
ｂに曲率半径が約３０μmの丸みをもたせ、かつ、セラ
ミック素子３の端面３ａに形成される外部電極４（４
ａ）の最大厚みｔを約３５μmとしているので、容易
に、セラミック素子３の長手方向両端面３ａから周囲面
３ｃに回り込む外部電極４の肩部４ｂに曲率半径６０μ
m以下の丸みをもたせるとともに、突出部１０とその周
辺部１１との間に所定の段差Ｇを形成することが可能に
なり、本発明をより実効あらしめることができる。In the multilayer ceramic capacitor 5 of the above embodiment, both shoulders 3 of the ceramic element 3 are provided.
b is rounded with a radius of curvature of about 30 μm, and an external electrode 4 (4
Since the maximum thickness t of a) is set to about 35 μm, the radius of curvature of 60 μm is easily applied to the shoulder 4 b of the external electrode 4 wrapping from the longitudinal end faces 3 a to the peripheral face 3 c of the ceramic element 3.
m and a predetermined step G can be formed between the protruding portion 10 and the peripheral portion 11 thereof, so that the present invention can be made more effective.
【００２０】表１に、本発明の積層セラミックコンデン
サ及び比較例の積層セラミックコンデンサについて調べ
た、外部電極の肩部の丸み（Ｒ）及び突出部とその周辺
部との段差Ｇと、ツームストーン現象の発生率の関係を
示す。Table 1 shows the multilayer ceramic capacitor of the present invention and the multilayer ceramic capacitor of the comparative example. The roundness (R) of the shoulder portion of the external electrode, the step G between the protruding portion and its peripheral portion, and the tombstone phenomenon were examined. Shows the relationship between the occurrence rates.
【００２１】[0021]
【表１】 [Table 1]
【００２２】なお、表１において、試料番号に*印を付
したものは本発明の範囲外の比較例である。表１に示す
ように、外部電極の肩部のＲが６０μmを越える試料
（試料番号１，５）の場合、ツームストーン現象の発生
率が高くなっている。また、外部電極の肩部のＲが６０
μm以下の積層セラミックコンデンサ（試料番号２，
３，４，６，７，８）であっても、段差Ｇが４０μm以
上である積層セラミックコンデンサ（試料番号２，６）
の場合にはツームストーン現象の発生率が高くなってい
る。さらに、外部電極の肩部の丸み（Ｒ）が６０μm以
下であっても突出部の形成されていない試料（試料番号
３，７）の場合には、ツームストーン現象の発生率が高
くなっている。In Table 1, samples marked with an asterisk (*) are comparative examples outside the scope of the present invention. As shown in Table 1, the rate of occurrence of the tombstone phenomenon is high in the samples (sample numbers 1 and 5) in which the R of the shoulder of the external electrode exceeds 60 μm. Also, R of the shoulder of the external electrode is 60
μm or smaller multilayer ceramic capacitor (Sample No. 2,
3, 4, 6, 7, 8), a multilayer ceramic capacitor having a step G of 40 μm or more (sample numbers 2, 6)
In the case of, the occurrence rate of the tombstone phenomenon is high. Furthermore, even if the roundness (R) of the shoulder of the external electrode is 60 μm or less, in the case of the sample having no protrusion (sample Nos. 3 and 7), the occurrence rate of the tombstone phenomenon is high. .
【００２３】これに対して、外部電極の肩部の丸み
（Ｒ）が６０μm以下、端面側に形成された外部電極の
最大厚みが４０μm以下であって、周辺部との段差が３
０μmの突出部が形成された本発明の積層セラミックコ
ンデンサ（試料番号４，８）の場合、ツームストーン現
象の発生率が低くなっていることがわかる。On the other hand, the roundness (R) of the shoulder of the external electrode is 60 μm or less, the maximum thickness of the external electrode formed on the end face side is 40 μm or less, and the step with the peripheral portion is 3 μm.
In the case of the multilayer ceramic capacitor of the present invention (Sample Nos. 4 and 8) in which the protrusion of 0 μm was formed, the occurrence rate of the tombstone phenomenon was low.
【００２４】なお、上記実施形態では、積層セラミック
コンデンサを例にとって説明したが、本発明は積層セラ
ミックコンデンサに限られるものではなく、セラミック
素子の両端側に外部電極を備えた種々のセラミック電子
部品に適用することが可能である。In the above embodiment, a multilayer ceramic capacitor has been described as an example. However, the present invention is not limited to a multilayer ceramic capacitor, but may be applied to various ceramic electronic components having external electrodes at both ends of a ceramic element. It is possible to apply.
【００２５】本発明はさらにその他の点においても上記
実施形態に限定されるものではなく、セラミック素子の
具体的な寸法、形状、外部電極のパターン、外部電極に
形成される突出部の具体的な配設位置などに関し、発明
の要旨の範囲内において、種々の応用、変形を加えるこ
とが可能である。The present invention is not limited to the above-described embodiment in other respects as well. Specific dimensions and shapes of the ceramic element, patterns of the external electrodes, and specific details of the projections formed on the external electrodes are not limited to those described above. Regarding the disposition position, various applications and modifications can be made within the scope of the invention.
【００２６】[0026]
【発明の効果】上述のように、本発明のセラミック電子
部品は、セラミック電子部品を構成するセラミック素子
の長手方向両端面から周囲面に回り込む外部電極の肩部
に曲率半径６０μm以下の丸み（Ｒ）をつけるととも
に、外部電極の、セラミック素子の端面に形成された部
分の略中央部に、その周辺部との段差が５〜３５μmの
突出部を設けているので、例えば、実装時のはんだリフ
ロー工程においてセラミック電子部品が立ち上がりかけ
た場合にも、突出部とその周辺部との段差部分により、
セラミック電子部品が立ち上がることを抑制、防止する
ことが可能になり、実装工程でツームストーン現象が発
生することを効率よく、抑制、防止して実装信頼性を向
上させることができる。As described above, the ceramic electronic component of the present invention has a roundness (R) having a radius of curvature of 60 μm or less at the shoulder of the external electrode extending from both longitudinal end surfaces of the ceramic element constituting the ceramic electronic component to the peripheral surface. ), And a protruding portion having a step difference of 5 to 35 μm from the peripheral portion is provided substantially at the center of the portion of the external electrode formed on the end face of the ceramic element. Even when the ceramic electronic component rises in the process, due to the step between the protruding part and its peripheral part,
The rise of the ceramic electronic component can be suppressed and prevented, and the occurrence of the tombstone phenomenon in the mounting process can be efficiently suppressed and prevented, and the mounting reliability can be improved.
【００２７】また、セラミック素子の両端側肩部に曲率
半径２５μm以上の丸み（Ｒ）をもたせるとともに、外
部電極の、セラミック素子の端面に形成された部分の最
大厚みを４０μm以下とした場合、容易に、外部電極の
肩部に曲率半径６０μm以下の丸み（Ｒ）をもたせるこ
とが可能になるとともに、外部電極のセラミック素子の
端面に形成された部分に、その周辺部との段差が５〜３
５μmの突出部を形成することが可能になり、本発明を
より実効あらしめることができる。When the shoulders at both ends of the ceramic element are rounded with a radius of curvature of 25 μm or more (R) and the maximum thickness of the external electrode formed on the end face of the ceramic element is 40 μm or less, In addition, it is possible to make the shoulder of the external electrode have a radius (R) having a radius of curvature of 60 μm or less, and a step formed on the end face of the ceramic element of the external electrode by 5 to 3 from its peripheral portion.
A protrusion of 5 μm can be formed, and the present invention can be made more effective.
【００２８】また、本発明のセラミック電子部品におい
ては、セラミック素子の肩部及び外部電極の肩部に所定
の丸み（Ｒ）をもたせているので、セラミック電子部品
が他の部品などと接触した場合に、外部電極がその肩部
で断線することを防止して接続信頼性を向上させること
ができる。Further, in the ceramic electronic component of the present invention, the shoulder of the ceramic element and the shoulder of the external electrode have a predetermined radius (R), so that the ceramic electronic component may come into contact with other components. In addition, it is possible to prevent the external electrode from being disconnected at its shoulder, thereby improving connection reliability.
【図１】本発明の一実施形態にかかる積層セラミックコ
ンデンサ（セラミック電子部品）の正面断面図である。FIG. 1 is a front sectional view of a multilayer ceramic capacitor (ceramic electronic component) according to an embodiment of the present invention.
【図２】本発明の一実施形態にかかる積層セラミックコ
ンデンサ（セラミック電子部品）の平面図である。FIG. 2 is a plan view of the multilayer ceramic capacitor (ceramic electronic component) according to one embodiment of the present invention.
【図３】従来のセラミック電子部品を示す正面断面図で
ある。FIG. 3 is a front sectional view showing a conventional ceramic electronic component.
【図４】従来のセラミック電子部品を示す平面図であ
る。FIG. 4 is a plan view showing a conventional ceramic electronic component.
【図５】従来のセラミック電子部品の実装工程でツーム
ストーン現象が発生した状態を示す正面図である。FIG. 5 is a front view showing a state in which a tombstone phenomenon has occurred in a conventional ceramic electronic component mounting process.
１ セラミック層 ２ 内部電極 ３ セラミック素子 ３ａ セラミック素子の端面 ３ｂ セラミック素子の肩部 ３ｃ セラミック素子の周囲面 ４ 外部電極 ４ａ 外部電極のセラミック素子の端面
側に形成された部分 ４ｂ 外部電極の肩部 ５ 積層セラミックコンデンサ（セラ
ミック電子部品） １０ 突出部 １１ 突出部の周辺部 Ｇ 段差Reference Signs List 1 ceramic layer 2 internal electrode 3 ceramic element 3a end face of ceramic element 3b shoulder of ceramic element 3c peripheral face of ceramic element 4 external electrode 4a part formed on end face of ceramic element of external electrode 4b shoulder of external electrode 5 Multilayer ceramic capacitor (ceramic electronic component) 10 Projecting part 11 Peripheral part of projecting part G Step
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01G 4/12 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H01G 4/12
Claims (2)
５mm、幅（Ｗ）≦０．５mmのセラミック素子の長手方向
両端面を含む両端側部分に外部電極が配設された構造を
有するセラミック電子部品において、 前記セラミック素子の長手方向両端面から周囲面に回り
込む前記外部電極の肩部に曲率半径６０μm以下の丸み
（Ｒ）をつけるとともに、 前記外部電極のセラミック素子の端面に形成された部分
の略中央部に、その周辺部との間に５〜３５μmの段差
が形成されるような突出部を設けたことを特徴とするセ
ラミック電子部品。1. Length (L) ≦ 1.0 mm and height (H) ≦ 0.
A ceramic electronic component having a structure in which external electrodes are provided at both end portions including both ends in a longitudinal direction of a ceramic element having a width (W) of 0.5 mm and a width (W) ≦ 0.5 mm, wherein a peripheral surface is formed from both ends in a longitudinal direction of the ceramic element. A shoulder (R) having a radius of curvature of 60 μm or less is rounded at the shoulder of the external electrode, and the external electrode is formed at a substantially central portion of a portion formed on the end face of the ceramic element and between the peripheral portion and the central portion. A ceramic electronic component provided with a protrusion that forms a step of 35 μm.
径２５μm以上の丸み（Ｒ）を有しており、かつ、前記
外部電極の、前記セラミック素子の端面に形成された部
分の最大厚みが４０μm以下であることを特徴とする請
求項１記載のセラミック電子部品。2. The ceramic device according to claim 1, wherein shoulders at both ends of the ceramic element have a radius (R) having a radius of curvature of 25 μm or more, and a maximum thickness of a portion of the external electrode formed on an end face of the ceramic element is reduced. 2. The ceramic electronic component according to claim 1, wherein the thickness is 40 μm or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19554796A JP3307234B2 (en) | 1996-07-04 | 1996-07-04 | Ceramic electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19554796A JP3307234B2 (en) | 1996-07-04 | 1996-07-04 | Ceramic electronic components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1022164A JPH1022164A (en) | 1998-01-23 |
| JP3307234B2 true JP3307234B2 (en) | 2002-07-24 |
Family
ID=16342921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19554796A Expired - Lifetime JP3307234B2 (en) | 1996-07-04 | 1996-07-04 | Ceramic electronic components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3307234B2 (en) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3630056B2 (en) * | 2000-01-26 | 2005-03-16 | 株式会社村田製作所 | Chip-type electronic components and chip-type capacitors |
| JP4715000B2 (en) * | 2001-02-22 | 2011-07-06 | パナソニック株式会社 | Manufacturing method of chip-type electronic component |
| JP2003007566A (en) * | 2001-06-25 | 2003-01-10 | Kyocera Corp | Laminated electronic component |
| JP4366931B2 (en) * | 2002-12-20 | 2009-11-18 | 株式会社村田製作所 | Ceramic electronic component and manufacturing method thereof |
| JP2006173270A (en) | 2004-12-14 | 2006-06-29 | Tdk Corp | Chip type electronic component |
| JP4946941B2 (en) * | 2008-03-27 | 2012-06-06 | Ｔｄｋ株式会社 | Surface mount type electronic component array and manufacturing method thereof |
| KR101489815B1 (en) | 2013-07-11 | 2015-02-04 | 삼성전기주식회사 | Multi-layered ceramic capacitor |
| JP6965638B2 (en) * | 2017-08-31 | 2021-11-10 | Tdk株式会社 | Electronic components |
| JP7148239B2 (en) | 2017-12-08 | 2022-10-05 | 太陽誘電株式会社 | Ceramic electronic component and manufacturing method thereof |
| JP7231340B2 (en) | 2018-06-05 | 2023-03-01 | 太陽誘電株式会社 | Ceramic electronic component and manufacturing method thereof |
| KR20230087953A (en) | 2021-12-10 | 2023-06-19 | 삼성전기주식회사 | Multilayer ceramic capacitor |
| WO2023248590A1 (en) * | 2022-06-21 | 2023-12-28 | 株式会社村田製作所 | Multilayer ceramic capacitor and mounting structure for multilayer ceramic capacitor |
-
1996
- 1996-07-04 JP JP19554796A patent/JP3307234B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1022164A (en) | 1998-01-23 |
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