JP3306892B2 - Semiconductor optical integrated device and method of manufacturing the same - Google Patents

Semiconductor optical integrated device and method of manufacturing the same

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Publication number
JP3306892B2
JP3306892B2 JP4283192A JP4283192A JP3306892B2 JP 3306892 B2 JP3306892 B2 JP 3306892B2 JP 4283192 A JP4283192 A JP 4283192A JP 4283192 A JP4283192 A JP 4283192A JP 3306892 B2 JP3306892 B2 JP 3306892B2
Authority
JP
Japan
Prior art keywords
waveguide layer
optical waveguide
semiconductor
optical
integrated device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4283192A
Other languages
Japanese (ja)
Other versions
JPH05243551A (en
Inventor
雅博 青木
博久 佐野
伸治 坂野
鈴木  誠
誠 高橋
和久 魚見
立身 井戸
厚志 高井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4283192A priority Critical patent/JP3306892B2/en
Priority to DE69331979T priority patent/DE69331979T2/en
Priority to EP93103158A priority patent/EP0558089B1/en
Priority to US08/024,084 priority patent/US5574289A/en
Publication of JPH05243551A publication Critical patent/JPH05243551A/en
Application granted granted Critical
Publication of JP3306892B2 publication Critical patent/JP3306892B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/026Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0265Intensity modulators

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体光集積素子及びそ
の製造方法に係り、特に光通信用モジュール、光通信シ
ステムに用いて好適な半導体光集積素子及びその製造方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor optical integrated device and a method of manufacturing the same, and more particularly, to a semiconductor optical integrated device suitable for use in an optical communication module and an optical communication system and a method of manufacturing the same.

【0002】[0002]

【従来の技術】2軸性の歪を有する超格子構造の導入に
より半導体レーザ、光変調器、光スイッチ、光検出器、
光増幅器等の半導体光機能素子の特性を大きく改善でき
ることが知られている。今後、光応用技術の進展に伴い
これらのモノリシック集積化が必要不可欠になると考え
られるが、現状の結晶成長技術では異なる歪量をもつ超
格子構造の集積化は不可能であり実現例もこれまでに無
かった。このため、これまでの集積素子内での動作光の
偏波はTEモ−ドに限定されていた。
2. Description of the Related Art By introducing a superlattice structure having a biaxial strain, a semiconductor laser, an optical modulator, an optical switch, a photodetector,
It is known that characteristics of a semiconductor optical functional device such as an optical amplifier can be greatly improved. In the future, it is thought that these monolithic integrations will be indispensable with the progress of optical application technology, but it is impossible to integrate superlattice structures with different strains with the current crystal growth technology, and realization examples Was not there. For this reason, the polarization of the operating light in the integrated device has been limited to the TE mode.

【0003】一方、同一半導体基板上に異種機能素子を
集積化する方法として、図1A、Bに示すように、選択
成長を用いて基板面内でのバンドギャップエネルギ−を
制御する方法が提案されている。なお、この種の半導体
光集積素子として関連するものに、例えば、電子情報通
信学会秋季大会C−133、1991年9月5日が挙げ
られる。
On the other hand, as a method of integrating heterogeneous functional elements on the same semiconductor substrate, as shown in FIGS. 1A and 1B, a method of controlling band gap energy in a substrate surface using selective growth has been proposed. ing. In addition, as related to this type of semiconductor optical integrated device, for example, the IEICE Autumn Conference C-133, September 5, 1991, may be mentioned.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
方法によれば絶縁マスク1を形成した半導体基板2上に
量子井戸構造3を結晶成長することにより基板面内に量
子井戸層厚の異なる、すなわち、量子準位の異なる量子
井戸光導波路を単一の結晶成長で集積化できる。この場
合、集積する素子の量子井戸層厚及び混晶組成は必要な
絶縁マスク幅から一意に規定されてしまう。このため、
基板面内での歪量制御が不可能であり素子特性の一層の
向上が期待できる歪系の量子井戸構造への応用が困難だ
った。このため集積素子毎に量子井戸層等の素子構造を
最適設計することはできなかった。本発明は、歪量(格
子不整合度、圧縮歪/引張歪)が異なる量子井戸構造の
集積化により半導体光素子の性能を大幅に向上すること
を目的とする。本発明のさらなる目的は、歪量(格子不
整合度、圧縮歪/引張歪)が基板面内で異なる量子井戸
構造を提供することにある。また、前記歪量の組合せに
より、従来では存在しなかった光学特性の偏波面依存性
の異なる光導波路の集積化、および動作光の任意の偏波
面制御が可能な光集積素子及びその好適な作製法を提供
する。
However, according to the conventional method, the quantum well structure 3 is grown on the semiconductor substrate 2 on which the insulating mask 1 is formed by crystal growth, so that the quantum well layers have different thicknesses in the substrate plane. In addition, quantum well optical waveguides having different quantum levels can be integrated by single crystal growth. In this case, the thickness of the quantum well layer and the mixed crystal composition of the integrated device are uniquely determined from the required insulating mask width. For this reason,
It is difficult to control the amount of strain in the plane of the substrate, and it is difficult to apply a strain-based quantum well structure that can be expected to further improve device characteristics. Therefore, it has not been possible to optimally design an element structure such as a quantum well layer for each integrated element. An object of the present invention is to significantly improve the performance of a semiconductor optical device by integrating quantum well structures having different strain amounts (degree of lattice mismatch, compressive strain / tensile strain). It is a further object of the present invention to provide a quantum well structure in which the amount of strain (lattice mismatch, compressive strain / tensile strain) differs in the plane of the substrate. In addition, by combining the above-described distortion amounts, integration of optical waveguides having different polarization plane dependences of optical characteristics which did not exist conventionally, and an optical integrated element capable of arbitrary control of the polarization plane of operation light, and its preferable manufacturing Provide the law.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明者らは、量子井戸結晶層の組成、つまり下地
基板に対する格子不整合量が異なる半導体光集積素子を
提供する。さらに、上記の実現に向けた半導体光集積素
子の製造方法を半導体基板上に形成した絶縁膜パターニ
ングマスクを用いた領域選択成長技術により提供するも
のである。
In order to achieve the above object, the present inventors provide a semiconductor optical integrated device in which the composition of the quantum well crystal layer, that is, the amount of lattice mismatch with the underlying substrate is different. Further, a method of manufacturing a semiconductor optical integrated device for realizing the above is provided by a region selective growth technique using an insulating film patterning mask formed on a semiconductor substrate.

【0006】[0006]

【作用】まづ、光軸方向に格子不整合量が異なる量子井
戸構造を有する半導体光集積素子についてその特長を列
挙する。
First, the features of a semiconductor optical integrated device having a quantum well structure in which the amount of lattice mismatch differs in the optical axis direction will be listed.

【0007】(1)圧縮歪を有する量子井戸導波路層と
引張歪を有する量子井戸導波路層を集積した場合、圧縮
歪量子井戸素子では結晶成長面に平行な偏波面を持つ光
(TE偏波光)を、引張歪量子井戸素子では結晶成長面
に垂直な偏波面を持つ光(TM偏波光)をそれぞれ独立
に制御できるため、偏波無依存な光素子や動作光の任意
の偏波面制御が可能な光集積素子を実現することができ
る。
(1) When a quantum well waveguide layer having a compressive strain and a quantum well waveguide layer having a tensile strain are integrated, light having a polarization plane parallel to the crystal growth plane (TE polarization) in the compressive strain quantum well element is obtained. In the tensile strained quantum well device, light having a plane of polarization perpendicular to the crystal growth surface (TM polarized light) can be controlled independently, so that polarization independent optical devices and arbitrary polarization plane control of operating light can be controlled. It is possible to realize an optical integrated device capable of performing the above.

【0008】(2)圧縮歪を有する量子井戸導波路層を
半導体能動素子、引張歪を有する量子井戸導波路層を半
導体受動素子として用いた場合、圧縮歪量子井戸能動素
子から発生するTE偏波光に対し、引張歪受動導波路層
の伝搬損失が大きく低減できる。これは引張歪をもつ半
導体層では光吸収に関し軽い正孔帯が関与するためとに
より、TM偏波光の光吸収が支配的になるためである。
(2) When a quantum well waveguide layer having a compressive strain is used as a semiconductor active device and a quantum well waveguide layer having a tensile strain is used as a semiconductor passive device, TE polarized light generated from the compressive strain quantum well active device is used. On the other hand, the propagation loss of the tensile-strain passive waveguide layer can be greatly reduced. This is because light absorption of TM polarized light becomes dominant in a semiconductor layer having a tensile strain because light hole bands are involved in light absorption.

【0009】また、圧縮歪を有する量子井戸導波路層を
半導体受動素子、引張歪を有する量子井戸導波路層を半
導体能動素子として用いた場合についても同様な議論が
成立することを付記する。
It should be noted that a similar argument holds when a quantum well waveguide layer having a compressive strain is used as a semiconductor passive element and a quantum well waveguide layer having a tensile strain is used as a semiconductor active element.

【0010】(3)能動受動素子に共に引張歪を有する
量子井戸導波路層を導入した場合、発光、光吸収、屈折
率変化などの光学特性に対して全て軽い正孔帯が関与
し、動作光はTM偏波光となる。このため、発光素子に
対しては発光効率の向上、発振波長の安定性や温度特性
の改善、高速動作化等が図れる。また、受動素子に対し
ては吸収係数や屈折率変化の増大、高速動作化、動作光
出力の増大が実現できる。 (4)能動受動素子に共に圧縮歪を有する量子井戸導波
路層を導入した場合、重い正孔の有効質量は1/10程
度にまで軽くなり、軽い正孔と同様の効果が現われる。
このため、(3)と同様の素子性能向上が期待できる。
(3) When a quantum well waveguide layer having a tensile strain is introduced into both active and passive elements, light hole bands are all involved in optical characteristics such as light emission, light absorption, and change in refractive index, and operation is performed. The light becomes TM polarized light. Therefore, for the light emitting element, it is possible to improve the luminous efficiency, the stability of the oscillation wavelength and the temperature characteristics, the high-speed operation, and the like. For a passive element, an increase in an absorption coefficient or a change in a refractive index, an increase in operation speed, and an increase in an operation light output can be realized. (4) When a quantum well waveguide layer having compressive strain is introduced into both active and passive elements, the effective mass of heavy holes is reduced to about 1/10, and an effect similar to that of light holes appears.
Therefore, an improvement in element performance similar to that of (3) can be expected.

【0011】以上の様に歪量の異なる量子井戸構造を有
する光集積素子によりの組合せにより高性能な光集積素
子を実現することが出来る。
As described above, a high-performance optical integrated device can be realized by a combination of optical integrated devices having quantum well structures with different strain amounts.

【0012】では以下、歪量(格子不整合度、圧縮歪/
引張歪)が異なる量子井戸構造を有する半導体光集積素
子の作製法について説明する。図2に示した半導体基板
2上に絶縁膜パターニングマスク1を形成する。ここ
で、パターニング間の半導体が露出している部分を成長
領域、その幅を成長領域幅と定義する。図2に示すよう
に、成長領域幅が光軸方向で変化するように絶縁膜マス
ク1をパターニングしている。このような絶縁膜パター
ニングマスク1を有する半導体基板2上に図3Aに示す
ように、III/V族の混晶半導体で構成される光導波路
層4、量子井戸層5、量子障壁層6から構成される量子
井戸構造3及びクラッド層7を気相成長する。ここで、
量子井戸層5は格子定数の異なる2種以上のIII族元
素、例えばGaやInで構成されるものとする。この場
合、絶縁膜パターニングマスク上には結晶成長が起こら
ないため、成長領域のみに選択的に成長が起こる(領域
選択成長)。また、絶縁膜パターニングマスク1上に飛
来した成長原料種は成長領域に表面拡散、気相拡散する
ため、目開き長が小さい程、成長速度は増大する。この
時、成長層の組成変化も同時におこる。これは、同族元
素材料間、特にIII族材料間の絶縁膜パターニングマス
ク1上での拡散長が異なるために起こる現象である。例
えば、前出のGaとInではIn原料種の方が拡散長が
大きいため、選択成長により結晶中のIn組成が豊富に
なり、結晶格子定数は下地基板のそれより長くなる。こ
の拡散長や格子定数の大小関係はIII族元素の組合せに
より異なるため領域選択成長により結晶格子定数が下地
基板のそれより短くなる場合も有ることを付記する。ま
た、これらの成長層厚の増大や組成変化は成長領域幅の
減少と共に顕著になる。従って、この組成変化を積極的
に用いれば、量子井戸構造の基板面内での組成、つまり
歪量を成長領域幅により容易に制御することができ、こ
の技術を用いて基板面内に歪量の異なる量子井戸構造を
有する高性能な半導体光集積素子を作製することができ
る。具体的には、図3Aに示した量子井戸構造の結晶成
長において、図3Bに示すように、成長領域幅の大きい
領域bでは量子井戸層5の結晶格子定数を量子障壁層6
のそれよりも予め短く設定し、量子井戸層に引張歪を有
する量子井戸構造とする。この時、前述の組成変化によ
り、目開き長の小さな領域aにおいては量子井戸層に圧
縮歪を有する量子井戸構造が自動的に形成される。ここ
で、光導波路層4、量子障壁層6及びクラッド層7には
後に実施例で示すようにIII族元素組成比が1もしくは
十分大きな混晶半導体を用いているため、図3Bに示す
ように、2領域a、bで成長層組成に大きな差異が生じ
ない。例えば、InxGa1-xAsPにおいてIII族元素
であるInとGaの組成比が共に0.5程度の場合には
2領域で層厚、組成の変化が大きくなるが、いずれかの
元素の組成比が大きくなるに従いこの変化は小さくな
る。このような化合物半導体の組成比が、領域選択成長
における層厚、組成の変化に寄与する度合いは、V族元
素に比べてIII族元素のほうが桁違いに大きい。同族の
元素AとBの組成比をそれぞれ[A]、[B]としたと
き、χ≡[A]/[B]で定義されるχの値が、0.2
5≦χ≦4で大きな変化が得られ、1で最大の変化とな
る。この際、成長条件は目開き長の大きい領域bにおい
て量子井戸層の格子定数が、混晶半導体結晶を構成する
原子の絶縁膜パターニングマスク1上での、ガス組成や
移動距離が元素間で異なるために、パターニング幅に応
じて成長層の組成及び層厚が異なった量子井戸構造3が
自動的に形成される。領域a、bは同一の結晶成長で形
成されているため2領域は極めて滑らかに結合してお
り、結合損失が著しく低減され、光結合効率はほぼ10
0%となる。図4は、原料ガス供給量、成長温度等の成
長条件を一定にし、InGaAsP四元層及びInGa
As三元層をInP基板上に有機金属気相成長した場合
の、パターニングマスク幅に対する成長層の下地基板に
対する格子不整合度を調べた結果の一例である。結晶成
長は図の挿絵に示すように、全て成長領域幅は20μm
一定とし、マスク幅がゼロつまり通常の成長の場合格子
不整が負、マスク幅50μmの場合格子整合する様な条
件で行った。図に示すように、同一基板上で、異なった
マスク幅に設定することにより、歪量の異なる量子井戸
構造を複数種、任意に設定することができる。図5は量
子井戸層厚増大及び前述の井戸層組成変化による量子井
戸構造の等価的なエネルギ−ギャップ変化をPLピ−ク
波長により表した結果の一例である。従来の方法では圧
縮歪によるエネルギ−ギャップの縮小効果のみを用いて
いたため、エネルギーギャップ制御幅は100meV程
度に制限されていたが、本発明によれば負の歪も用いる
ことによりエネルギーギャップ制御幅を従来の2倍程度
まで拡大できる。このため、本技術の光集積素子応用へ
の設計自由度が大きく向上する。
In the following, the amount of distortion (degree of lattice mismatch, compressive strain /
A method for manufacturing a semiconductor optical integrated device having a quantum well structure having different tensile strains will be described. An insulating film patterning mask 1 is formed on a semiconductor substrate 2 shown in FIG. Here, a portion where the semiconductor is exposed during patterning is defined as a growth region, and the width thereof is defined as a growth region width. As shown in FIG. 2, the insulating film mask 1 is patterned so that the growth region width changes in the optical axis direction. As shown in FIG. 3A, on a semiconductor substrate 2 having such an insulating film patterning mask 1, an optical waveguide layer 4, a quantum well layer 5, and a quantum barrier layer 6 composed of a III / V mixed crystal semiconductor are formed. The quantum well structure 3 and the cladding layer 7 to be formed are vapor-phase grown. here,
The quantum well layer 5 is composed of two or more group III elements having different lattice constants, for example, Ga and In. In this case, since crystal growth does not occur on the insulating film patterning mask, growth occurs selectively only in the growth region (region selective growth). In addition, since the growth source species that has flown onto the insulating film patterning mask 1 undergoes surface diffusion and vapor phase diffusion in the growth region, the growth rate increases as the opening length becomes smaller. At this time, the composition of the growth layer also changes. This is a phenomenon that occurs because the diffusion length on the insulating film patterning mask 1 is different between homologous element materials, especially between group III materials. For example, in the case of Ga and In described above, since the diffusion length of the In source material is larger, the In composition in the crystal is enriched by selective growth, and the crystal lattice constant is longer than that of the underlying substrate. Since the magnitude relationship between the diffusion length and the lattice constant differs depending on the combination of the group III elements, it is additionally noted that the crystal lattice constant may be shorter than that of the base substrate due to the selective region growth. Further, the increase in the thickness of the grown layer and the change in the composition become remarkable as the width of the grown region decreases. Therefore, if this composition change is positively used, the composition of the quantum well structure in the substrate surface, that is, the amount of strain can be easily controlled by the growth region width. High performance semiconductor optical integrated devices having different quantum well structures can be manufactured. Specifically, in the crystal growth of the quantum well structure shown in FIG. 3A, as shown in FIG. 3B, in the region b having a large growth region width, the crystal lattice constant of the quantum well layer 5 is changed to the quantum barrier layer 6.
Is set in advance to be shorter than that of the above, to obtain a quantum well structure having a tensile strain in the quantum well layer. At this time, a quantum well structure having a compressive strain in the quantum well layer is automatically formed in the region a having a small opening length due to the composition change described above. Here, since the group III element composition ratio is 1 or a sufficiently large mixed crystal semiconductor is used for the optical waveguide layer 4, the quantum barrier layer 6, and the cladding layer 7 as shown in the examples later, as shown in FIG. No significant difference occurs in the composition of the growth layer between the two regions a and b. For example, in In x Ga 1-x AsP, when the composition ratios of In and Ga, which are group III elements, are both about 0.5, the change in layer thickness and composition in two regions is large. This change decreases as the composition ratio increases. The degree to which such a composition ratio of the compound semiconductor contributes to the change in the layer thickness and the composition in the selective region growth is much larger for the group III element than for the group V element. Assuming that the composition ratio of the homologous elements A and B is [A] and [B], respectively, the value of {defined by [A] / [B]} is 0.2
A large change is obtained when 5 ≦ χ ≦ 4, and a maximum change is obtained when 1 ≦ 1. At this time, the growth condition is such that the lattice constant of the quantum well layer in the region b having a large aperture length and the gas composition and the moving distance of the atoms constituting the mixed crystal semiconductor crystal on the insulating film patterning mask 1 differ among the elements. Therefore, the quantum well structure 3 in which the composition and the thickness of the growth layer are different according to the patterning width is automatically formed. Since the regions a and b are formed by the same crystal growth, the two regions are extremely smoothly coupled, the coupling loss is significantly reduced, and the optical coupling efficiency is approximately 10%.
0%. FIG. 4 shows that the growth conditions such as the source gas supply amount and the growth temperature are kept constant, and the InGaAsP quaternary layer and the InGa
5 is an example of the result of examining the degree of lattice mismatch between the growth layer and the underlying substrate with respect to the patterning mask width when the As ternary layer is formed by metalorganic chemical vapor deposition on the InP substrate. As for the crystal growth, as shown in the illustration in the figure, the entire growth region width is 20 μm.
The conditions were set such that the mask width was zero, that is, the lattice irregularity was negative in the case of the mask width of zero, that is, the normal growth, and that the lattice matching was performed in the case of the mask width of 50 μm. As shown in the figure, by setting different mask widths on the same substrate, a plurality of types of quantum well structures having different strain amounts can be arbitrarily set. FIG. 5 is an example of a result in which the equivalent energy gap change of the quantum well structure due to the increase in the quantum well layer thickness and the change in the well layer composition described above is represented by the PL peak wavelength. In the conventional method, the energy gap control width is limited to about 100 meV because only the energy-gap reduction effect due to the compressive strain is used. It can be expanded to about twice the conventional size. For this reason, the degree of freedom in designing the present technology for application to an optical integrated device is greatly improved.

【0013】[0013]

【実施例】以下、本発明の実施例を図6〜図14を用い
て説明する。
Embodiments of the present invention will be described below with reference to FIGS.

【0014】実施例1 図6において、n−InP基板8上に半導体基板が露出
した領域(成長領域幅)が、回折格子9が形成されてい
る領域と形成されていない領域とで光導波路方向に異な
るようなSiO2、SiNX、a−Si等の絶縁物パター
ニングマスク10を形成する。次に、このパターニング
基板上にIn0.85Ga0.15As0.330.67四元導波路層
11、InxGa1-xAs三元量子井戸層12及びIn0.
85Ga0.15As0.330.67四元量子障壁層13で構成さ
れる多重量子井戸構造14、およびp−InPクラッド
層15を順次、有機金属気相成長法で結晶成長する。図
4から2領域の目開き長をそれぞれ45μm、60μm
とすることによって、利得ピーク波長をそれぞれ1.4
8μm、1.56μmに設定すると同時に量子井戸構造
の格子歪量をそれぞれ−0.5%、+0.5%に設定す
る。このようにして各半導体層を形成した後、上部電極
16、下部電極17を通常の蒸着法等により形成して半
導体光集積素子を得る。本構造を、それぞれ光変調器、
分布帰還型レーザとして用いることにより電界吸収型変
調器集積化光源を実現できる。図7は更に埋込構造、電
流狭窄構造を公知の方法により導入した実施例の素子構
造である。変調器への引張歪導入により利得ピーク波長
を1.48μmに保ったまま量子井戸層厚を無歪の場合
の約1.5倍の60Åに広げることが出来る。電界吸収
効果は井戸層厚の4乗にほぼ比例するため、電界吸収効
果は5倍に増大する。これにより、変調器の駆動電圧を
従来の半分に、変調時のチャ−ピングを1/10程度に
まで低減でき、極めて容易に高性能、高信頼の光集積素
子を実現することができた。
Embodiment 1 In FIG. 6, the region (growth region width) where the semiconductor substrate is exposed on the n-InP substrate 8 is in the direction of the optical waveguide between the region where the diffraction grating 9 is formed and the region where the diffraction grating 9 is not formed. An insulating patterning mask 10 such as SiO 2 , SiN x , a-Si or the like is formed. Next, In 0. 85 Ga 0. 15 As 0. 33 P 0. 67 four yuan waveguide layer 11, In x Ga 1-x As ternary quantum well layer 12 and the In 0 in the patterning on the substrate.
85 Ga 0. 15 As 0. 33 P 0. 67 consists of four yuan quantum barrier layer 13 multiple quantum well structure 14, and sequentially the p-InP cladding layer 15 is crystal grown by metalorganic vapor phase epitaxy. From FIG. 4, the opening lengths of the two regions are 45 μm and 60 μm, respectively.
, The gain peak wavelengths are each set to 1.4.
At the same time, the lattice strains of the quantum well structure are set to -0.5% and + 0.5%, respectively. After forming each semiconductor layer in this manner, the upper electrode 16 and the lower electrode 17 are formed by a normal vapor deposition method or the like to obtain a semiconductor optical integrated device. This structure is an optical modulator,
By using as a distributed feedback laser, an electro-absorption modulator integrated light source can be realized. FIG. 7 shows an element structure of an embodiment in which a buried structure and a current confinement structure are further introduced by a known method. By introducing tensile strain into the modulator, the thickness of the quantum well layer can be increased to 60 °, which is about 1.5 times that in the case of no strain, while maintaining the gain peak wavelength at 1.48 μm. Since the electric field absorption effect is substantially proportional to the fourth power of the well layer thickness, the electric field absorption effect increases by a factor of five. As a result, the driving voltage of the modulator can be reduced to half that of the conventional device, and the chirping at the time of modulation can be reduced to about 1/10, and a high performance and highly reliable optical integrated device can be realized extremely easily.

【0015】実施例2 図8は実施例1における光変調器、分布帰還型レーザ部
の量子井戸層をそれぞれ−1.5%、−1.0%の引張
歪を有する量子井戸層14で置き換え、更に埋込構造、
電流狭窄構造を公知の方法により導入した実施例の素子
構造である。この場合、発振光はTMモ−ドとなり、レ
−ザ発光、光吸収には従来の重い正孔帯に替わり軽い正
孔帯が関与する。このため、レ−ザの発振波長の安定
性、変調器の変調効率、高速性を大きく改善することが
できる。
FIG. 8 shows a quantum well layer 14 having a tensile strain of -1.5% and -1.0%, respectively, in the optical modulator and the distributed feedback type laser unit in the first embodiment. , And further embedded structure,
5 shows an element structure of an embodiment in which a current confinement structure is introduced by a known method. In this case, the oscillation light is in the TM mode, and a light hole band is involved in laser emission and light absorption instead of the conventional heavy hole band. Therefore, the stability of the oscillation wavelength of the laser, the modulation efficiency of the modulator, and the high speed can be greatly improved.

【0016】実施例3 図9に示す光集積素子では実施例1と同様な手法によ
り、2領域の利得ピーク波長をそれぞれ1.50μm、
1.55μmに設定すると同時に量子井戸構造の格子歪
量をそれぞれ−1.0%、0.5%に設定する。このよ
うにして各半導体層を形成した後、上部分離電極16、
下部電極17を通常の蒸着法等により形成して半導体光
集積素子を得る。本構造を、それぞれTE、TMモ−ド
光増幅器として用い、電流注入によりTE、TMモ−ド
の増幅率を独立に制御することにより極めて容易に偏波
無依存の光増幅器を実現できる。図9は更に埋込構造、
電流狭窄構造を公知の方法により導入した実施例の素子
構造である。これにより、光増幅器の偏波無依存性を完
全に除去することができる。また、電流注入または電圧
印加によりTEまたはTMモ−ドの増幅率及び吸収係数
を独立に制御することにより、TE、TMモ−ドフィル
タを構成できる。
Embodiment 3 In the optical integrated device shown in FIG. 9, the gain peak wavelengths in two regions are set to 1.50 μm, respectively, in the same manner as in Embodiment 1.
At the same time as setting to 1.55 μm, the lattice strain of the quantum well structure is set to −1.0% and 0.5%, respectively. After each semiconductor layer is formed in this manner, the upper isolation electrode 16,
The lower electrode 17 is formed by a normal vapor deposition method or the like to obtain a semiconductor optical integrated device. By using this structure as a TE and TM mode optical amplifier, respectively, and independently controlling the amplification factors of the TE and TM modes by current injection, a polarization independent optical amplifier can be realized very easily. FIG. 9 further shows an embedded structure,
5 shows an element structure of an embodiment in which a current confinement structure is introduced by a known method. Thereby, the polarization independence of the optical amplifier can be completely removed. Further, the TE and TM mode filters can be configured by independently controlling the amplification factor and absorption coefficient of the TE or TM mode by current injection or voltage application.

【0017】実施例4 図9において、n−InP基板8上に半導体基板が露出
した領域(成長領域幅)が回折格子9が形成されている
領域と形成されていない領域とで光導波路方向に幅の異
なるSiO2、SiNX、a−Si等の絶縁物からなるパ
ターニングマスク10を形成する。次に、このパターニ
ング基板上にIn0.85Ga0.15As0. 330.67四元導
波路層11、InxGa1-xAs三元量子井戸層12及び
In0.85Ga0.15As0.330.67四元量子障壁層13で
構成される多重量子井戸層14、およびp−InPクラ
ッド層15を順次、有機金属気相成長法で結晶成長す
る。この際、目開き領域に成長される三元、四元結晶の
組成は図4に示したようにパターニングマスクのマスク
幅によって変化する。図4から2領域のマスク幅をそれ
ぞれ30μm、0μmとすることによって、利得ピー
ク波長をそれぞれ1.25μm、1.55μmに設定する
と同時に量子井戸構造の格子歪量をそれぞれ−1%、+
1%に設定する。このようにして各半導体層を形成した
後、上部電極16、下部電極17を通常の蒸着法等によ
り形成して半導体光集積素子を得る。本構造を、それぞ
れ分布反射器18、活性領域19として用いることによ
り分布反射型レ−ザを実現できる。図10は更に埋込構
造、電流狭窄構造を公知の方法により導入した実施例の
素子構造である。この場合、圧縮歪を有する活性層19
で発生するTE光に対して引張歪を有する分布反射器1
8はほぼ無損失となるためレ−ザの発振しきい値の低
減、スペクトル線幅の低減を達成できる。本実施例では
活性領域を圧縮歪量子井戸、分布反射器18を引張歪量
子井戸で構成した。
Embodiment 4 In FIG. 9, the region (growth region width) where the semiconductor substrate is exposed on the n-InP substrate 8 is the region where the diffraction grating 9 is formed and the region where the diffraction grating 9 is not formed in the direction of the optical waveguide. forming different SiO 2, SiN X, the patterning mask 10 made of an insulating material such as a-Si width. Next, an In 0 in the patterning on the substrate. 85 Ga 0. 15 As 0 . 33 P 0. 67 four yuan waveguide layer 11, In x Ga 1-x As ternary quantum well layer 12 and an In 0. 85 Ga 0. 15 As 0. 33 P 0. 67 consists of four yuan quantum barrier layer 13 multiple quantum well layer 14, and successively a p-InP cladding layer 15 is crystal grown by metalorganic vapor phase epitaxy. At this time, the composition of the ternary and quaternary crystals grown in the aperture region changes according to the mask width of the patterning mask as shown in FIG. From FIG. 4, by setting the mask widths of the two regions to 30 μm and 70 μm, respectively, the gain peak wavelengths are set to 1.25 μm and 1.55 μm, respectively.
Set to 1%. After forming each semiconductor layer in this manner, the upper electrode 16 and the lower electrode 17 are formed by a normal vapor deposition method or the like to obtain a semiconductor optical integrated device. By using this structure as the distributed reflector 18 and the active region 19, a distributed reflection laser can be realized. FIG. 10 shows an element structure of an embodiment in which a buried structure and a current confinement structure are further introduced by a known method. In this case, the active layer 19 having a compressive strain
Reflector 1 having tensile strain for TE light generated by
8 is almost lossless, so that the oscillation threshold of the laser can be reduced and the spectral line width can be reduced. In this embodiment, the active region is constituted by a compression strain quantum well, and the distributed reflector 18 is constituted by a tensile strain quantum well.

【0018】実施例5 図11は同様の手法で光増幅器を集積した交差型光スイ
ッチの実現例である。図12に示すようなSiO2、S
iNX、a−Si等の絶縁物からなるパターニングマス
ク10を有するn−InP基板8上に利得ピーク波長が
1.45μmで井戸層に−1%の引張歪を有する量子井
戸構造14を形成する。この際、領域a、cでは利得ピ
ーク波長が1.50μmで井戸層に+0.5%の圧縮
歪、領域bには利得ピーク波長が1.55μmで井戸層
に+1.0%の圧縮歪となるようにマスク幅、成長領域
幅を調整する。図11Bは更に埋込構造、導波路構造、
電流狭窄構造を公知の方法により導入した実施例の素子
構造である。このように、圧縮、引張両歪を有する量子
井戸構造を面内に配置することにより、光反射部、光増
幅部は図11に示すようにTE、TMモ−ド両偏波光に
対してそれぞれ独立に制御することが可能となる。この
実施例によれば、ごく低損失、高消光比、完全偏波無依
存の光スイッチを極めて容易に実現できる。
Embodiment 5 FIG. 11 shows an embodiment of a cross-type optical switch in which optical amplifiers are integrated by the same method. SiO 2 , S as shown in FIG.
A quantum well structure 14 having a gain peak wavelength of 1.45 μm and a well layer having a −1% tensile strain is formed on an n-InP substrate 8 having a patterning mask 10 made of an insulator such as iN x or a-Si. . At this time, in the regions a and c, the gain peak wavelength is 1.50 μm and the well layer has + 0.5% compressive strain. In the region b, the gain peak wavelength is 1.55 μm and the well layer has + 1.0% compressive strain. The width of the mask and the width of the growth region are adjusted so as to be as appropriate. FIG. 11B further shows an embedded structure, a waveguide structure,
5 shows an element structure of an embodiment in which a current confinement structure is introduced by a known method. As described above, by arranging the quantum well structure having both compressive and tensile strains in the plane, the light reflecting portion and the optical amplifying portion respectively have the TE and TM mode polarized light as shown in FIG. It can be controlled independently. According to this embodiment, an optical switch with extremely low loss, high extinction ratio, and complete polarization independence can be realized very easily.

【0019】実施例6 図13は、サブマウント20上に実施例1または実施例
2の分布帰還型レーザ及び光変調器集積素子21とその
光軸上に球レンズ22を介し先球ファイバ23を固定
し、さらに変調駆動回路24を内蔵した光通信用送信モ
ジュール25である。本モジュールを用いれば高ファイ
バ光出力、低チャーピングの高速送信光信号を容易に作
り出せる。
Embodiment 6 FIG. 13 shows a distributed feedback laser and optical modulator integrated device 21 of Embodiment 1 or 2 on a submount 20 and a spherical fiber 23 on a light axis thereof via a spherical lens 22. An optical communication transmission module 25 which is fixed and further incorporates a modulation drive circuit 24. By using this module, a high-speed optical signal with high fiber output and low chirping can be easily generated.

【0020】実施例7 図14は、サブマウント20上に実施例3の偏波無依存
の光増幅器26とその光軸上に球レンズ22を介し2本
の先球ファイバ23を固定し、さらに駆動回路27を内
蔵した光通信用中継モジュール28である。本モジュー
ルを用いればTE、TMモ−ドの増幅率を独立に制御す
ることにより極めて容易に完全に偏波無依存の光中継モ
ジュールを実現できる。
Embodiment 7 FIG. 14 shows a polarization-independent optical amplifier 26 of Embodiment 3 mounted on a submount 20 and two front-end fibers 23 fixed on its optical axis via a spherical lens 22. This is an optical communication relay module 28 incorporating a drive circuit 27. By using this module, a completely polarization-independent optical repeater module can be realized very easily by controlling the gains of the TE and TM modes independently.

【0021】実施例8 図15は、実施例5の送信モジュール25を用いた幹線
系光通信システムである。送信装置29は送信モジュー
ル25とこのモジュール25を駆動するための駆動系3
0とを有する。モジュール25からの光信号がファイバ
31を通って受信装置32内の受光部33で検出され
る。本実施例に係る光通信システムによれば100km
以上の無中継光伝送が容易に実現できる。これはチャー
ピングが著しく低減される結果、ファイバ31の分散に
よる信号劣化がやはり著しく低減されることに基づく。
Embodiment 8 FIG. 15 shows a trunk optical communication system using the transmission module 25 of Embodiment 5. The transmitting device 29 includes a transmitting module 25 and a driving system 3 for driving the module 25.
0. The optical signal from the module 25 passes through the fiber 31 and is detected by the light receiving unit 33 in the receiving device 32. According to the optical communication system according to the present embodiment, 100 km
The above-described relayless optical transmission can be easily realized. This is based on the fact that the signal degradation due to the dispersion of the fiber 31 is also significantly reduced as a result of the significantly reduced chirping.

【0022】[0022]

【発明の効果】本発明に係る半導体光集積素子よれば、
複数の量子井戸層厚、歪量(格子不整合度、圧縮歪/引
張歪)が異なる量子井戸構造の集積化により半導体光素
子の性能を大幅に向上することができる。また本発明に
係る半導体光集積素子の製造方法によれば、複数の量子
井戸層厚、歪量(格子不整合度、圧縮歪/引張歪)が基
板面内で異なる量子井戸構造を実現できる。また、前記
歪量の組合せにより、従来では存在しなかった偏波面依
存性の異なる光導波路の集積化し、動作光の任意の偏波
面制御が可能な光集積素子及びその好適な作製法を提供
することができる。
According to the semiconductor optical integrated device of the present invention,
By integrating a plurality of quantum well structures having different quantum well layer thicknesses and different strain amounts (degree of lattice mismatch, compressive strain / tensile strain), the performance of the semiconductor optical device can be greatly improved. Further, according to the method for manufacturing a semiconductor optical integrated device of the present invention, it is possible to realize a quantum well structure in which a plurality of quantum well layer thicknesses and strain amounts (lattice mismatch, compressive strain / tensile strain) are different in a substrate plane. Further, by combining the above-mentioned distortion amounts, optical waveguides having different polarization plane dependencies, which have not existed in the past, can be integrated, and an integrated optical element capable of arbitrarily controlling the plane of polarization of operating light and a suitable manufacturing method thereof are provided. be able to.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来技術を説明するための図である。FIG. 1 is a diagram for explaining a conventional technique.

【図2】本発明の作用を説明するための図である。FIG. 2 is a diagram for explaining the operation of the present invention.

【図3】本発明の作用を説明するための図である。FIG. 3 is a diagram for explaining the operation of the present invention.

【図4】本発明の作用を説明するための図である。FIG. 4 is a diagram for explaining the operation of the present invention.

【図5】本発明の作用を説明するための図である。FIG. 5 is a diagram for explaining the operation of the present invention.

【図6】本発明の実施例を説明するための図である。FIG. 6 is a diagram for explaining an embodiment of the present invention.

【図7】本発明の実施例を説明するための図である。FIG. 7 is a diagram for explaining an embodiment of the present invention.

【図8】本発明の実施例を説明するための図である。FIG. 8 is a diagram for explaining an embodiment of the present invention.

【図9】本発明の実施例を説明するための図である。FIG. 9 is a diagram for explaining an embodiment of the present invention.

【図10】本発明の実施例を説明するための図である。FIG. 10 is a diagram for explaining an embodiment of the present invention.

【図11】本発明の実施例を説明するための図である。FIG. 11 is a diagram for explaining an embodiment of the present invention.

【図12】本発明の実施例を説明するための図である。FIG. 12 is a diagram for explaining an embodiment of the present invention.

【図13】本発明の実施例を説明するための図である。FIG. 13 is a diagram illustrating an example of the present invention.

【図14】本発明の実施例を説明するための図である。FIG. 14 is a diagram for explaining an example of the present invention.

【図15】本発明の実施例を説明するための図である。FIG. 15 is a diagram illustrating an example of the present invention.

【符号の説明】[Explanation of symbols]

1…絶縁膜パターニングマスク、2…半導体基板、3…
量子井戸構造、4…光導波路層、5…量子井戸層、6…
量子障壁層、7…クラッド層、8…n−InP基板、9
…回折格子、10…パタ−ニングマスク、11…InG
aAsP導波路層、12…InGaAs三元量子井戸
層、13…InGaAsP量子障壁層、14…多重量子
井戸構造、15…p−InPクラッド層、16…上部電
極、17…下部電極、18…分布反射器、19…活性
層、20…サブマウント、21…光変調器集積素子、2
2…球レンズ、23…先球ファイバ、24…変調駆動回
路、25…光通信用送信モジュール、26…偏波無依存
光増幅器、27…モジュール駆動系、28…光通信用中
継モジュール、29…送信装置、30…送信モジュール
駆動系、31…光ファイバ、32…受信装置、33…受
光部。
DESCRIPTION OF SYMBOLS 1 ... Insulating film patterning mask, 2 ... Semiconductor substrate, 3 ...
Quantum well structure, 4 ... optical waveguide layer, 5 ... quantum well layer, 6 ...
Quantum barrier layer, 7 cladding layer, 8 n-InP substrate, 9
... Diffraction grating, 10 ... Patterning mask, 11 ... InG
aAsP waveguide layer, 12: InGaAs ternary quantum well layer, 13: InGaAsP quantum barrier layer, 14: multiple quantum well structure, 15: p-InP cladding layer, 16: upper electrode, 17: lower electrode, 18: distributed reflection 19, active layer, 20: submount, 21: optical modulator integrated element, 2
2 ... sphere lens, 23 ... sphere fiber, 24 ... modulation driving circuit, 25 ... transmission module for optical communication, 26 ... polarization independent optical amplifier, 27 ... module driving system, 28 ... relay module for optical communication, 29 ... Transmission device, 30: transmission module drive system, 31: optical fiber, 32: reception device, 33: light receiving unit.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 鈴木 誠 東京都国分寺市東恋ケ窪1丁目280番地 株式会社 日立製作所中央研究所内 (72)発明者 高橋 誠 東京都国分寺市東恋ケ窪1丁目280番地 株式会社 日立製作所中央研究所内 (72)発明者 魚見 和久 東京都国分寺市東恋ケ窪1丁目280番地 株式会社 日立製作所中央研究所内 (72)発明者 井戸 立身 東京都国分寺市東恋ケ窪1丁目280番地 株式会社 日立製作所中央研究所内 (72)発明者 高井 厚志 東京都国分寺市東恋ケ窪1丁目280番地 株式会社 日立製作所中央研究所内 (56)参考文献 特開 平3−174790(JP,A) 特開 平1−257386(JP,A) 特開 平5−29602(JP,A) 特開 平2−62090(JP,A) 特開 平4−303982(JP,A) 特開 平4−233783(JP,A) 特開 平4−100291(JP,A) 特開 平3−289631(JP,A) Applied Physics L etters,59[4],p.443−445 Journal of Crysta l Growth,107,p.151−155 Journal of Crysta l Growth,107,p.147−150 Applied Physics L etters,51[14],p.1091− 1093 Electronics Lette rs,28[2],p.153−154 Electronics Lette rs,27[23],p.2138−2140 (58)調査した分野(Int.Cl.7,DB名) H01S 5/00 - 5/50 G02B 6/122 H01L 27/15 JICSTファイル(JOIS)──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Makoto Suzuki 1-280 Higashi Koikekubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory of Hitachi, Ltd. (72) Inventor Makoto Takahashi 1-280 Higashi Koikekubo, Kokubunji-shi, Tokyo Hitachi Central Research Laboratory (72) Inventor Kazuhisa Uomi 1-280 Higashi Koikekubo, Kokubunji-shi, Tokyo Hitachi Central Research Laboratory, Inc. 72) Inventor Atsushi Takai 1-280 Higashi Koigakubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd. (56) References JP-A-3-174790 (JP, A) JP-A-1-257386 (JP, A) JP-A-5-29602 (JP, A) JP-A-2-62090 (JP, A) JP 4-303982 (JP, A) JP-A-4-233783 (JP, A) JP-A-4-100291 (JP, A) JP-A-3-289631 (JP, A) Applied Physics Letters, 59 [4] , P. 443-445 Journal of Crystal Growth, 107, p. 151-155 Journal of Crystal Growth, 107, p. 147-150 Applied Physics Letters, 51 [14], p. 1091-1093 Electronics Letters, 28 [2], p. 153-154 Electronics Letters, 27 [23], p. 2138-2140 (58) Fields investigated (Int. Cl. 7 , DB name) H01S 5/00-5/50 G02B 6/122 H01L 27/15 JICST file (JOIS)

Claims (8)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】化合物半導体からなる第1の光導波層を有
する半導体レーザの他に、化合物半導体からなる第2の
光導波層を有する半導体光変調器を同一半導体基板面内
に有する半導体光集積素子の製造方法において、前記
1の光導波層を構成する複数の結晶成長層の少なくとも
1つが基板と異なる第1の格子定数を持ち、前記第2の
光導波層を構成する複数の結晶成長層の少なくとも1つ
が基板と異なる第2の格子定数を持ち、かつ、前記第1
の格子定数と前記第2の格子定数とは異なる値であり、
前記第1および第2の光導波層のコア層の形成は1回の
選択成長により行うものであり、前記第1の光導波層を
形成する領域と前記第2の光導波層を形成する領域のそ
れぞれにおいて前記基板面上のマスク幅(但し、マスク
幅は0以上である。)と成長領域幅の両方を調整するこ
とにより前記第1の光導波層と前記第2の光導波層のそ
れぞれにおいてバンドギャップと歪み量とを調整するこ
とを特徴とする半導体光集積素子の製造方法
1. A semiconductor optical integrated device having, in addition to a semiconductor laser having a first optical waveguide layer made of a compound semiconductor, a semiconductor optical modulator having a second optical waveguide layer made of a compound semiconductor on the same semiconductor substrate surface. in the manufacturing method for the device, said first plurality of crystal growth layer of the optical waveguide layer at least one has a first lattice constant different from the substrate, a plurality of crystal growth for forming the second optical waveguide layer at least one layer having a second lattice constant different from the substrate, and the first
The lattice constants between said second lattice constant is different values,
The formation of the first and the core layer of the second optical waveguide layer once
All SANYO performed by selective growth, the first optical waveguide layer
Between the region where the second optical waveguide layer is to be formed and the region where the second optical waveguide layer is to be formed.
In each case, the mask width on the substrate surface (the mask width
The width is 0 or more. ) And growth area width
By this, the first optical waveguide layer and the second optical waveguide layer
The method of manufacturing a semiconductor optical integrated element characterized that you adjust the band gap and the strain amount in respectively.
【請求項2】前記結晶成長層は、有機金属気相成長法に
より形成されることを特徴とする請求項1記載の半導体
光集積素子の製造方法。
2. The method for manufacturing a semiconductor optical integrated device according to claim 1, wherein said crystal growth layer is formed by metal organic chemical vapor deposition.
【請求項3】化合物半導体からなる第1の光導波層を有
するTE偏波光を増幅する第1の半導体光増幅器の他に、
化合物半導体からなる第2の光導波層を有するTM偏波光
を増幅する第2の半導体光増幅器を同一半導体基板面内
に有する半導体光集積素子の製造方法において、前記第
1の光導波層を構成する複数の結晶成長層の少なくとも
1つが基板と異なる第1の格子定数を持ち、前記第2の
光導波層を構成する複数の結晶成長層の少なくとも1つ
が基板と異なる第2の格子定数を持ち、かつ、前記第1
の格子定数と前記第2の格子定数とは異なる値であり、
前記第1および第2の光導波層のコア層の形成は1回の
選択成長により行うものであり、前記第1の光導波層を
形成する領域と前記第2の光導波層を形成する領域のそ
れぞれにおいて前記基板面上のマスク幅(但し、マスク
幅は0以上である。)と成長領域幅の両方を調整するこ
とにより前記第1の光導波層と前記第2の光導波層のそ
れぞれにおいてバンドギャップと歪み量とを調整するこ
とを特徴とする半導体光集積素子の製造方法。
3. In addition to a first semiconductor optical amplifier for amplifying TE polarized light having a first optical waveguide layer made of a compound semiconductor,
In a method for manufacturing a semiconductor optical integrated device having a second semiconductor optical amplifier for amplifying TM polarized light having a second optical waveguide layer made of a compound semiconductor on the same semiconductor substrate surface, the first optical waveguide layer is formed. At least one of the plurality of crystal growth layers has a first lattice constant different from the substrate, and at least one of the plurality of crystal growth layers constituting the second optical waveguide layer has a second lattice constant different from the substrate. And the first
And the second lattice constant are different values,
The formation of the core layers of the first and second optical waveguide layers is performed by one selective growth, and the area where the first optical waveguide layer is formed and the area where the second optical waveguide layer is formed In each of the above, the first optical waveguide layer and the second optical waveguide layer are respectively adjusted by adjusting both the mask width on the substrate surface (the mask width is 0 or more) and the growth region width. A method of manufacturing a semiconductor optical integrated device, wherein a band gap and a distortion amount are adjusted.
【請求項4】前記結晶成長層は、有機金属気相成長法に
より形成されることを特徴とする請求項1記載の半導体
光集積素子の製造方法。
4. The method according to claim 1, wherein said crystal growth layer is formed by metal organic chemical vapor deposition.
【請求項5】化合物半導体からなる第1の光導波層を有
する半導体レーザと、化合物半導体からなる第2の光導
波層を有する半導体光変調器とを同一半導体基板面内に
有する半導体光集積素子において、前記第1の光導波層
を構成する複数の結晶成長層の少なくとも1つが基板と
異なる第1の格子定数を持ち、前記第2の光導波層を構
成する複数の結晶成長層の少なくとも1つが基板と異な
る第2の格子定数を持ち、かつ、前記第1の格子定数と
前記第2の格子定数とは異なる値であり、前記第1の光
導波層と前記第2の光導波層とは1回の選択成長により
滑らかに結合しており、前記第1の光導波層を形成する
領域と前記第2の光導波層を形成する領域のそれぞれに
おいて前記基板面上のマスク幅(但し、マスク幅は0以
上である。)と成長領域幅の両方を調整することにより
前記第1の光導波層と前記第2の光導波層のそれぞれに
おいてバンドギャップと歪み量とが調整されていること
を特徴とする半導体光集積素子。
5. A semiconductor optical integrated device having a semiconductor laser having a first optical waveguide layer made of a compound semiconductor and a semiconductor optical modulator having a second optical waveguide layer made of a compound semiconductor on the same semiconductor substrate surface. , At least one of the plurality of crystal growth layers constituting the first optical waveguide layer has a first lattice constant different from that of the substrate, and at least one of the plurality of crystal growth layers constituting the second optical waveguide layer One has a second lattice constant different from that of the substrate, and the first lattice constant and the second lattice constant are different values, and the first optical waveguide layer and the second optical waveguide layer Are smoothly coupled by one selective growth, and the mask width on the substrate surface (provided that the region where the first optical waveguide layer is formed and the region where the second optical waveguide layer is formed) The mask width is 0 or more.) A semiconductor optical integrated device, wherein a band gap and an amount of distortion are adjusted in each of the first optical waveguide layer and the second optical waveguide layer by adjusting both of the region widths.
【請求項6】請求項5に記載の前記半導体光集積素子
と、この半導体光集積素子からの出力光を外部に導波す
るための導波手段と、この導波手段に上記半導体光集積
素子からの出力光を集光するための集光手段と、上記半
導体光集積素子を駆動するための駆動手段とを有する光
通信用モジュール。
6. The semiconductor optical integrated device according to claim 5, a waveguide means for guiding output light from the semiconductor optical integrated device to the outside, and the semiconductor optical integrated device provided in the waveguide means. An optical communication module, comprising: condensing means for condensing the output light from the device; and driving means for driving the semiconductor optical integrated device.
【請求項7】請求項5記載の半導体光集積素子を有する
送信手段と、この送信手段からの出力光を外部に導波す
るための導波手段と、この導波手段からの出力光を受信
するための受信手段とを有する光通信システム。
7. A transmitter having the semiconductor optical integrated device according to claim 5, a waveguide for guiding output light from the transmitter to the outside, and receiving output light from the waveguide. Optical communication system having a receiving means for performing communication.
【請求項8】化合物半導体からなる第1の光導波層を有
するTE偏波光を増幅する第1の半導体光増幅器と、化合
物半導体からなる第2の光導波層を有するTM偏波光を増
幅する第2の半導体光増幅器とを同一半導体基板面内に
有する半導体光集積素子において、前記第1の光導波層
を構成する複数の結晶成長層の少なくとも1つが基板と
異なる第1の格子定数を持ち、前記第2の光導波層を構
成する複数の結晶成長層の少なくとも1つが基板と異な
る第2の格子定数を持ち、かつ、前記第1の格子定数と
前記第2の格子定数とは異なる値であり、前記第1の光
導波層と前記第2の光導波層とは1回の選択成長により
滑らかに結合しており、前記第1の光導波層を形成する
領域と前記第2の光導波層を形成する領域のそれぞれに
おいて前記基板面上のマスク幅(但し、マスク幅は0以
上である。)と成長領域幅の両方を調整することにより
前記第1の光導波層と前記第2の光導波層のそれぞれに
おいてバンドギャップと歪み量とが調整されていること
を特徴とする半導体光集積素子。
8. A first semiconductor optical amplifier for amplifying TE polarized light having a first optical waveguide layer made of a compound semiconductor and a second semiconductor optical amplifier for amplifying TM polarized light having a second optical waveguide layer made of a compound semiconductor. A semiconductor optical integrated device having two semiconductor optical amplifiers on the same semiconductor substrate surface, wherein at least one of a plurality of crystal growth layers constituting the first optical waveguide layer has a first lattice constant different from that of the substrate; At least one of the plurality of crystal growth layers constituting the second optical waveguide layer has a second lattice constant different from that of the substrate, and the first lattice constant and the second lattice constant have different values. The first optical waveguide layer and the second optical waveguide layer are smoothly coupled by one selective growth, and the region where the first optical waveguide layer is formed and the second optical waveguide layer are connected. On the substrate surface in each of the regions where the layers are to be formed By adjusting both the mask width (where the mask width is 0 or more) and the growth region width, the band gap, the amount of distortion, and the like in each of the first optical waveguide layer and the second optical waveguide layer are adjusted. The semiconductor optical integrated device, wherein is adjusted.
JP4283192A 1992-02-28 1992-02-28 Semiconductor optical integrated device and method of manufacturing the same Expired - Lifetime JP3306892B2 (en)

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EP93103158A EP0558089B1 (en) 1992-02-28 1993-02-26 Semiconductor optical integrated device and method of manufacture thereof, and light receiver using said device
US08/024,084 US5574289A (en) 1992-02-28 1993-03-01 Semiconductor optical integrated device and light receiver using said device

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