JP3301891B2 - Stereo demodulation circuit and method of adjusting the degree of separation - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stereo demodulation circuit capable of automatically adjusting the degree of separation (hereinafter referred to as "separation") of a stereo demodulation circuit and a method of adjusting the degree of separation.

[0002]

2. Description of the Related Art A radio receiver having a stereo demodulation circuit as shown in FIG. 2 is generally known. The received RF signal is frequency-converted into an IF signal by a frequency conversion circuit (1), and the IF signal is amplified by an IF amplifier circuit (2). The output signal of the IF amplifier circuit (2) is subjected to FM detection by the FM detection circuit (3), and a stereo composite signal is generated at the output terminal. The stereo composite signal is supplied to a sub-carrier signal reproducing circuit (4), a sub-signal decoder (5), and an LPF.
Applied to (6). In the sub-carrier signal generation circuit (4), a reproduced sub-carrier signal is reproduced from the stereo composite signal, and the sub-carrier signal is applied to a sub-signal decoder (5) as a switching signal. In the sub signal decoder (5), a sub signal (LR) is obtained by multiplying the stereo composite signal by the switching signal. In the LPF (6), the main signal (L +
Only R) passes through the LPF (6), and the main signal is extracted. The main signal (L + R) and the sub signal (L
-R) generates a stereo L signal and a stereo R signal, respectively.

[0003]

In the matrix circuit (7), addition and subtraction of the main signal (L + R) and the sub signal (LR) are performed. That is, when added, a stereo L signal is obtained from (L + R) + (LR) = 2L, and when subtracted, (L + R) − (LR) = 2
From R, a stereo R signal is obtained. Then, in order to obtain only the stereo L signal and only the stereo R signal at the output terminals (8) and (9), the levels of the main signal and the sub signal must be matched. However, since the levels of the main signal and the sub-signal do not actually match, a stereo R signal appears as crosstalk in addition to the stereo L signal at the output terminal (8).
At the output terminal (9), a stereo L signal in addition to the stereo R signal appears as crosstalk, and the separation of the matrix circuit (7) deteriorates.

Therefore, conventionally, a variable circuit (10) for manually varying the level of a stereo composite signal is provided at the input terminal of the sub-signal decoder (5), and the stereo L level is adjusted in the manufacturing process of the radio receiver. A stereo composite signal containing only one of the signal and the stereo R signal is applied to the radio receiver so that the separation of the matrix circuit (7) becomes approximately 100%.
The level of the sub signal was changing. For this reason, there is a problem that the adjustment time is required and the production efficiency is deteriorated.

[0005]

DISCLOSURE OF THE INVENTION The present invention has been made in view of the above points, and is based on a stereo composite signal.
A stereo difference signal reproducing circuit for reproducing the stereo difference signal,
A first level adjusting circuit for setting an input signal or an output signal of the stereo difference signal reproducing circuit to a level corresponding to a control signal; a stereo sum signal generating circuit for extracting a stereo sum signal from the stereo composite signal; A matrix circuit for generating a stereo L signal and a stereo R signal by matrixing a signal and the stereo difference signal, and a first storage circuit for storing a control signal applied to the first level adjustment circuit. Features.

Also, a stereo difference signal reproducing circuit for reproducing a stereo difference signal from a stereo composite signal, and second and third level adjusting circuits for setting an output signal of the stereo difference signal reproducing circuit to a level corresponding to a control signal. A stereo sum signal generation circuit that extracts a stereo sum signal from the stereo composite signal; an adder that adds the stereo sum signal and an output signal of the second level adjustment circuit; A matrix circuit for generating a stereo L signal and a stereo R signal including a subtractor for subtracting the output signal of the level adjustment circuit; and a second circuit for storing a control signal applied to the second and third level adjustment circuits. And a storage circuit.

Further, from the stereo composite signal,
A stereo difference signal reproducing circuit for reproducing the stereo difference signal,
A level adjustment circuit that sets an input signal or an output signal of the stereo difference signal reproduction circuit to a level corresponding to a control signal, a stereo sum signal generation circuit that extracts a stereo sum signal from the stereo composite signal, and the stereo sum signal. A method of adjusting the degree of separation of a stereo demodulation circuit, comprising: a matrix circuit for matrixing the stereo difference signal to generate a stereo L signal and a stereo R signal; and a storage circuit for storing a control signal applied to the level adjustment circuit. And only the stereo L signal or the stereo R signal
A stereo composite signal including only a signal is applied, a level of a stereo R signal and a stereo K signal generated from a matrix circuit is detected, a control signal is changed according to the detection result, and the control signal is changed according to the control signal. The level of the stereo difference signal is adjusted, and the degree of separation is adjusted by adjusting the level.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing one embodiment of the present invention. (11) is a level adjusting circuit for adjusting the level of a stereo composite signal, and (12) is a level adjusting circuit (11). A control circuit for generating control data for setting the variable amount; (13) a D / A conversion circuit for converting the control data into an analog signal to generate a control signal; (14) a memory for storing the control data; (15) Is a level detection circuit for detecting the level of the output signal of the matrix circuit (7). In FIG. 1, the same circuits as those in the conventional example in FIG. 2 are denoted by the same reference numerals as those in the conventional example in FIG. 2, and the description will be omitted.

In FIG. 1, the level detecting circuit (15) is not connected in the normal operation of the radio receiver. Receive R
The F signal is frequency-converted into an IF signal by a frequency conversion circuit (1), and the IF signal is amplified by an IF amplifier circuit (2). The output signal of the IF amplifier circuit (2) is subjected to FM detection by the FM detection circuit (3), and a stereo composite signal is generated at the output terminal. The stereo composite signal is applied to a sub-carrier signal reproducing circuit (4), an LPF (11) and a level adjusting circuit (11). In the sub-carrier signal generation circuit (4), a sub-carrier signal is reproduced from the stereo composite signal, and the reproduced sub-carrier signal is applied to a sub-signal decoder (5) as a switching signal. Further, the stereo composite signal is applied to a level adjustment circuit (11), and the level of the stereo composite signal is varied and set to a predetermined level. The sub-signal decoder (5) is composed of, for example, a double-balanced multiplication circuit, and multiplies the output signal of the level adjustment circuit (11) by the switching signal to generate a sub-signal (L).
-R) is obtained. Since the sub signal level changes according to the level of the stereo composite signal, it is set according to the level variable amount of the level adjustment circuit (11). The LPF (6) has a band through which the main signal (L + R) in the stereo composite signal can pass, and only the main signal passes through the LPF (6). The main signal (L + R) and the sub signal (LR) are applied to a matrix circuit (7) and are matrixed, so that a stereo L signal and a stereo R signal are output to output terminals (8) and (9), respectively. appear.

The control circuit (12) reads out control data from the memory (14) and transfers it to the D / A conversion circuit (13). In the D / A conversion circuit (13), the control data is converted into an analog control signal, and the level adjustment circuit (1)
The variable level of 1) is set according to the control signal. The control data is created so that the level of the sub-signal becomes a predetermined level in the manufacturing process of the set, and the separation of the matrix circuit (7) becomes the best. The control circuit (14) is a microcomputer that performs control such as setting the frequency of a local oscillation signal that determines the tuning frequency of a radio receiver, and generating a search stop signal during a search operation of a broadcast station. May also be used.

Next, an adjustment operation in the production process of the radio receiver shown in FIG. 1 will be described with reference to a flowchart shown in FIG. First, prior to the start of the adjustment work, the level detection circuit (15) is connected to the radio receiver as shown by a dotted line (S1). The first test signal including only the stereo L signal is received by the radio receiver (S2). Control circuit (12)
After the first control data is generated and converted to analog, it is applied to the level adjustment circuit as a control signal, and the level of the sub signal becomes the first level (S3). The level detection circuit (15) detects the output signal level of the output terminal (9) (S4). An output signal of the level detection circuit (15) is digitally converted by an A / D conversion circuit (16), and the data is temporarily stored in a memory together with control data (S
5). The control circuit (12) detects whether or not the control data is the last data (S6). If not, the control data is replaced with the next data (S6).
7). Then, the steps from S4 to S7 are repeated until the control data becomes the last control data. Therefore, the memory (14) stores a plurality of control data for generating the level of the sub signal and a plurality of data corresponding to the output signal level of the output terminal (9). Note that the sub signal level changes in one direction in a direction of increasing or decreasing in accordance with the control data.

When the control data is the last control data,
Next, the second test signal including only the stereo R signal is received by the radio receiver (S8). Thereafter, similarly to the steps from S3 to S7, the control circuit (12) generates control data, changes the level of the sub-signal according to the analog-converted control signal, and sets the output signal level of the output terminal (8). And the control data and the data corresponding to the output signal level of the output terminal (8) are temporarily stored in pairs in the memory (14) (S9 to S13). If the control data is the last control data, the reception of the second test signal is stopped. Then, the control circuit (12) reads out the data from the memory (14), determines the control data having the best relationship between the output signal levels of the output terminals (18) and (19), and stores the control data in the memory (14). The data is stored (S14).
Finally, the level detection circuit (15) and the A / D conversion circuit (16) are removed from the radio receiver.

In FIG. 1, the level adjustment circuit (1
1) may be configured to vary the output signal level of the sub signal decoder (5). In this case, the level of the sub signal applied to the matrix circuit (7) can be set accurately. FIG. 4 shows another embodiment of the present invention.
7) and (18) are first and second level adjustment circuits for varying the level of the sub-signal, and (19) adds the output signal of the LPF (6) and the output signal of the first level adjustment circuit (17). The matrix circuit includes an addition circuit and a subtraction circuit that subtracts an output signal of the LPF (6) and an output signal of the second level adjustment circuit (18).

In FIG. 4, the output signal of the sub signal decoder (5) is applied to first and second level adjusting circuits (17) and (18). The variable levels of the first and second level adjustment circuits (17) and (18) are respectively set according to the output signals of the D / A conversion circuit (13). The output signals of the first and second level adjustment circuits (17) and (18) are applied to an addition circuit and a subtraction circuit, respectively, and added and subtracted with the output signal of the LPF (6) applied to another input terminal, respectively. Thus, stereo L and R signals are obtained. Therefore, the sub-signal levels in the addition and subtraction lines of the matrix circuit (19) can be set independently, and the best separation can be obtained.

FIG. 5 is a specific circuit example of the level adjustment circuit (11) of FIG. 1, and (20) is a first circuit to which an input signal is applied.
A current source transistor, (21) a second current source transistor to which a bias is applied, (22) and (23)
The operating current is the collector current of the current source transistor (20), and the differentially connected transistors (24) and (2)
5) is a differentially connected transistor (2) using the collector current of the second current source transistor (21) as an operating current.
6) is an output circuit composed of a current mirror circuit, (27) is a constant current source, and (28) is a variable current source that is varied according to the output signal of the D / A conversion circuit (13).

In FIG. 5, the output signal of the FM detection circuit (3) is applied to the base of a first current source transistor (20), and the collector current of the first current source transistor (20) increases according to the output signal. Becomes a changing current.
The collector current of the first current source transistor (20) is supplied to the emitters of the transistors (22) and (23) and shunted. The second current source transistor (2
Since a bias is applied to the base of 1), the magnitude of the collector current of the second current source transistor (21) becomes constant. Then, the collector current of the second current source transistor (21) is supplied to the emitters of the transistors (24) and (25) and shunted. Transistor (23)
After the collector currents of (25) and (25) are added, the sum is transmitted to the subsequent circuit via the output circuit (26). That is, an addition signal of the input signal and the signal of a certain level is generated from the output terminal.

On the other hand, transistors (22) and (25)
The emitter voltage of the transistor (29) is applied to the base of the transistor, and the emitter voltage of the transistor (30) is applied to the bases of the transistors (23) and (24). The emitter voltage of the transistor (29) has a value corresponding to the magnitude of the output current of the constant current source (27).
The emitter voltage of 0) is a value corresponding to the magnitude of the output current of the variable current source (28). Since the output current of the variable current source (28) changes according to the output signal of the D / A conversion circuit (13), the emitter voltage of the transistor (30) changes. The voltage between the bases of the transistors (22) and (23) and the voltage between the bases of the transistors (24) and (25) change according to the change in the emitter voltage of the transistor (30). And the level of the output signal obtained at the output terminal can be changed. That is, if the emitter voltage of the transistor (30) is higher than the emitter voltage of the transistor (29), the collector current of the transistor (23) increases, and the level of the output signal obtained at the output terminal increases. When the emitter voltage of the transistor (30) is lower than the emitter voltage of the transistor (29), the collector current of the transistor (25) increases and the level of the output signal obtained at the output terminal decreases.

[0018]

As described above, according to the present invention, in order to obtain the best separation, the level of the sub signal can be automatically adjusted according to the level of the demodulated stereo L and R signals. Therefore, it is possible to shorten the separation adjustment time at the time of manufacturing the set, and to increase the efficiency of the production process.

Further, since the level adjustment circuit is composed of transistors and resistors that can be integrated, a stereo demodulation circuit suitable for integration can be provided, and the number of external elements can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional example.

FIG. 3 is a flowchart for explaining the operation of the present invention.

FIG. 4 is a block diagram showing another embodiment of the present invention.

FIG. 5 is a circuit diagram showing a main part of FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Frequency conversion circuit 2 IF amplifier circuit 3 FM detection circuit 4 Subcarrier signal reproduction circuit 5 Sub-signal decoder 6 LPF 7 Matrix circuit 8, 9 Output terminal 11 Level adjustment circuit 12 Control circuit 13 D / A conversion circuit 14 Memory 15 Level detection Circuit 16 A / D conversion circuit 17 First level adjustment circuit 18 Second level adjustment circuit

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04H 5/00

Claims (3)

(57) [Claims] 1. A stereo difference signal reproducing circuit for reproducing a stereo difference signal from a stereo composite signal, and a first level adjusting circuit for setting an input signal or an output signal of the stereo difference signal reproducing circuit to a level corresponding to a control signal. A stereo sum signal generation circuit that extracts a stereo sum signal from the stereo composite signal; a matrix circuit that matrixes the stereo sum signal and the stereo difference signal to generate a stereo L signal and a stereo R signal; And a first storage circuit for storing a control signal applied to the one-level adjustment circuit, wherein the first storage circuit has a stereo L signal or a stereo L signal.
Apply a stereo composite signal containing only the R signal.
And control the first level adjustment circuit while controlling the matrix circuit.
Output, and the stereo separation is determined according to the detection result.
Find the control signal that gives the best point and store it in advance.
Stereo demodulation circuit according to claim Kukoto. 2. A stereo difference signal reproducing circuit for reproducing a stereo difference signal from a stereo composite signal, and second and third level adjusting circuits for setting an output signal of the stereo difference signal reproducing circuit to a level corresponding to a control signal. A stereo sum signal generating circuit for extracting a stereo sum signal from the stereo composite signal; an adder for adding the stereo sum signal and an output signal of the second level adjustment circuit; A matrix circuit for generating a stereo L signal and a stereo R signal including a subtractor for subtracting the output signal of the level adjustment circuit; and a second circuit for storing a control signal applied to the second and third level adjustment circuits. A stereo demodulation circuit, comprising: a storage circuit; 3. A stereo difference signal reproducing circuit for reproducing a stereo difference signal from a stereo composite signal, a level adjusting circuit for setting an input signal or an output signal of the stereo difference signal reproducing circuit to a level corresponding to a control signal, A stereo sum signal generating circuit for extracting a stereo sum signal from the stereo composite signal; a matrix circuit for matrixing the stereo sum signal and the stereo difference signal to generate a stereo L signal and a stereo R signal; and the level adjustment circuit And a storage circuit for storing a control signal applied to the control signal. The method for adjusting the degree of separation of a stereo demodulation circuit, comprising: applying a stereo composite signal including only a stereo L signal or only a stereo R signal to change a control signal. The stereo difference signal
Changing the level, each level of the stereo difference signal is changed, the stereo R signal generated from Matotorikusu circuit and the stereo L
The level of the signal is detected, and the output level of the matrix circuit is detected.
The output level of the matrix circuit where the
Detect and determine the level of the stereo difference signal that provides the best stereo separation.
Deriving a control signal to be adjusted and storing the derived control signal in a storage circuit in advance.
Characteristic adjustment method for the stereo demodulation circuit.