JP3278791B2 - Electronic switch - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic switch such as a photoelectric switch, and more particularly to an electronic switch having a feature in an output protection circuit.

[0002]

2. Description of the Related Art FIG. 8 is a block diagram showing an example of a conventional photoelectric switch. In FIG. 1, an oscillation circuit 1 is a clock oscillator that generates a clock signal having a constant frequency.
The light is input to the light emitting circuit 2. The light emitting element 2 drives a light emitting element, for example, a light emitting diode 3. In the reflection type photoelectric switch, light output from the light emitting diode 3 is reflected by a nearby object and detected by a light receiving element such as the photodiode 4. The output of the photodiode 4 is input to the comparison circuit 7 via the light receiving circuit 5 and the amplification circuit 6. The comparison circuit 7 discriminates the presence or absence of an object by discriminating the input signal with a predetermined threshold value, and the output is input to the integration circuit 9 via the gate circuit 8.
The gate circuit 8 prevents the malfunction due to disturbance noise light by opening the gate every period of the projection clock, and the integration circuit 9 determines the presence or absence of an object by the input signal continuing for a predetermined time. The output is input to the output circuit 10. Output circuit 1
0 drives the switching transistor Q1 for opening and closing the output. When the photoelectric switch is a two-wire photoelectric switch, the switching transistor Q1 and the short-circuit detection circuit 12 are connected in series to the pair of terminals 11a and 11b. The short-circuit detecting circuit 12 includes a resistor for detecting an overcurrent connected in series to the transistor Q1, and a detecting transistor or the like that becomes conductive when the voltage across the both ends becomes a predetermined value or more. It detects the current. The overcurrent detection output is given to the output protection circuit 13. The output protection circuit 13 prohibits the output from the output circuit 10 when a short circuit is detected, and outputs a return signal at regular intervals. The output protection circuit 13 has a capacitor connected to the ground terminal as shown in FIG. 8, for example, and discharges the capacitor C1 based on a detection signal from the short-circuit detection circuit 12.

[0003] Figure 9 is an object detection signal is a time chart showing the short circuit detection signal, the terminal voltage of the capacitor C1, and the change of the prohibition signal output from the output protection circuit 13 to the output circuit 10. In the figure, short circuit detection circuit 12 at time t ₁
When a short circuit is detected, a short circuit detection signal is output to the output protection circuit 13, and the capacitor C1 is discharged. Therefore, the terminal voltage decreases as shown. When the output value becomes equal to or less than the predetermined value, an output prohibition signal is supplied to the output circuit 10, and the output is turned off. At the same time, the transistor Q1 is also turned off, and the short-circuit detection in the short-circuit detection circuit 12 stops. Then, the capacitor C1 is gradually charged as shown in the figure, and when it reaches a certain value, the inhibition of the output is released.
Here, if the load is in a short-circuit state, the output is once turned on, but the short-circuit detection signal is output from the short-circuit detection circuit 12 again. Therefore, the capacitor C1 is discharged again, and the same operation is repeated. And if that time t ₂ after the short-circuit condition has been eliminated, so that the return to normal operation if it is released inhibited subsequent output.

[0004]

However, in such a conventional system, since a capacitor is used, an IC is required.
A pin for external connection is required when incorporating it in a circuit. Further, if the capacitor itself is to be built in, only a few pF can be formed into a chip, so that the output prohibition time is shortened and the required time cannot be set.

The present invention has been made in view of such a conventional problem, and has as its object to obtain a predetermined short-circuit recovery time without using an external terminal.

[0006]

According to a first aspect of the present invention, there is provided an oscillation circuit for oscillating a clock signal, an output circuit,
A short circuit detection circuit for detecting a short circuit state of the output, an electronic switch comprising an output protection circuit for prohibiting the output of the predetermined time the output circuit based on the short-circuit detection signal obtained from the short circuit detection circuit, the output protection circuit Is a digital filter that detects that a short-circuit detection signal is continuously obtained for a predetermined number of clocks input from the oscillation circuit, and a predetermined number that is input from the oscillation circuit when a detection output is obtained from the digital filter. The output circuit is disabled by the counter that counts the clock of and the detection output of the digital filter.
A holding unit for canceling the output prohibition state by a predetermined number of count outputs of the counter , wherein the oscillation circuit comprises:
Oscillation cycle is extended based on output inhibit signal output from
It is characterized by doing .

[0007]

[0008]

According to the present invention having such features, if a short-circuit condition occurs in the electronic switch, the short-circuit detection circuit detects the short-circuit condition and supplies it to the output protection circuit. The output protection circuit outputs a detection signal to the holding unit when a short-circuit detection signal is obtained continuously for a predetermined clock cycle. The holding unit supplies an output prohibition signal to the output circuit based on this signal, and sets the output to a prohibition state. And when output is prohibited
The oscillation circuit clock is counted to
The output prohibition state is released when the clock
The period is lengthened, and thereby the count value of the counter is reduced.

[0009]

FIG. 1 is a block diagram showing a configuration of an output section of an electronic switch according to an embodiment of the present invention. In this figure, the same parts as those of the conventional example are denoted by the same reference numerals, and detailed description is omitted. In this embodiment, the output of the short-circuit detection circuit 12 is given to the output protection circuit 21. The output protection circuit 21 is a digital filter 2 to which a short-circuit detection signal is input as shown in FIG.
2, a counter 23 for receiving a clear signal from the digital filter 22 and counting the clock signal of the oscillation circuit 1, and a holding unit 24 to which the outputs of the digital filter 22 and the counter 23 are respectively input.

FIG. 2 is a circuit diagram showing a detailed configuration example of the output protection circuit 21. In this figure, the digital filter 22 has three D-type flip-flops 2 as shown in FIG.
2a to 22c are connected in cascade, and their Q bar outputs are connected to a NOR circuit 22d. When the short-circuit detection signal goes to the H level for three consecutive clocks, the digital filter 22
A set signal is output to the flip-flop 24a, and a clear signal is output to the counter 23. Counter 2
Reference numeral 3 denotes a cascade-connected 5-bit D-type flip-flop and an AND circuit 23a to which the Q output thereof is inputted. This resets the 24 RS flip-flops 24a.

Next, the operation of the embodiment will be described with reference to a time chart shown in FIG. 3 (a) is a object detection signal outputted from the integrating circuit 9, and that a short circuit state at the time t ₃ in the detection of an object. Then, an overcurrent flows, and as shown in FIG.
A short-circuit detection signal is output. This signal is applied to the digital filter 22 shown in FIG. 2 and is delayed by three clocks. When a short-circuit detection signal is obtained for three consecutive clocks, the RS flip-flop 24a is set, and at the same time, the counter 23 is cleared and counted. Is started. And FIG.
In the circuit of FIG. 3, the counter 23 counts the pulses, and FIG.
AND circuit 23a to the time t ₄ in the 32 th pulse as shown in
Is inverted to the H level, and the RS flip-flop 24a is reset. Therefore, the output prohibition state is temporarily released as shown in FIG. If the short circuit continues, the short circuit is detected again by the short circuit detection circuit 12, and a short circuit detection signal is applied to the digital filter 22. Therefore, the same operation is repeated. Then, if the short-circuit state disappears, a short-circuit detection signal cannot be obtained at the next recovery.
When the flip-flop is reset, it returns to the original state.

As described above, according to the present invention, the output prohibition state is periodically released by using a digital filter and a counter instead of charging / discharging the capacitor. Therefore, the present invention can be configured as an IC together with other circuit blocks. The circuit configuration can be extremely simplified. Further, an effect that stability against disturbance is high and a malfunction hardly occurs can be obtained.

Next, a second embodiment of the present invention will be described. In this embodiment, the oscillation frequency of the oscillation circuit is changed in order to reduce the number of stages of the counter used for short-circuit protection. FIG. 4 is a block diagram showing the overall configuration of the photoelectric switch according to the present embodiment, and FIG. 5 is a diagram showing an oscillation circuit thereof. In this figure, the same parts as those in the first embodiment described above are denoted by the same reference numerals, and detailed description is omitted. In this embodiment, the output protection circuit 21 has the same configuration as that of the first embodiment, and its output prohibition signal is output to the oscillation circuit 31 simultaneously with the output circuit 10 as an oscillation cycle switching signal. The oscillation circuit 31 switches so as to lengthen the oscillation cycle based on the output inhibition signal.

As shown in FIG. 5, the oscillation circuit 31 includes a time constant circuit comprising a capacitor C2 and resistors R1 and R2, and a comparator 31a. Comparator 3
A non-inverting input terminal 1a has a resistor R for dividing the power supply voltage.
3 and R4 are connected, and a resistor R5 is connected between the output terminal and the input terminal. The output of the comparator 31a is fed back to the common connection point of the capacitor C2 and the resistor R1 via the resistor R2 with the output being in phase through the two transistors Q1 and Q2.

Next, the operation of the oscillation circuit 31 will be described with reference to FIG.
This will be described with reference to the time chart of FIG. In normal operation, the output inhibit signal is at L level, so that the transistor Q
4 is off, transistor Q5 is on, and the other end of resistor R1 is grounded. In this state, the capacitor C
2 is charged and discharged and oscillates at a constant oscillation cycle.
As shown in FIG. 6A, a curve A represents a terminal voltage of the capacitor C2. By such charging and discharging, the comparator 3
Since the discrimination is made at a predetermined threshold from 1, the transistor Q6
As a result, the clock signal shown in FIG. 6B is output.

If a short circuit occurs, the short circuit is detected by the short circuit detecting circuit 12 as described above. When a short-circuit detection signal is supplied continuously for three clocks, an output inhibition signal is output by the output of the holding unit 24. At this time, the output inhibition signal is also supplied to the oscillation circuit 31, so that the transistor Q4 is turned on and the transistor Q5 is turned off. Therefore, three diodes (about 2 V) are provided on the diode side of the resistor R1.
, The convergence point at the time of charging / discharging at C1, R1 and R2 rises. Therefore, curve B in FIG.
As shown in FIG. 6, the charge / discharge cycle becomes longer, and as shown in FIG. 6C, the clock cycle becomes longer. Therefore, in order to set the same output prohibition period, the number of stages of the counter 23 can be reduced, or a long output prohibition state can be obtained with the same number of stages. Other configurations are the same as in the first embodiment.

FIG. 7 is a circuit diagram showing another example of the oscillation circuit 32. The current mirror circuit CM1 in the figure the first transistor and the emitter area 9s connected to each constant current source Io, which is configured with two transistors of the 10s, the current and respectively I _1, I ₂ I do. In this case I ₁ is 9Io, I ₂ becomes 10Io. The output inhibit signal is applied to the base of transistor Q7, and its output is inverted and applied to transistor Q8. The collector of the transistor Q8 is connected to the current source I _1, further second
Is connected to the current mirror circuit CM2. Current outputs of I ₂ of the first current mirror circuit CM1 is connected to the other transistor and the third current mirror circuit CM3 of the second current mirror circuit. The two transistors of the current mirror circuit CM3 are respectively connected to the fourth current mirror circuit CM4. Current mirror circuit C
The transistor M4 has an emitter area of 1 s and 2 s, respectively. One end of the current mirror circuit CM4 is connected to the inverting input terminal of the comparator 32a. The non-inverting input terminal of the comparator 32a is connected to a voltage dividing circuit of resistors R6 and R7 for dividing the power as shown in the figure. The collector of the transistor Q9 is connected to one end of the fourth current mirror circuit CM4. Transistor Q
Reference numeral 10 denotes a transistor that outputs the output of the comparator 32a as a clock signal.

The operation of the embodiment will now be described. During normal operation, the output inhibition signal is at the L level, so that the transistor Q7 is off and the transistor Q8 is on. Therefore, the second current mirror circuit CM2 becomes inactive and the current I2 flows through the current mirror circuit CM3. Therefore, the current I flowing through the current mirror circuits CM4 and CM3
4 and I3 are 20Io and 10Io, respectively. Therefore, both the charging current and the discharging current are 10Io. On the other hand, when the output prohibition signal is output after the short circuit detection signal continues for three clocks, the transistor Q7 is turned on and the transistor Q8 is turned off.
Therefore, the current mirror circuit CM2 operates, and the current flowing into CM3 is 10Io-9Io, that is, only Io.
Therefore, the current I4 becomes 2Io and I3 becomes Io. Since the values of I3 and I4 are 1/10 in this way, the charging and discharging time of the capacitor C3 is also ten times.
Therefore, the oscillation cycle can be made ten times. By increasing the clock cycle when output is prohibited with a relatively simple configuration, the counter 23 in the output protection circuit 21
Can be reduced in number.

Although the present embodiment describes a photoelectric switch, the present invention is not limited to a photoelectric switch, but can be applied to various electronic switches such as a proximity switch.

[0020]

As described above in detail, according to the present invention, if a short circuit is detected, the output protection circuit for releasing the prohibition state at regular intervals is constituted by a logic circuit, so that a capacitor is not required. Therefore, there is an effect that there is no malfunction and the operation time can be ensured. Output hold
This makes it easy to integrate the signal processing circuit block including the protection circuit into an IC.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an overall configuration of a photoelectric switch according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a circuit example of an output protection circuit according to a first embodiment of the present invention.

FIG. 3 is a time chart showing the operation of the first embodiment of the present invention.

FIG. 4 is a block diagram showing an overall configuration of a photoelectric switch according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a configuration of an oscillation circuit of a photoelectric switch according to a second embodiment of the present invention.

FIG. 6 is a time chart illustrating an operation of the oscillation circuit according to the second embodiment of the present invention.

FIG. 7 is a circuit diagram showing another example of the oscillation circuit according to the second embodiment of the present invention.

FIG. 8 is a block diagram showing the overall configuration of a conventional photoelectric switch.

FIG. 9 is a time chart showing an operation of a conventional photoelectric switch when a short circuit is detected.

[Explanation of symbols]

 1, 31, 32 Oscillation circuit 2 Light emitting circuit 3 Light emitting diode 4 Photodiode 5 Light receiving circuit 6 Amplifier 7 Comparison circuit 8 Gate circuit 9 Integrating circuit 10 Output circuit 12 Short circuit detection circuit 21 Output protection circuit 22 Digital filter 23 Counter 24 Holder CM1 to CM4 Current mirror circuit

Continuation of the front page (56) References JP-A-6-164353 (JP, A) JP-A-5-14160 (JP, A) JP-A-2-23121 (JP, U) JP-A-63-98982 ( Microfilm (JP, U) photographing the contents of the specification and drawings attached to the application form

Claims (1)

(57) [Claims] An oscillation circuit for oscillating a clock signal, an output circuit, a short-circuit detection circuit for detecting a short-circuit state of an output,
An electronic switch comprising an output protection times <br/> circuit for prohibiting the output of a predetermined time the output circuit based on the short-circuit detection signal obtained from the short circuit detection circuit, the output protection circuit, from the oscillation circuit A digital filter for detecting that a short-circuit detection signal is continuously obtained during a predetermined number of input clocks; and a predetermined number of clocks input from the oscillation circuit when a detection output is obtained from the digital filter. a counter for counting, and prohibiting state output circuit by the detection output of the digital filter, anda holding portion for releasing the disabled state of the output by a predetermined number of count output of said counter, said oscillator circuit, the holding Output inhibit signal output from
An electronic switch characterized by extending an oscillation period based on a signal .